GitLab

Detail:
  hdr/Options - The setting of the SMP switch can now be controlled by specifying the correct ASFLAGS, e.g. ASFLAGS="-PD \"SMP SETL {FALSE}\""
Admin:
  Untested


Version 6.08, 4.129.2.10. Tagged as 'Kernel-6_08-4_129_2_10'

Version 6.08, 4.129.2.9. Tagged as 'Kernel-6_08-4_129_2_9'

Detail:
  As the application slot is now a normal dynamic area, there's no need to manipulate the CAM directly. Convert FudgeSomeAppSpace into a OS_ChangeDynamicArea SWI followed by memset().
  ChangeDyn.s: Offset by 32k to account for the -32k that dynamic area -1 has.
  NewReset.s: Delete FudgeSomeAppSpace and replace as above.
Admin:
  Submission from Timothy Baldwin.

Version 6.08. Tagged as 'Kernel-6_08'

Detail:
  NewReset.s: Remove warning about soft reset, this is not supported any longer
  MsgCode.s: Reload LR after potentially changing mode
  PMF/osinit.s: Delete vestiges of soft reset support
Admin:
  Submission from Timothy Baldwin.

Version 6.07. Tagged as 'Kernel-6_07'

Detail:
  hdr/VduExt:
  - Introduce mode variable 13, for specifying the minimum number of screen banks that are guaranteed to be available. Eventually the kernel will make use of this during mode vetting & selection, to give programs a simple and reliable way of selecting banked screen modes. Currently however it's only supported by VideoOverlay and the corresponding GraphicsV overlay APIs.
  - Extend the mode flags to allow display rotation & flipping to be specified. This is used to indicate that the framebuffer accessed by the CPU is not in the same orientation as what the user is seeing. Again, currently this is only supported by VideoOverlay and the corresponding GraphicsV overlay APIs.
Admin:
  Tested on OMAP3, OMAP4


Version 6.06. Tagged as 'Kernel-6_06'

Version 6.05, 4.129.2.8. Tagged as 'Kernel-6_05-4_129_2_8'

Detail:
Admin:


Version 6.05. Tagged as 'Kernel-6_05'

Detail:
  The error block checks introduced in Kernel-5_35-4_79_2_313 are generating a few too many false positives and edge cases, so take the safe option of just disabling them rather than trying to tweak the rules further. Error pointers will still be checked, but the content of the error blocks will not.
  hdr/Options - Add CheckErrorBlocks switch so we can easily turn the code back on again in the future if necessary
  s/Kernel - Switch out all the code relating to error number checks, except for the dummy load of the first word of the error block, since that's still useful as a pointer validity check
  hdr/KernelWS - Revise SWIDespatch_Size definition so it's easier for it to cope with the various factors which may affect the despatcher size
Admin:
  Tested on PandaBoard
  Relevant discussion:
  https://www.riscosopen.org/forum/forums/11/topics/11133


Version 6.04. Tagged as 'Kernel-6_04'

Version 6.03. Tagged as 'Kernel-6_03'

Version 6.02. Tagged as 'Kernel-6_02'

Detail:
  Resolve allocation clash for vector &2C.  It appears that RISCOS Ltd used
  this vector in RISC OS 6 without getting it allocated - they really should
  have known better, since Hdr:RISCOS has always one of the header files
  centrally managed and coordinated between the two forks of RISC OS.
  Resolved by moving SeriousErrorV to &2D since it is a relatively recent
  addition (April 2016) and hasn't yet featured in a stable RISC OS 5
  release.
  Also correct some comments elsewhere in Hdr:RISCOS.


Version 6.01. Tagged as 'Kernel-6_01'

Detail:
  s/ChangeDyn - Due to the way that some page flags map to the same bits as (different) DA flags, the Batcall that PMP_PreGrow makes in order to claim the requested page was getting confused and thinking that the special DMA PreGrow handler should be used instead of the DA-specific one (which in this case is a custom one responsible for claiming the right page). Modify PMP_PreGrow so that it only supplies DA flags to the Batcall, and patches in any custom page flags afterwards.
  Also swap magic number for appropriate symbol in PMPGrowHandler.
Admin:
  Tested on BB-xM
  Fixes CAM corruption when a PMP claims a specific page, due to the PMP code and DA code disagreeing about which page should be used


Version 6.00. Tagged as 'Kernel-6_00'

The default OS_Byte value enabled num lock, but this was passed to the keyboard *before* a decision to wipe the CMOS (and hence potentially override it) was made.
This left the LED on until a key was pressed, regardless of the configured state.
Change the default OS_Byte value to be off so there's only one transition (off->on, or off->off), and refresh the keyboard after the validity of CMOS has been made.
Ref: https://www.riscosopen.org/forum/forums/4/topics/10400

Version 5.99. Tagged as 'Kernel-5_99'

This is now a HAL only kernel, and 0x3200000 is most likely somewhere in RAM.

The kernel has no interest in Ethernet, and this prototype is tightly bound to 1 specific platform, so move it to EtherTH's exports instead.
Makefile tidied.

Detail:
  s/Middle - Tweak register dump generation so that it'll attempt to provide sensible R13 & R14 values if the abort came from the same mode that we're handling the abort in. R13 will be adjusted by however much data we've pushed onto the stack, and R14 will be set to &DEADDEAD to indicate that the CPU has corrupted it and we don't know what the original value was.
Admin:
  Tested on BB-xM


Version 5.98. Tagged as 'Kernel-5_98'

Version 5.97, 4.129.2.7. Tagged as 'Kernel-5_97-4_129_2_7'

When SyncLib-0_04 is used in conjunction with SDIODriver, the exclusive access instructions (instead of SWP) abort when the cache is off, causing the machine to hang if *Cache Off is used.
See A15 TRM section 6.4.5 for the logic.
Copy the A53's known CPU flags to prevent the D cache being turned off.

Version 5.97. Tagged as 'Kernel-5_97'

Detail:
  s/vdu/vdudriver - On startup, initialise all palettes to 0, not just Pal_Blank. Ensures that entries which might not always be explicitly initialised (e.g. pointer) are self-consistent. Also make sure InitialiseMode communicates the pointer palette to the new GV driver, since some components tend to program it in a lazy manner (e.g. Hourglass)
  s/vdu/vdupalxx - Fix UpdateAllPalette setting R4 to 0 on exit. Fix PV_BlankScreen R0 return value to be 0/1 as the comment suggests instead of always being 0 due to GraphicsV calls.
Admin:
  Tested on wandboard
  Fixes incorrect hourglass colours after reset, due to software RAM clear not wiping the kernel's palette (kernel + Hourglass thought old colours were still in use, but IMXVideo hadn't been told any colours yet so was using defaults of 0)


Version 5.96. Tagged as 'Kernel-5_96'

Newly born boards have all 0xFF's in their CMOS (EEPROM), but the new order of keyboard scan did
  Init -> Scan keyboard -> Check (or wipe) CMOS
and would therefore leave 0xFF's in a select few kernel workspace areas and OS_Byte values.
Defer the init which reads CMOS until after the check/wipe step. Only the screen area size is now done early, but MassageScreenSize clamps that properly anyway.

Arthur3.s: Relocate stranded function SetupPrinterBuffer to osinit.
PMF/key.s: Drop support for SoftReset.
PMF/osinit.s: Stuff in hardcoded defaults at early init. Retrieve the proper ones later. Take ownership of SystemSprite/RamFS/Font Manager dynamic areas (deferrable).
vdudriver.s: Use symbolic name.
NewReset.s: Defer SystemSprite/RamFS/Font Manager area creation, MouseInit, Read(Hard)CMOSDefaults until later.
hdr/Options: Delete unused IgnoreVRAM. Remove MaxRAMFS_Size now PMPs make it not useful. Shuffle ARM6Support/XScaleMiniCache/XScaleJTAGDebug to be adjacent to their definitions.

Tested by filling first 256 bytes with 0xFF and powering up. Reset now completes, OS_Byte variables look sensible.

Version 5.95. Tagged as 'Kernel-5_95'

Detail:
  s/vdu/vdugrafl - Disable hardware scrolling if we're in a teletext mode with a border. Quick fix in lieu of adding some code to make sure the relevant border areas are cleared when scrolling.
  s/vdu/vduttx - Ignore VDU 23,18,<n> sequences when outside of teletext. Fixes a crash when screen update suspend/resume sequences are used.
Admin:
  Tested on RiscPC


Version 5.94. Tagged as 'Kernel-5_94'

During the first pass keyboard scan the ROM module nodes are built off the anchor ROMModuleChain.
During the second pass the whole set of ROM module nodes are temporarily constructed anchored on the stack, then switched over.
This caused a problem when a duplicate name module was encountered on a podule (eg. MbufManager in a NIC) because FindROMModule searches from the ROMModuleChain anchor, didn't find a match, so created a new node rather than linking it to the NewerVersion/OlderVersion linked list on the existing node.
Then *Unplug and *RMInsert would say "Module is not in ROM" if the optional podule specifier was given, because the search stopped at the first node with the right name.

Swap round the second pass so it anchors directly on ROMModuleChain, and keeps the first pass anchor on the stack (needed only occasionally to copy over details of modules already initialised).

Tested on a Risc PC with NIC, can now selectively unplug MbufManager again.

Version 5.93. Tagged as 'Kernel-5_93'

Detail:
  s/Oscli:
  - Reorder RemoveOscliCharJobs to avoid WrchV being left claimed while the output stream is being closed, to resolve ticket #420.
  - Register usage also tweaked a bit to make the code a bit shorter & easier to read
  - Fix RedirectWrch to deal with errors correctly. PSR save/restore macros were added to the routine during the 32bit conversion process, but (a) they were inadvertantly causing all errors to be ignored, and (b) they were redundant since WrchV has no special in/out requirements for the PSR flags
Admin:
  Tested on Pandaboard
  Ticket #420 fix based around Colin's fix from https://www.riscosopen.org/forum/forums/4/topics/5269


Version 5.92. Tagged as 'Kernel-5_92'

Detail:
  s/NewReset - In Kernel-5_89, the initial OS_ResyncTime call was erroneously moved to after Service_PostInit, which had the side-effect of causing TerritoryManager's initial evaluation of AutoDST rules to be performed using an uninitialised RTC, with varying side effects depending on the user's timezone (e.g. UK stuck in DST all year round due to lack of BST in 1970). Move the call back to its original location so that TerritoryManager and any other PostInit claimants can see the correct time.
Admin:
  Tested in Iyonix ROM
  Resolves ticket #441


Version 5.91. Tagged as 'Kernel-5_91'

Detail:
  s/MemInfo, hdr/KernelWS - Rather than peeking L2PT to determine if the compatibility page is enabled, use a workspace var to track its state. This ensures we won't get confused if other software decides to map something of its own to &0.
  s/NewReset - Ensure the CompatibilityPageEnabled flag is initialised correctly
Admin:
  Tested in Iyonix ROM softload


Version 5.90. Tagged as 'Kernel-5_90'

Version 5.89, 4.129.2.6. Tagged as 'Kernel-5_89-4_129_2_6'

Detail:
  To make it easier to support arbitrary complexity keyboard controllers (eg. USB via DWCDriver on the Pi) have the kernel do the early keyboard recovery key press detection instead of the HAL.
  During the first pass those modules used for reading the keyboard are started, ignoring the CMOS frugal bits.
  The keyboard is then scanned for 3s, during which time the RAM is cleared (unless the HAL indicated it has already been done).
  During the second pass the remaining modules are started respecting the CMOS frugal bits. Any which were already started in the first pass are inserted into the new chain, so the keyboard is reset once and only once.

  Boot times, with a 300cs key scan time in NewReset.
  Risc PC with 160MB RAM (128+32+0).
  Times from turning on power to initial "beep", using a stopwatch.
                RISC OS 3.70 RISC OS 5.22 This OS
  ARM610        12.5         10.4         10.3
  ARM710        11.8         10.2         9.7
  StrongARM 233 11.1         9.5          8.4

  In NewReset.s:
  Remove old KbdScan code (leave Reset_IRQ_Handler for IIC only)
  If HAL_KbdScanDependencies returns a null string then present KbdDone flag and skip to full init.
  A few vestiges of soft resets removed.
  Do RAM clear when waiting for INKEY (being careful not to trash the running modules...).
  Clearing just the freepool on a 2GB Titanium cleared 7EFD6 pages (99.2%).

  In ModHand.s:
  2nd pass need to sneaky renumber the nodes (so *ROMModules is in the right order, frugal bits line up) without resetting the chain

  In HAL.s:
  Change ClearPhysRAM to ClearWkspRAM, such that it only clears the kernel workspace rather than all RAM. The bulk of the RAM is cleared during the keyboard scan by new function ClearFreePoolSection.
  Add a variant of Init_MapInRAM which clears the mapped in RAM too (as these very early claims will not be in the free pool when the RAM is cleared later).
  Remove HAL keyboard scan setup & IRQ handler.
  Fix bug in HALDebugHexTX2, the input value needs pre-shifting by 16b before continuing.

  In GetAll.s, PMF/osbyte.s:
  Use Hdr:Countries and Hdr:OsBytes for constants.

  In PMF/key.s, PMF/osinit.s:
  Relocate the key post init from PostInit to KeyPostInit.
  Changed PostInit to not tail call KeyPostInit so they can be called independently.

  In hdr/KernelWs:
  Improve comments, add InitWsStart label to refer to.

  In hdr/HALEntries:
  Add HAL_KbdScanDependencies.
  Delete KbdFlag exports.
  Took the opportunity to reorder some of the higher numbered HAL entries and re-grouping, specifically (112,120) (84,106,108,117).
Admin:
  Tested on an ARM6/ARM7/SA Risc PC, BeagleBoard xM, Iyonix, Pandaboard ES, Wandboard Quad, IPEGv5, Titanium, Pi 2 and 3.
  Requires corresponding HAL change.
  Submission for USB bounty.

Version 5.89. Tagged as 'Kernel-5_89'

Detail:
  Return the calculated checksum from MakeChecksum, like the comment says.
Admin:
  Spotted during code review (not tagged).

Detail:
  s/ExtraSWIs - Fix global OS_SynchroniseCodeAreas using the wrong appspace size; would have resulted in appspace only being partially synced if some pages were mapped out due to lazy swapping
  s/ARMops, s/ExtraSWIs, s/MemMap2 - Simplify code by making DCache_LineLen / ICache_LineLen store the actual line length values on ARMv7+ instead of the log2 values. Optimise SMP I-cache invalidation by allowing it to do a global invalidate. Ensure all ARMv7+ range checks use LO instead of NE, to avoid any problems with mismatched I/D line lengths (can't be sure the op range was rounded to the larger of the two)
Admin:
  Tested on iMX6


Version 5.88, 4.129.2.5. Tagged as 'Kernel-5_88-4_129_2_5'

Version 5.88, 4.129.2.4. Tagged as 'Kernel-5_88-4_129_2_4'

OS_ConvertVariform 15 outputs 128b numbers per RFC4122.

Version 5.88. Tagged as 'Kernel-5_88'

Version 5.87. Not tagged

Detail:
  When HiProcVecs is enabled, there will now be a read-only page located at &0 in order to ease compatibility with buggy software which reads from null pointers
  Although most of the page is zero-filled, the start of the page contains a few words which are invalid pointers, discouraging dereferencing them, and a warning message if the memory is interpreted as a string.
  On ARMv6+ the page is also made non-executable, to deal with branch-through-zero type situations
  OS_Memory 20 has been introduced as a way of determining whether the compatibility page is present, and also to enable/disable it
  File changes:
  - hdr/Options - Add CompatibilityPage option
  - hdr/OSMem - Declare OS_Memory reason code 20
  - hdr/KernelWS - When CompatibilityPage is enabled, make sure nothing else is located at &0
  - s/NewReset - Enable compatibility page just before Service_PostInit (try and keep zero-tolerance policy for null pointer dereferencing during ROM init)
  - s/MemInfo - OS_Memory 20 implementation. Add knowledge of the compatibility page to OS_Memory 16 and 24.
Admin:
  Tested on BB-xM


Version 5.87. Tagged as 'Kernel-5_87'

Add OS_Memory 19, which is intended to replace the OS_Memory 0 "make uncacheable" feature, when used for DMA

Detail:
  Making pages uncacheable to allow them to be used with DMA can be troublesome for a number of reasons:
  * Many processors ignore cache hits for non-cacheable pages, so to avoid breaking any IRQ handlers the page table manipulation + cache maintenance must be performed with IRQs disabled, impacting the IRQ latency of the system
  * Some processors don't support LDREX/STREX to non-cacheable pages
  * In SMP setups it may be necessary to temporarily park the other cores somewhere safe, or perform some other explicit synchronisation to make sure they all have consistent views of the cache/TLB
  The above issues are most likely to cause problems when the page is shared by multiple programs; a DMA operation which targets one part of a page could impact the programs which are using the other parts.
  To combat these problems, OS_Memory 19 is being introduced, which allows DMA cache coherency/address translation to be performed without altering the attributes of the pages.
  Files changed:
  - hdr/OSMem - Add definitions for OS_Memory 19
  - s/MemInfo - Add OS_Memory 19 implementation
Admin:
  Tested on Raspberry Pi 3, iMx6


Version 5.86, 4.129.2.3. Tagged as 'Kernel-5_86-4_129_2_3'

Detail:
  This commit lays some of the groundwork for SMP support within the HAL, kernel, and OS.
  Makefile, hdr/HALDevice, hdr/DBellDevice - Add definitions for a doorbell HAL device, to allow CPU cores to signal each other via interrupts
  hdr/HALEntries - Repurpose HAL_Matrix and HAL_Touchscreen entry points for new SMP-related entry points. Add a couple of IRQ-related definitions.
  hdr/KernelWS - Boost MaxInterrupts to 256
  hdr/Options - Add new SMP build switch to control whether the kernel is built in SMP-friendly mode or not. SMP-friendly kernels should still run on single-core machines, but may behave slightly differently.
  s/ARMops - Make as many ARMops SMP-safe as possible, relying on hardware support for broadcasting of cache/TLB maintenance operations
  s/ExtraSWIs - Make SMP-friendly full OS_SynchroniseCodeAreas only sync application space and the RMA (full-cache IMB not really possible with SMP)
  s/NewIRQs - Update IRQ despatcher comments to (hopefully) reflect reality
  Docs/SMP/HAL, Docs/SMP/IRQ - Add documentation covering the new HAL calls and IRQ behaviour
Admin:
  Tested on Raspberry Pi 2, 3, OMAP4, iMX6


Version 5.86, 4.129.2.2. Tagged as 'Kernel-5_86-4_129_2_2'

Detail:
  hdr/EtherDevice: Merge in Kernel-5_86 to keep branch up-to-date with MAIN
Admin:
  Untested


Version 5.86, 4.129.2.1. Tagged as 'Kernel-5_86-4_129_2_1'

Detail:
Admin:
  tested on iMx6 revD1 and revC2

Version 5.86. Tagged as 'Kernel-5_86'

Detail:
Admin:
  tested on iMx6 revD1 and revC2

Version 5.86. Tagged as 'Kernel-5_86'

Detail:
  Prior to ScreenModes starting (when CurrentMonitorType becaomes 7) this SWI would return Auto as 31 for EDID rather than -1, as would be the case had ReadMultiField been called.
  Change to use -1 for consistency and so it gets translated to type 3 (VGA).
Admin:
  Submission from Willi Theiss.

Version 5.85. Tagged as 'Kernel-5_85'