Commit 558118ac authored by Jeffrey Lee's avatar Jeffrey Lee

Merge in latest changes from main branch

Version 6.05, 4.129.2.8. Tagged as 'Kernel-6_05-4_129_2_8'
parents 521ac671 e23d83e6
......@@ -31,9 +31,9 @@ KERNEL_MODULE = bin${SEP}${COMPONENT}
ASFLAGS += -PD "FreezeDevRel SETL {${FREEZE_DEV_REL}}"
CUSTOMROM = custom
CUSTOMEXP = custom
CUSTOMSA = custom
EXPORTS = ${EXP_HDR}.DBellDevice \
${EXP_HDR}.EnvNumbers \
${EXP_HDR}.EtherDevice \
${EXP_HDR}.HALDevice \
${EXP_HDR}.HALEntries \
${EXP_HDR}.ModHand \
......@@ -60,8 +60,6 @@ EXPORTS = ${EXP_HDR}.DBellDevice \
${C_EXP_HDR}.VduExt \
${C_EXP_HDR}.VIDCList
CUSTOMSA=custom
include StdTools
include AAsmModule
......@@ -103,15 +101,9 @@ export: ${EXPORTS}
${EXP_HDR}.EnvNumbers: hdr.EnvNumbers
${CP} hdr.EnvNumbers $@ ${CPFLAGS}
${EXP_HDR}.SPIDevice: hdr.SPIDevice
${CP} hdr.SPIDevice $@ ${CPFLAGS}
${EXP_HDR}.DBellDevice: hdr.DBellDevice
${CP} hdr.DBellDevice $@ ${CPFLAGS}
${EXP_HDR}.EtherDevice: hdr.EtherDevice
${CP} hdr.EtherDevice $@ ${CPFLAGS}
${EXP_HDR}.HALDevice: hdr.HALDevice
${CP} hdr.HALDevice $@ ${CPFLAGS}
......
......@@ -10,14 +10,14 @@
OSVersionID SETA &AA
Version SETA 523
VString SETS "5.23"
Version SETA 525
VString SETS "5.25"
SystemName SETS "RISC OS"
[ (Version :AND: 1) = 1
Date SETS Module_Date ; Odd-numbered (i.e. development) build, use
; date of last source check in
|
Date SETS "13 Apr 2015" ; version for RISC OS on desktop computers
Date SETS "16 Apr 2018" ; version for RISC OS on desktop computers
; Desktop and Switcher use this via OS_Byte 0
]
......
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.97"
Module_Version SETA 597
Module_MinorVersion SETS "4.129.2.7"
Module_Date SETS "16 Feb 2018"
Module_ApplicationDate SETS "16-Feb-18"
Module_MajorVersion SETS "6.05"
Module_Version SETA 605
Module_MinorVersion SETS "4.129.2.8"
Module_Date SETS "14 May 2018"
Module_ApplicationDate SETS "14-May-18"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.97 (4.129.2.7)"
Module_HelpVersion SETS "5.97 (16 Feb 2018) 4.129.2.7"
Module_FullVersion SETS "6.05 (4.129.2.8)"
Module_HelpVersion SETS "6.05 (14 May 2018) 4.129.2.8"
END
/* (5.97)
/* (6.05)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 5.97
#define Module_MinorVersion_CMHG 4.129.2.7
#define Module_Date_CMHG 16 Feb 2018
#define Module_MajorVersion_CMHG 6.05
#define Module_MinorVersion_CMHG 4.129.2.8
#define Module_Date_CMHG 14 May 2018
#define Module_MajorVersion "5.97"
#define Module_Version 597
#define Module_MinorVersion "4.129.2.7"
#define Module_Date "16 Feb 2018"
#define Module_MajorVersion "6.05"
#define Module_Version 605
#define Module_MinorVersion "4.129.2.8"
#define Module_Date "14 May 2018"
#define Module_ApplicationDate "16-Feb-18"
#define Module_ApplicationDate "14-May-18"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
#define Module_FullVersion "5.97 (4.129.2.7)"
#define Module_HelpVersion "5.97 (16 Feb 2018) 4.129.2.7"
#define Module_LibraryVersionInfo "5:97"
#define Module_FullVersion "6.05 (4.129.2.8)"
#define Module_HelpVersion "6.05 (14 May 2018) 4.129.2.8"
#define Module_LibraryVersionInfo "6:5"
; Copyright 2015 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
[ :LNOT: :DEF: __HAL_ENETDevice_HDR__
GBLL __HAL_ENETDevice_HDR__
; Define a HAL device to let the HAL pass addresses to modules
GET Hdr:HALDevice
^ 0
HALDevice_ENET # HALDeviceSize
; Additional device fields
HALDevice_ENET_Phy_Device # 4 ; Phy IRQ number
HALDevice_ENET_Phy_IRQ_En # 4 ; IRQ enable/disable
HALDevice_ENET_Phy_IRQ_Test # 4 ; phy irqbit test
HALDevice_ENET_Phy_IRQ_Clear # 4 ; phy irqbit clear
; the next 2 are exported explicitly to permit quick test of phy interrupt
HALDevice_ENET_Phy_IRQTAddr # 4 ; phy irq test address
HALDevice_ENET_Phy_IRQTMask # 4 ; phy irq test active bit mask
HALDevice_ENETSpecificField # 4
HALDevice_ENETClock # 4
HALDevice_ENET_PhyPwrRst # 4 ; Phy power and reset control
HALDevice_ENET_Size * :INDEX: @
] ; __HAL_ENETDevice_HDR__
END
......@@ -166,6 +166,7 @@ HALDeviceID_RTC_TPS65950 # 1
HALDeviceID_RTC_TWL6030 # 1
HALDeviceID_RTC_DS1307 # 1
HALDeviceID_RTC_PCF8583 # 1
HALDeviceID_RTC_PCF8523 # 1
^ 0
HALDeviceID_CPUClk_OMAP3 # 1
......
......@@ -1393,7 +1393,7 @@ VecPtrTab # NVECTORS * 4
ExceptionDump # 4
OldGeneralMOSBuffer # 256+4 ;spare
# 68 ; spare
[ :DEF: ShowWS
! 0,"16 ":CC::STR:@
......@@ -1722,15 +1722,18 @@ BranchToSWIExit |#| 4
SvcTable |#| &400
GBLA SWIDespatch_Size
SWIDespatch_Size SETA 38*4
[ SupportARMT
[ ZeroPage = 0
SWIDespatch_Size * 41*4
|
SWIDespatch_Size * 42*4
]
|
SWIDespatch_Size * 39*4 ; can save 2 instructions if no Thumb
SWIDespatch_Size SETA SWIDespatch_Size + 2*4
]
[ ZeroPage <> 0
SWIDespatch_Size SETA SWIDespatch_Size + 4
]
[ CheckErrorBlocks
SWIDespatch_Size SETA SWIDespatch_Size + 4
]
SWIDespatch |#| SWIDespatch_Size
......
......@@ -192,6 +192,9 @@ SMP SETL (MEMM_Type = "VMSAv6") :LAND: {TRUE} ; Enable SMP-relate
GBLL UseNewFX0Error
UseNewFX0Error SETL ((Version :AND: 1) = 1) ; Whether *FX 0 should show the ROM link date instead of the UtilityModule date
GBLL CheckErrorBlocks
CheckErrorBlocks SETL {FALSE} ; Attempt to check whether error blocks are valid (in addition to the error pointer checks)
GBLS GetMessages
[ International
GetMessages SETS "GET s.MsgCode"
......
......@@ -271,13 +271,9 @@ PointerV * &26 ; for mouse drivers
TimeShareV * &27 ; SkyNet TimeShare
GraphicsV * &2A ; indirection of graphics system from Kernel
UnthreadV * &2B ; high-priority callbacks
SeriousErrorV * &2C ; an exception occurred which could only be handled by flattening the privileged mode stacks
SeriousErrorV * &2D ; an exception occurred which could only be handled by flattening the privileged mode stacks
SpareVector3 * &2D
SpareVector2 * &2E
SpareVector1 * &2F
NVECTORS * SpareVector1 + 1 ; There are this many vectors, 0..NVECTORS-1
NVECTORS * 96 ; There are this many vectors, 0..NVECTORS-1
; Buffer indices
......@@ -342,8 +338,8 @@ Event_PRISM * 32 ; State change events from the PRISM subsystem
; Subreason codes for Event_Expansion - to be passed in R1 on the event call
^ 0
Event_Expansion_SmartCard # 0 ; ANC Rich Buckley
Event_Expansion_SCInterface # 1 ; 1 more useful alias for above
Event_Expansion_SCTransport # 1 ; 2
Event_Expansion_SCInterface # 1 ; 0 more useful alias for above
Event_Expansion_SCTransport # 1 ; 1
; Subreason codes for Event_Internet - to be passed in R1 on the event call
^ 1
......
......@@ -587,12 +587,58 @@ defaultvectab
& 0, 0, NaffVector ; &29
& 0, ZeroPage+VduDriverWorkSpace, MOSGraphicsV ; GraphicsV * &2a
& 0, 0, NaffVector ; UnthreadV * &2b
& 0, 0, NaffVector ; SeriousErrorV * &2c
; the spares
& 0, 0, NaffVector ; &2d
& 0, 0, NaffVector ; &2c
& 0, 0, NaffVector ; SeriousErrorV * &2d
& 0, 0, NaffVector ; &2e
& 0, 0, NaffVector ; &2f
& 0, 0, NaffVector ; &30
& 0, 0, NaffVector ; &31
& 0, 0, NaffVector ; &32
& 0, 0, NaffVector ; &33
& 0, 0, NaffVector ; &34
& 0, 0, NaffVector ; &35
& 0, 0, NaffVector ; &36
& 0, 0, NaffVector ; &37
& 0, 0, NaffVector ; &38
& 0, 0, NaffVector ; &39
& 0, 0, NaffVector ; &3A
& 0, 0, NaffVector ; &3B
& 0, 0, NaffVector ; &3C
& 0, 0, NaffVector ; &3D
& 0, 0, NaffVector ; &3E
& 0, 0, NaffVector ; &3F
& 0, 0, NaffVector ; &40
& 0, 0, NaffVector ; &41
& 0, 0, NaffVector ; &42
& 0, 0, NaffVector ; &43
& 0, 0, NaffVector ; &44
& 0, 0, NaffVector ; &45
& 0, 0, NaffVector ; &46
& 0, 0, NaffVector ; &47
& 0, 0, NaffVector ; &48
& 0, 0, NaffVector ; &49
& 0, 0, NaffVector ; &4A
& 0, 0, NaffVector ; &4B
& 0, 0, NaffVector ; &4C
& 0, 0, NaffVector ; &4D
& 0, 0, NaffVector ; &4E
& 0, 0, NaffVector ; &4F
& 0, 0, NaffVector ; &50
& 0, 0, NaffVector ; &51
& 0, 0, NaffVector ; &52
& 0, 0, NaffVector ; &53
& 0, 0, NaffVector ; &54
& 0, 0, NaffVector ; &55
& 0, 0, NaffVector ; &56
& 0, 0, NaffVector ; &57
& 0, 0, NaffVector ; &58
& 0, 0, NaffVector ; &59
& 0, 0, NaffVector ; &5A
& 0, 0, NaffVector ; &5B
& 0, 0, NaffVector ; &5C
& 0, 0, NaffVector ; &5D
& 0, 0, NaffVector ; &5E
& 0, 0, NaffVector ; &5F
assert (.-defaultvectab) = NVECTORS*VecNodeSize
......
......@@ -632,7 +632,7 @@ PageFlags_Required * 1 :SHL: 21 ; physical pa
;
PageFlags_Unsafe * 1 :SHL: 31 ; skip cache/TLB maintenance in BangCamUpdate. flag not saved to CAM map.
; Mask to convert DANode_Flags to page flags
; Mask to convert DANode_Flags to page flags (i.e. flags that are common between the two)
DynAreaFlags_AccessMask * DynAreaFlags_APBits :OR: DynAreaFlags_NotBufferable :OR: DynAreaFlags_NotCacheable :OR: DynAreaFlags_DoublyMapped :OR: DynAreaFlags_CPBits :OR: DynAreaFlags_PMP
; PMP LogOp can specify these flags
DynAreaFlags_PMPLogOpAccessMask * (DynAreaFlags_AccessMask :OR: PageFlags_Unavailable) :AND: :NOT: (DynAreaFlags_DoublyMapped :OR: DynAreaFlags_PMP)
......@@ -2516,6 +2516,7 @@ DynArea_PMP_PhysOp ROUT
MOV r0, #-1
STR r0, [r1]
; Add to our PMP
59
STR r5, [r8, r4, LSL #2]
ADD r5, r7, r5, LSL #CAM_EntrySizeLog2
LDR r0, [r10, #DANode_Flags] ; Use default DA flags, modified by flags given in page list
......@@ -2561,11 +2562,22 @@ DynArea_PMP_PhysOp ROUT
STR r0, [sp, #DANode_Size]
MOV r0, #4096
STR r0, [sp, #DANode_MaxSize]
LDR r0, [sp, #DANode_Flags] ; Use default DA flags, modified by flags given in page list
LDR lr, =DynAreaFlags_AccessMask :AND: :NOT: DynAreaFlags_PMPPhysOpAccessMask
AND r0, r0, lr
ORR r0, r0, r6
; Because we're claiming the page via a Batcall, we need to make sure that the DA flags used for the call are valid as DA flags - i.e. don't touch any pageflags-only flags, because they might overlap the DA flags.
; Once the page is ours we'll fix up the other flags to be as the user requested.
[ (DynAreaFlags_AccessMask :AND: DynAreaFlags_PMPPhysOpAccessMask) <> 0
LDR r0, [sp, #DANode_Flags]
[ PMPDebug
DebugReg r0, "Area flags: "
]
LDR lr, =DynAreaFlags_AccessMask :AND: DynAreaFlags_PMPPhysOpAccessMask
BIC r0, r0, lr
AND lr, r6, lr
ORR r0, r0, lr
[ PMPDebug
DebugReg r0, "Batcall flags: "
]
STR r0, [sp, #DANode_Flags]
]
; Replace handler routine with our own
STR r5, [sp, #DANode_Workspace] ; Required page number is handler param
ADR r0, PMPGrowHandler
......@@ -2582,16 +2594,7 @@ DynArea_PMP_PhysOp ROUT
ADD sp, sp, #DANode_NodeSize
BVS %FT99
; Everything went OK, remember the new page as being ours
STR r5, [r8, r4, LSL #2]
ADD r5, r7, r5, LSL #CAM_EntrySizeLog2
STR r10, [r5, #CAM_PMP]
STR r4, [r5, #CAM_PMPIndex]
[ PMPDebug
LDR r5, [r5, #CAM_PageFlags]
DebugReg r5, "Claimed with flags: "
]
ADD r12, r12, #1
B %BT50
B %BT59
80
BL PMPMemoryMoved
......@@ -2705,7 +2708,7 @@ PMPMemoryMoved ROUT
PMPGrowHandler ROUT
TEQ r0, #0
TEQ r0, #DAHandler_PreGrow
STREQ r12, [r1]
MOV pc, lr
......
......@@ -484,8 +484,12 @@ SWIReturnWithCallBackFlag * {PC}-SWIRelocation
BLO BadErrPtr + SWIRelocation
TST r0, #3
LDREQ r10, [r0] ; If we crash here, R12 will be the SWI number that returned the bad pointer (better than crashing later with no clue what SWI caused the problem)
[ CheckErrorBlocks
TSTEQ r10, #&7f :SHL: 24 ; Check reserved bits in error number
BNE BadErrPtr2 + SWIRelocation
|
BNE BadErrPtr + SWIRelocation
]
BadErrPtrReturn * {PC}-SWIRelocation
TST r12, #Auto_Error_SWI_bit
BNE callback_checking + SWIRelocation ; we need to do this for X errors even if the callback flags
......@@ -723,6 +727,7 @@ VSet_GenerateError ROUT
LDRB r11, [r10, #CallBack_Flag]
B SWIReturnWithCallBackFlag
[ CheckErrorBlocks
; In: r10-r12 stacked
; r0 = error pointer
; r10 = error number (maybe)
......@@ -767,6 +772,7 @@ BadErrPtr2
LDR r10, =XMessageTrans_ErrorLookup
TEQ r10, r12
BEQ BadErrPtrReturn
] ; CheckErrorBlocks
; In: r10-r12 stacked
; r11 = CallBack_Flag
; r12 = SWI number
......
......@@ -632,13 +632,20 @@ DumpyTheRegisters ROUT
]
BEQ UNDEF2
MRS R3, CPSR
AND R3, R3, #&0F
ORR R2, R1, #I32_bit :OR: F32_bit
BIC R2, R2, #T32_bit
MSR CPSR_c, R2 ; change into original mode
STMIA R0, {R8-R12} ; save the banked registers
AND R2, R1, #&0F
STR SP, [R0, #5*4]
CMP R2, R3 ; did abort come from our abort-handling mode?
MOV R3, SP
ADDEQ R3, R3, #17*4 ; adjust stored SP if so
LDREQ R14, =&DEADDEAD ; and mark R14 as corrupt
STR R3, [R0, #5*4]
EORS R2, R2, #FIQ_mode ; Was we in FIQ ? Zero if so
STR R14, [R0, #6*4]
......
......@@ -651,12 +651,10 @@ OfferPostKeyStatusUpCall
;
; Centisecond tick routine
;
; out: R12 corrupted
CentiSecondTick ROUT
Push "R11, R14"
LDR R11, =ZeroPage+KeyWorkSpace
MOV R12, #IOC
LDR R0, InkeyCounter
SUBS R0, R0, #1 ; decrement
......@@ -763,7 +761,6 @@ PowerDownMagic
;
; in: R1 = 2 if first press; 3 if repetition
; R2 = key number
; R12 -> IOC
;
GenerateChar ROUT
......
......@@ -78,7 +78,6 @@ MouseButtonChange ROUT
MOV R0, #Event_Mouse
BL OSEVEN
MOV WsPtr, #IOC
; Use buffer manager's 'block insert' function
......
......@@ -806,7 +806,6 @@ Osbyte75
; Reflect Keyboard Status In LEDs
Osbyte76
LDR R11, =ZeroPage+KeyWorkSpace
MOV R12, #IOC
BL UpdateLEDs
MyOsbyte
......
......@@ -275,6 +275,8 @@ ReadCMOSDefaults
ORRNE R1, R1, #KBStat_NoNumLock
BICEQ R1, R1, #KBStat_NoNumLock
STRB R1, KeyBdStatus
LDR R11, =ZeroPage+KeyWorkSpace
BL UpdateLEDs
MOV R0, #SystemSpeedCMOS
BL Read
......@@ -424,7 +426,7 @@ ByteVarInitTable
= &00 ; ESCBREAK # 1 ; &C8 (200)
;
= &00 ; KeyBdDisable # 1 ; &C9
= &30 ; KeyBdStatus # 1 ; &CA
= &34 ; KeyBdStatus # 1 ; &CA
;
= &11 ; RS423HandShake # 1 ; &CB
= &00 ; RS423InputSupr # 1 ; &CC
......
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