Commit 5eecd7d5 authored by Jeffrey Lee's avatar Jeffrey Lee

Merge latest changes from HEAD

Version 6.08, 4.129.2.9. Tagged as 'Kernel-6_08-4_129_2_9'
parents 558118ac 526764e1
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "6.05"
Module_Version SETA 605
Module_MinorVersion SETS "4.129.2.8"
Module_Date SETS "14 May 2018"
Module_ApplicationDate SETS "14-May-18"
Module_MajorVersion SETS "6.08"
Module_Version SETA 608
Module_MinorVersion SETS "4.129.2.9"
Module_Date SETS "07 Jul 2018"
Module_ApplicationDate SETS "07-Jul-18"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
Module_FullVersion SETS "6.05 (4.129.2.8)"
Module_HelpVersion SETS "6.05 (14 May 2018) 4.129.2.8"
Module_FullVersion SETS "6.08 (4.129.2.9)"
Module_HelpVersion SETS "6.08 (07 Jul 2018) 4.129.2.9"
END
/* (6.05)
/* (6.08)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 6.05
#define Module_MinorVersion_CMHG 4.129.2.8
#define Module_Date_CMHG 14 May 2018
#define Module_MajorVersion_CMHG 6.08
#define Module_MinorVersion_CMHG 4.129.2.9
#define Module_Date_CMHG 07 Jul 2018
#define Module_MajorVersion "6.05"
#define Module_Version 605
#define Module_MinorVersion "4.129.2.8"
#define Module_Date "14 May 2018"
#define Module_MajorVersion "6.08"
#define Module_Version 608
#define Module_MinorVersion "4.129.2.9"
#define Module_Date "07 Jul 2018"
#define Module_ApplicationDate "14-May-18"
#define Module_ApplicationDate "07-Jul-18"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
#define Module_FullVersion "6.05 (4.129.2.8)"
#define Module_HelpVersion "6.05 (14 May 2018) 4.129.2.8"
#define Module_LibraryVersionInfo "6:5"
#define Module_FullVersion "6.08 (4.129.2.9)"
#define Module_HelpVersion "6.08 (07 Jul 2018) 4.129.2.9"
#define Module_LibraryVersionInfo "6:8"
......@@ -47,6 +47,7 @@ VduExt_XWindLimit # 1
VduExt_YWindLimit # 1
NumModeVars # 0
VduExt_MinScreenBanks # 1 ; n.b. the kernel doesn't support this var yet (but other components do)
^ &80
VduExt_GWLCol # 1
......@@ -136,6 +137,10 @@ ModeFlag_DataFormatSub_RGB * 4:SHL:12 ; 0=&xBGR, 1=&xRGB
ModeFlag_DataFormatSub_Alpha * 8:SHL:12 ; 0=transfer/supremacy, 1=alpha
ModeFlag_DataFormatSub_Video * 4:SHL:12 ; 0=full range, 1=video range
ModeFlag_DataFormatSub_709 * 8:SHL:12 ; 0=ITU-R BT.601, 1=ITU-R BT.709
ModeFlag_Transform_Mask * 7:SHL:16
ModeFlag_Transform_Rotate90 * 1:SHL:16
ModeFlag_Transform_Rotate180 * 2:SHL:16
ModeFlag_Transform_VFlip * 4:SHL:16
; Invalid GraphicsV driver number
......
......@@ -4593,7 +4593,7 @@ InitAppSpaceTable
& ChangeDyn_AplSpace
& 0 ; base address
& AreaFlags_AppSpace
& 0 ; size will be set up later
& 32*1024 ; true size will be set up later
& AplWorkMaxSize
& 0 ; no workspace needed
& 0 ; no handler needed
......
......@@ -68,7 +68,8 @@ TranslateError_UseR4
MOV R5,#0
MOV R6,#0
MOV R7,#0
MOV R1,#-1 ; We are looking up an error, don't bother
MOV R1,#-1
LDR LR, =ZeroPage ; We are looking up an error, don't bother
STRB R1, [LR, #ErrorSemaphore] ; translating other errors.
[ CacheCommonErrors
......
......@@ -55,52 +55,6 @@ GetConfiguredSize Entry "r1"
MOV r2, r2, LSL r1 ; and shifted up accordingly
EXIT
; FudgeSomeAppSpace - move pages from free pool to application space
; r0 = number of pages to attempt to move
; r1 = where to store number of bytes moved
; r3 = base address of where to put memory
; r11 = ap + CB
FudgeSomeAppSpace
Push "lr"
LDR R10, =ZeroPage
LDR R10, [R10, #Page_Size]
MUL R0, R10, R0 ; get size in bytes
MOV R5, #0 ; amount moved
CMP R0, #0
BEQ NoMoreMemory
LDR r4, =ZeroPage+FreePoolDANode
LDR r7, [r4, #DANode_PMP]
LDR r8, [r4, #DANode_PMPSize]
10
CMP r8, #0 ; if no free memory left
BEQ %FT20 ; then tidy up
SUB r8, r8, #1 ; move free pool pointer backwards
MOV lr, #-1
LDR r2, [r7, r8, LSL #2]
STR lr, [r7, r8, LSL #2]
BL Call_CAM_Mapping
ADD r2, r3, r10 ; end of clear
MOV lr, #0
MOV ip, lr
15
STMIA r3!, {ip,lr} ; advance "to" pointer
STMIA r3!, {ip,lr}
STMIA r3!, {ip,lr}
STMIA r3!, {ip,lr}
TEQ r2, r3
BNE %BT15
ADD r5, r5, r10 ; one more page done
SUBS r0, r0, r10
BNE %BT10
20
STR r8, [r4, #DANode_PMPSize]
NoMoreMemory
STR R5, [R1]
Pull "PC"
; MassageScreenSize - called from screen DA creation and ReadSysInfo
MassageScreenSize ROUT
......@@ -131,7 +85,6 @@ CmosScreenWillDo
LTORG
! 0, "*** DUMMY CONT_Break, soft breaks/resets will not work yet with HAL"
CONT_Break
AddressHAL
MOV a1, #1
......@@ -318,28 +271,25 @@ conversionSWIfill
STR r3, [r7, #ScreenEndAddr]
Pull "r0-r12"
LDR R0, =(512*1024):SHR:12 ; 512k of RAM in aplspace should be plenty for ROM init.
; Theoretically we don't need any at all, but having some there
; should make it easier to debug any ROM init failures.
MOV R3, #AppSpaceStart ; aplwork start
LDR R1, =ZeroPage+AplWorkSize ; aplwork size
MOV r11, #AreaFlags_AppSpace
BL FudgeSomeAppSpace ; put some memory in aplspace
MOV R0, #ChangeDyn_FreePool ; 512k of RAM in AplSpace should be plenty for ROM init.
MOV R1, #512*1024 ; Theoretically we don't need any at all, but having some there
RSB R1, R1, #0 ; should make it easier to debug any ROM init failures.
SWI XOS_ChangeDynamicArea
LDR R1, =ZeroPage
LDR R0, [R1, #AplWorkSize]
STR R0, [R1, #MemLimit]
LDR R0, =ZeroPage
LDR R1, [R0, #AplWorkSize]
ADD R1, R1, #AppSpaceStart
STR R1, [R0, #AplWorkSize]
STR R1, [R0, #MemLimit]
MOV R0, AppSpaceStart
MOV R1, #0
MOV R2, #512*1024
BL memset ; Clear AplSpace
DebugTX "InitVectors"
BL InitVectors ; ready for OsByte to read mode
LDR R1, =ZeroPage+ModuleSWI_HashTab
MOV R2, #ModuleSHT_Entries
[ ZeroPage <> 0
MOV R0, #0
]
clearmswis
SUBS R2, R2, #1
STR R0, [R1, R2, LSL #2]
......@@ -526,7 +476,7 @@ clearmswis
; RMA => not cleared, it's in use
; Screen => not cleared, the next CLS will do that
; and
; Application space (from FudgeSomeAppSpace) => cleared unconditionally
; AplSpace (first 512k) => cleared unconditionally
; Free pool => clear now if HAL didn't
; left to do.
MOV r0, r6
......
......@@ -24,21 +24,16 @@ ExecuteInit ROUT
BYTEWS WsPtr
LDRB R1, LastBREAK ; 0 => soft, 1 => power-on, 2 => hard
CMP R1, #PowerOnReset
ASSERT SoftReset < PowerOnReset
ASSERT PowerOnReset < ControlReset
ADRCC R2, SoftResetVars
LDRB R4, LastBREAK ; 1 => power-on, 2 => hard
CMP R4, #PowerOnReset
ADREQ R2, PowerOnResetVars
ADRHI R2, HardResetVars
ADRNE R2, HardResetVars
LDRCCB R3, NoIgnore ; preserve NoIgnore over soft reset
MOVCS R3, #0 ; if hard or power-on reset, zero it
STRCS R3, TimerAlpha +0 ; and zero both copies of TIME
STRCS R3, TimerAlpha +4
STRCS R3, TimerBeta +0
STRCS R3, TimerBeta +4
MOV R4, R1 ; preserve LastBREAK
MOV R3, #0
STR R3, TimerAlpha +0 ; zero both copies of TIME
STR R3, TimerAlpha +4
STR R3, TimerBeta +0
STR R3, TimerBeta +4
MOV R1, #32 ; default FX11 and FX12
STRB R1, KeyRepDelay
......@@ -54,7 +49,7 @@ ByteVarInitLoop
TEQ R1, R2 ; at end ?
BNE ByteVarInitLoop ; [no, then loop]
STRB R3, NoIgnore ; put NoIgnore back
STRB R3, NoIgnore ; zero NoIgnore
STRB R4, LastBREAK ; put LastBREAK back
; Initialise buffer pointers
......@@ -316,9 +311,6 @@ ReadKeyDefaults
PostInit ROUT
Push R14
BYTEWS WsPtr
LDRB R0, LastBREAK ; get reset type
TEQ R0, #SoftReset
BEQ %FT10 ; [soft reset, skip]
SWI XPortable_ReadFeatures
BVC %FT01
......@@ -332,7 +324,6 @@ PostInit ROUT
AND R1, R1, #(PortableFeature_Speed :OR: PortableFeature_Idle :OR: PortableFeature_Stop)
LDR R0, =ZeroPage
STRB R1, [R0, #PortableFlags]
10
Pull PC
; *****************************************************************************
......
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