- 09 Nov, 1999 1 commit
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Stewart Brodie authored
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- 19 Oct, 1999 1 commit
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Kevin Bracey authored
This has been fixed. In addition, SMC669 and UMC669 chips are reported as a different chip configuration by OS_ReadSysInfo 3 (values 4 and 5 respectively). A few assertions added to catch the remaining cases where the RCMM stuff won't work - those cases will involve a bit more reordering of hardware initialisation. Version 5.00. Tagged as 'Kernel-5_00'
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- 14 Oct, 1999 1 commit
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Kevin Bracey authored
When screen is blanked, DACs are turned off (60mA saving). If DPMS state 3 comes on, sync lines are set low. Version 4.96. Tagged as 'Kernel-4_96'
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- 23 Sep, 1999 1 commit
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Kevin Bracey authored
Added support for ATMEL 4K and 8K EEPROM parts, including write protection of top quarter. Untested. Added support for ARM7500FE IO clock divide by 2. Version 4.89. Tagged as 'Kernel-4_89'
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- 19 Aug, 1999 1 commit
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Kevin Bracey authored
Version 4.84. Tagged as 'Kernel-4_84'
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- 17 Aug, 1999 1 commit
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Kevin Bracey authored
Version 4.83. Tagged as 'Kernel-4_83'
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- 03 Aug, 1999 1 commit
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Kevin Bracey authored
* Integrated Ursula fast service call dispatch code. * Added Interruptible32bitModes from Ursula. * Stopped allowing ROM modules (other than the Kernel/UtilityModule) to write to the hardware vectors in 26-bit mode. Version 4.81. Tagged as 'Kernel-4_81'
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- 07 May, 1999 1 commit
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Kevin Bracey authored
Version 4.79. Tagged as 'Kernel-4_79'
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- 09 Feb, 1999 1 commit
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Neil Turton authored
ROM speed not taken from the Machine header file. POST can now exist in a softloaded OS, since it searches for a zero word in the ROM instead of using one within the POST when trying to communicate with the POST adapter (the zero word must be in ROM). Fixed to build on non-chrontel STB/NC products. Lots of duplicate code merged in MemSize. MemSize copes better with the softload case, and is less willing to use the region the OS occupies as video memory, or page tables. POST is now ON (memory tests disabled). OS_ReadSysInfo 4 now uses the NVRAM module to access the ethernet address in NVRAM/CMOS, so that the availability/location of the MAC address can be changed. CMOS location 0 is now unprotected on STB/NC products to try to stop people poking the hardware directly. Fixed a CMOS resetting problem on STBs where the value expected in a location was different from the value written on a CMOS reset, so the CMOS would be reset every time... Version 4.69. Tagged as 'Kernel-4_69'
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- 30 Sep, 1998 1 commit
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Kevin Bracey authored
Bandwidth limit for 7500FE fixed. RO371Timings flag set to :LNOT:STB Version 4.64. Tagged as 'Kernel-4_64'
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- 21 Jul, 1998 1 commit
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Neil Turton authored
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- 21 Jan, 1997 1 commit
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Neil Turton authored
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- 21 Nov, 1996 1 commit
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Neil Turton authored
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- 06 Nov, 1996 1 commit
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Neil Turton authored
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- 05 Nov, 1996 2 commits
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Neil Turton authored
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Neil Turton authored
Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
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