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Commit 417410eb authored by Neil Turton's avatar Neil Turton
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ROM speed not taken from the Machine header file. POST can now exist in a... 

ROM speed not taken from the Machine header file.  POST can now exist in a softloaded OS, since it searches for a zero word in the ROM instead of using one within the POST when trying to communicate with the POST adapter (the zero word must be in ROM).  Fixed to build on non-chrontel STB/NC products.  Lots of duplicate code merged in

MemSize.  MemSize copes better with the softload case, and is less
willing to use the region the OS occupies as video memory, or
page tables.  POST is now ON (memory tests disabled).
OS_ReadSysInfo 4 now uses the NVRAM module to access the ethernet
address in NVRAM/CMOS, so that the availability/location of the
MAC address can be changed.  CMOS location 0 is now unprotected on
STB/NC products to try to stop people poking the hardware directly.
Fixed a CMOS resetting problem on STBs where the value expected in a
location was different from the value written on a CMOS reset, so the
CMOS would be reset every time...

Version 4.69. Tagged as 'Kernel-4_69'
parent 16db00e8
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Showing with 420 additions and 430 deletions
TestSrc/Begin
View file @ 417410eb
......@@ -707,9 +707,9 @@ ts_Self_test_startup ROUT
LDRB r0, [r2, #IOMD_ROMCR0] ; Get contents of ROMCR0 in to r0
AND r0, r0, #&40 ; clear all but the 16-bit mode flag
[ ROMSpeedNormal
ORR r0, r0, #IOMD_ROMCR_Normal :OR: IOMD_ROMCR_NSTicks_5 :OR: IOMD_ROMCR_BTicks_4
ORR r0, r0, #IOMD_ROMCR_Normal :OR: IOMD_ROMCR_NSTicks_$ROMSpeedNSTicks :OR: IOMD_ROMCR_BTicks_$ROMSpeedBurstTicks
|
ORR r0, r0, #IOMD_ROMCR_HalfSpeed :OR: IOMD_ROMCR_NSTicks_5 :OR: IOMD_ROMCR_BTicks_4
ORR r0, r0, #IOMD_ROMCR_HalfSpeed :OR: IOMD_ROMCR_NSTicks_$ROMSpeedNSTicks :OR: IOMD_ROMCR_BTicks_$ROMSpeedBurstTicks
]
STRB r0, [r2, #IOMD_ROMCR0] ; Prog. the reg.s
[ CanLiveOnROMCard
......@@ -758,9 +758,9 @@ ts_Self_test_startup ROUT
LDRB r0, [r2, #IOMD_ROMCR0] ; Get contents of ROMCR0 in to r0
AND r0, r0, #&40 ; clear all but the 16-bit mode flag
[ ROMSpeedNormal
ORR r0, r0, #IOMD_ROMCR_Normal :OR: IOMD_ROMCR_NSTicks_5 :OR: IOMD_ROMCR_BTicks_4
ORR r0, r0, #IOMD_ROMCR_Normal :OR: IOMD_ROMCR_NSTicks_$ROMSpeed_NSTicks :OR: IOMD_ROMCR_BTicks_$ROMSpeedBurstTicks
|
ORR r0, r0, #IOMD_ROMCR_HalfSpeed :OR: IOMD_ROMCR_NSTicks_5 :OR: IOMD_ROMCR_BTicks_4
ORR r0, r0, #IOMD_ROMCR_HalfSpeed :OR: IOMD_ROMCR_NSTicks_$ROMSpeed_NSTicks :OR: IOMD_ROMCR_BTicks_$ROMSpeedBurstTicks
]
STRB r0, [r2, #IOMD_ROMCR0] ; Prog. the reg.s
[ CanLiveOnROMCard
......@@ -1357,7 +1357,11 @@ Speedset
ALIGN
RAMtest
B ts_VIDCtest ; skip memory test altogether; was ADR r4,%BT1
[ {TRUE}
B ts_VIDCtest ; skip memory test altogether
|
ADR r4,%BT1
]
BL ts_SendText
;
; if (R_MEMSKIP && R_HARD)
......
TestSrc/ExtIO
View file @ 417410eb
......@@ -83,23 +83,6 @@ ts_GetCommand ROUT
;
; Load up the registers for the test interface communication -
;
[ :LNOT: CanLiveOnROMCard
LDR r0,%01 ; set zero in r0
ADD pc,pc,r0 ;(generally useful constant - especially for skip)
01
& 0
LDR r1,%02 ; set FFFFFFFF in r1
ADD pc,pc,r0 ;(test value : sets carry when added to non-zero)
02
& (-1)
LDR r2,%03 ; set pointer to test address
ADD pc,pc,r0 ;(points to aliased copy of a zero word)
03
& (ts_Alias_bits + (%01 - %04))
ADDS r2,pc,r2 ; adjust r2 for ROM-relative address
ADDS r4,r0,r0 ; clear output accumulator
04 ; where pc is when added to r2
|
; Point r2 at a word which contains 0 in 0-8MB physical space.
; Note that this code doesn't cope with the case where it can't find a zero
; word anywhere in the whole ROM. I don't think that this is a problem.
......@@ -114,7 +97,6 @@ ts_GetCommand ROUT
ADD r2, r2, #ts_Alias_bits ; point to zero word in ghost
MOV r1, #-1 ; expected below
04
]
; do an RD operation (four strobes) to ensure interface cleared
LDR r3,[r2]
......@@ -629,23 +611,6 @@ ts_PosText ROUT
;
ts_SendLCDCmd
[ STB :LAND: :LNOT: CanLiveOnROMCard
LDR r0,%01 ; set zero in r0
ADD pc,pc,r0
01
& 0
LDR r1,%02 ; set FFFFFFFF in r1
ADD pc,pc,r0 ;(test value : sets carry when added to non-zero)
02
& (-1)
LDR r2,%03 ; set pointer to test address
ADD pc,pc,r0 ;(points to aliased copy of a zero word)
03
& (ts_Alias_bits + (%01 - %04))
ADDS r2,pc,r2 ; adjust r2 for ROM-relative address
ADDS r0,r0,r0 ; dummy (to keep labels nearby !)
04 ; where pc points when added to r2
|
; Point r2 at a word which contains 0 in 0-8MB physical space.
; If this word still reads as 0 when its ghost/alias is read from 8-16MB space
; (A23 set) then we don't have a test box, otherwise we do.
......@@ -661,7 +626,6 @@ ts_SendLCDCmd
ADD r2, r2, #ts_Alias_bits ; point to zero word in ghost
04
]
; Wait - gap between successive WS attempts or successive bytes
......
VersionASM
View file @ 417410eb
......@@ -5,8 +5,8 @@
GBLA Module_Version
GBLS Module_MinorVersion
GBLS Module_Date
Module_MajorVersion SETS "4.68"
Module_Version SETA 468
Module_MajorVersion SETS "4.69"
Module_Version SETA 469
Module_MinorVersion SETS ""
Module_Date SETS "16 Dec 1998"
Module_Date SETS "09 Feb 1999"
END
VersionNum
View file @ 417410eb
/* (4.68)
/* (4.69)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 4.68
#define Module_MajorVersion_CMHG 4.69
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 16 Dec 1998
#define Module_Date_CMHG 09 Feb 1999
#define Module_MajorVersion "4.68"
#define Module_Version 468
#define Module_MajorVersion "4.69"
#define Module_Version 469
#define Module_MinorVersion ""
#define Module_Date "16 Dec 1998"
#define Module_Date "09 Feb 1999"
hdr/KernelWS
View file @ 417410eb
......@@ -660,7 +660,7 @@ VIDCClockSpeed # 4 ; current VIDC clock speed in kHz
CurrentMonitorType # 4 ; initialised from configured one
[ ChrontelSupport
[ STB
PixelRate # 4 ; Pixel Rate in kHz
]
......
s/ARM600
View file @ 417410eb
This diff is collapsed.
s/GetAll
View file @ 417410eb
......@@ -200,7 +200,7 @@ Module SETL {FALSE}
GBLL IncludeTestSrc ; whether test code is included
! 0, "Modified code"
[ MorrisSupport
IncludeTestSrc SETL {FALSE}
IncludeTestSrc SETL {TRUE}
|
IncludeTestSrc SETL :LNOT: (MEMM_Type = "MEMC2") ; not on internal test versions
]
......@@ -621,6 +621,7 @@ largest_rma_size * (128*1024) ; and the ceiling for rma use
GET Hdr:Wimp
GET Hdr:ColourTran
GET Hdr:Debug
GET Hdr:nvram
GET s.PMF.DEF ; Common with 6502 code in the keyboard
Protocol
......
s/Middle
View file @ 417410eb
......@@ -1313,36 +1313,65 @@ GetMachineAddressCMOS
; r1 = upper 2 bytes (or 0)
; EQ => valid, NE => invalid
;
Push "r2-r5,lr"
MOV r1, #EtherAddrCMOS
MOV r2, #0 ; For lower 4 bytes
MOV r3, #0 ; For upper 2 bytes
MOV r4, #0 ; For checksum
MOV r5, #6 ; Read 6 bytes
01
MOV r0, r1
BL Read
ADD r1, r1, #1 ; Move on to next byte
MOV lr, r2, LSR #24 ; Get top byte of lower word
ORR r3, lr, r3, LSL #8 ; and put it into bottom byte of upper word
ORR r2, r0, r2, LSL #8 ; Put byte read into bottom byte of upper word
ADD r4, r4, r0 ; Add byte to checksum
SUBS r5, r5, #1 ; Any more bytes?
BNE %BT01
Entry "r2,r3", 8 ; Preserve these
ADR r0, NVRAM_TAG_MACAddress ; Read the MAC address
MOV r1, sp
MOV r2, #6
SWI XNVRAM_Read
MOVVS r0, #&ffffffff
TST r0, #&80000000 ; Check for errors
BNE %FT10
ADR r0, NVRAM_TAG_MACAddressChecksum ; Read the checksum
ADD r1, sp, #6
MOV r2, #1
SWI NVRAM_Read
MOVVS r0, #&ffffffff
TST r0, #&80000000 ; Check for errors
10
MOV r0, #0
MOV r1, #0
BNE %FT20 ; Return zero on error
ASSERT EtherCheckCMOS = EtherAddrCMOS+6
MOV r0, r1 ; Read checksum byte
BL Read
AND r4, r4, #&FF ; Bottom byte of checksum
EOR r0, r0, #&FF ; should be inverted in CMOS
TEQ r0, r4
MOVEQ r0, r2 ; Use CMOS values if valid
MOVEQ r1, r3
MOVNE r0, #0 ; otherwise no address.
MOVNE r1, #0
Pull "r2-r5,pc"
]
LDRB r3, [sp, #0] ; Get the first byte into checksum
MOV r1, r3, ASL #8 ; Store into result
LDRB r2, [sp, #1] ; Get the next byte
ADD r3, r3, r2 ; Add to the checksum
ORR r1, r1, r2, ASL #0 ; Store into the result
LDRB r2, [sp, #2] ; Get the next byte
ADD r3, r3, r2 ; Add to the checksum
MOV r0, r2, ASL #24 ; Store into the result
LDRB r2, [sp, #3] ; Get the next byte
ADD r3, r3, r2 ; Add to the checksum
ORR r0, r0, r2, ASL #16 ; Store into the result
LDRB r2, [sp, #4] ; Get the next byte
ADD r3, r3, r2 ; Add to the checksum
ORR r0, r0, r2, ASL #8 ; Store into the result
LDRB r2, [sp, #5] ; Get the next byte
ADD r3, r3, r2 ; Add to the checksum
ORR r0, r0, r2, ASL #0 ; Store into the result
LDRB r2, [sp, #6] ; Get the checksum
AND r3, r3, #&FF
EOR r3, r3, #&FF
TEQ r2, r3 ; Check against the computed value
MOVNE r0, #0 ; Zero the MAC address on failure
MOVNE r1, #0
20
EXITS
NVRAM_TAG_MACAddress
= "MACAddress", 0
NVRAM_TAG_MACAddressChecksum
= "MACAddressChecksum", 0
]
; OS_ReadSysInfo 5
;
......
s/NewReset
View file @ 417410eb
......@@ -968,7 +968,7 @@ reset_loop
MOV R0, #VduCMOS
BL Read
[ IOMD_C_MonitorType = 0 :LAND: MPEGPoduleNTSCNotPALMask = 0
[ IOMD_C_MonitorType = 0 :LAND: MPEGPoduleNTSCNotPALMask = 0 :LAND: IOMD_C_PALNTSCType = 0
; Force TV if we don't have a MonitorType auto-detect bit
TEQ R0, #(Sync_Separate :OR: MonitorType0)
|
......@@ -1232,7 +1232,7 @@ DefaultCMOSTable ; list of non-zero options wanted :
= DBTBCMOS, (1:SHL:4) ; Boot
= YearCMOS, 97
= YearCMOS+1, 19
[ IOMD_C_MonitorType = 0
[ IOMD_C_MonitorType = 0 :LAND: MPEGPoduleNTSCNotPALMask = 0 :LAND: IOMD_C_PALNTSCType = 0
; TV if we don't have a MonitorType auto-detect bit
= VduCMOS, Sync_Separate :OR: MonitorType0
|
......
s/PMF/osinit
View file @ 417410eb
......@@ -20,7 +20,7 @@ ErrorsInR0 SETL Module ; if FALSE, use XOS_GenerateError for
; if TRUE, return error ptr in R0
GBLL ProtectStationID ; if TRUE, disallow OSBYTE &A2,0,n
ProtectStationID SETL {TRUE}
ProtectStationID SETL {TRUE}:LAND::LNOT:STB
; *****************************************************************************
......
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