Commit ec188df3 authored by Kevin Bracey's avatar Kevin Bracey
Browse files

Fixed error in RDCH speed restoring logic.

When screen is blanked, DACs are turned off (60mA saving).
If DPMS state 3 comes on, sync lines are set low.

Version 4.96. Tagged as 'Kernel-4_96'
parent 34480170
......@@ -6,9 +6,9 @@
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
Module_MajorVersion SETS "4.95"
Module_Version SETA 495
Module_MajorVersion SETS "4.96"
Module_Version SETA 496
Module_MinorVersion SETS ""
Module_Date SETS "13 Oct 1999"
Module_FullVersion SETS "4.95"
Module_Date SETS "14 Oct 1999"
Module_FullVersion SETS "4.96"
END
/* (4.95)
/* (4.96)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 4.95
#define Module_MajorVersion_CMHG 4.96
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 13 Oct 1999
#define Module_Date_CMHG 14 Oct 1999
#define Module_MajorVersion "4.95"
#define Module_Version 495
#define Module_MajorVersion "4.96"
#define Module_Version 496
#define Module_MinorVersion ""
#define Module_Date "13 Oct 1999"
#define Module_Date "14 Oct 1999"
#define Module_FullVersion "4.95"
#define Module_FullVersion "4.96"
......@@ -821,11 +821,9 @@ ClipBoxTRow # 4
FgPattern # 4*8 ; foreground pattern as defined by OS_SetColour
BgPattern # 4*8 ; background pattern as defined by OS_SetColour
[ StorkPowerSave
VIDCExternalSoftCopy # 4 ; soft copy of VIDCExternal
VIDCFSynSoftCopy # 4 ; soft copy of VIDCFSyn
VIDCControlSoftCopy # 4 ; soft copy of VIDCControl
]
KernelModeSelector # 4 ; pointer to block in system heap where
; current mode selector is copied
......
......@@ -992,8 +992,13 @@ InkeyTimeout
MOV R0, #&FF ; indicate timeout
SEC ; and set carry
ReturnChar2
[ StorkPowerSave
TST R5, #PowerSave ; NB preserves carry
BLNE RestoreSpeed
|
TEQ R5, #2 ; NB preserves carry
BLEQ RestoreSpeed
]
Pull "R5,R6"
ReturnChar
CLRPSR V_bit, R14
......
......@@ -1175,14 +1175,12 @@ DbgFilename
TubeString r8, r9, r10, " ",cc ; pad out to 10 chars
]
[ StorkPowerSave :LAND: :LNOT: STB
TEQ R6, #VIDCExternal
STREQ R2, [WsPtr, #VIDCExternalSoftCopy]
TEQ R6, #VIDCFSyn
STREQ R2, [WsPtr, #VIDCFSynSoftCopy]
TEQ R6, #VIDCControl
STREQ R2, [WsPtr, #VIDCControlSoftCopy]
]
STR R2, [R3] ; stuff it into VidC
80
......
......@@ -960,10 +960,19 @@ PV_BlankScreen ROUT
TST r0, #1 ; if hsyncs should be off,
LDRNE r1, =HorizSyncWidth + ((1:SHL:14) -1) ; maximum value in h.sync width register
STRNE r1, [r4]
TST r0, #2 ; if vsyncs should be off,
LDRNE r1, =VertiSyncWidth + ((1:SHL:13) -1) ; maximum value in v.sync width register
STRNE r1, [r4]
LDR r1, [WsPtr, #VIDCExternalSoftCopy]
AND r0, r0, #3
TEQ r0, #3 ; if both syncs off
BICEQ r1, r1, #Ext_HSYNCbits :OR: Ext_VSYNCbits
ORREQ r1, r1, #Ext_InvertHSYNC :OR: Ext_InvertVSYNC ; set sync signals to low (less power)
BIC r1, r1, #Ext_DACsOn ; turn off the DACs
STR r1, [r4]
MOV r0, #(0 :SHL: 10) :OR: (3 :SHL: 8) ; blank: video DMA off, continuous refresh
B %FT60
......@@ -971,9 +980,13 @@ PV_BlankScreen ROUT
; unblanking
LDR r1, [WsPtr, #VIDCExternalSoftCopy]
STR r1, [r4] ; restore DACs and sync type
TST r0, #1 ; if hsyncs were turned off,
LDRNE r1, [WsPtr, #HSWRSoftCopy] ; then restore from soft copy
STRNE r1, [r4]
TST r0, #2 ; if vsyncs were turned off,
LDRNE r1, [WsPtr, #VSWRSoftCopy] ; then restore from soft copy
STRNE r1, [r4]
......
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