1. 26 Jun, 2001 1 commit
    • Mike Stephens's avatar
      1) Bring IOMD HAL more up to date. Add support for new call HAL_CleanerSpace... · 63a6ffec
      Mike Stephens authored
      1) Bring IOMD HAL more up to date. Add support for new call HAL_CleanerSpace (preparation for StrongARM kernel support).
      
      2) In kernel, add HAL_CleanerSpace call (preparation for
      StrongARM and XScale core support). Fix bug found with
      ARMv3 support during test on Risc PC.
      
      3) Implement new API for kernel SWIs that have used top
      bits of addresses as flags. The new API has an extra
      flag that must be set, so kernel can distinguish and
      support both APIs. The reason for all this is that
      addresses are 32-bits now, people, keep up there. Briefly:
      
        OS_HeapSort
          bit 31 of r0 set for new API, r1 is full 32-bit address
          flags move from r1 bits 31-29 to r0 bits 30-28
      
        OS_ReadLine
          bit 31 of r1 set for new API, r0 is full 32-bit address
          flags move from bits 31,30 of r0 to bits 30,29 of r1
      
        OS_SubstituteArgs
          bit 31 of r2 set for new API, r0 is full 32-bit address
          flag moves from bit 31 of r0 to bit 30 of r2
      
      Tested on Risc PC and briefly on Customer A 2
      
      Ta
      
      Version 5.35, 4.79.2.41. Tagged as 'Kernel-5_35-4_79_2_41'
      63a6ffec
  2. 18 Jun, 2001 1 commit
    • Mike Stephens's avatar
      Reimplement enhancements to kernel Dynamic Area support from · 3f877936
      Mike Stephens authored
      Ursula. Quite a hairy code merge really, so let's hope it is
      worth it to someone. What you get (back after 2 or 3 years):
      - much more efficient for largish numbers of DAs (relevance
        to current build = approx 0)
      - fancy reason codes to support fast update of
        Switcher bar display (relevance = 0)
      - support for clamped maximum area sizes, to avoid address
        space exhaustion with big memory (relevance = 0)
      - better implementation of shrinkable DAs, performance
        wise (if lots of DAs, relevance = approx 0)
      - support for 'Sparse' DAs. Holey dynamic areas, Batman!
        (relevance, go on someone use the darned things)
      Moderately development tested on HAL/32bit ARM9 desktop.
      Note the Switcher should be compiled to use the new
      reason codes 6&7, for fabled desktop builds.
      
      Also, during this work, so I could see the wood for the
      trees, redid some source code clean up, removing pre-Medusa
      stuff (like I did about 3 years ago on Ursula, sigh). That's
      why loads of source files have changed. The new DA stuff
      is confined pretty much to hdr.KernelWS and s.ChangeDyn.
      
      Ta.
      
      Version 5.35, 4.79.2.38. Tagged as 'Kernel-5_35-4_79_2_38'
      3f877936
  3. 15 Jun, 2001 1 commit
    • Mike Stephens's avatar
      Merge in long command line support from Ursula kernel. · 8727ebaa
      Mike Stephens authored
      Look for LongCommandLine flag, command line size currently
      set at 1k.
      For HAL/32bit builds, the kernel buffer space is at high
      (top bit set) address, which may break some code using signed
      comparisons. So *beware* that there may be some latent
      bugs in old kernel code using these buffers, not yet found.
      One such bug, in s.Arthur2 found and fixed.
      Tested moderately on ARM9 desktop build.
      Lovely to reimplement things I did two and half years ago.
      
      Version 5.35, 4.79.2.37. Tagged as 'Kernel-5_35-4_79_2_37'
      8727ebaa
  4. 13 Jun, 2001 1 commit
  5. 11 Jun, 2001 1 commit
  6. 22 May, 2001 1 commit
    • Mike Stephens's avatar
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done... · bdc4f843
      Mike Stephens authored
      Reimplement Lazy task swapping, an amusing idea from Ursula, would have done it sooner but couldn't be bothered (humour).
      
      Currently activates for all ARMs flagged as base-restored
      abort model. No handling of eg. StrongARM pre-revT bug, but
      then the kernel no longer runs on StrongARM (progress).
      Still some details to fix: all aborts in current app space
      assumed to be missing pages, but this must be fixed to
      handle abort code in app space, things like debuggers
      marking code read only.
      
      Plus, small fixes:
        OS_Memory 8 returns vaguely useful info for RAM,VRAM
        in HAL build (temporary partial implementation)
        Broken handling of old BBC commands with (fx,tv etc)
        with no spaces fixed (fudgeulike code from Ursula,
        now 32-bit).
      
      Version 5.35, 4.79.2.31. Tagged as 'Kernel-5_35-4_79_2_31'
      bdc4f843
  7. 17 May, 2001 1 commit
    • Kevin Bracey's avatar
      * Fixed the IIC code. · 390c26e8
      Kevin Bracey authored
      * Kernel puts sensible default FIQ handler in through the HAL.
      * Fix to temporary page uncaching code.
      
      Version 5.35, 4.79.2.30. Tagged as 'Kernel-5_35-4_79_2_30'
      390c26e8
  8. 01 May, 2001 1 commit
  9. 16 Mar, 2001 1 commit
  10. 08 Mar, 2001 1 commit
    • Kevin Bracey's avatar
      Added some missing IIC and USB files. · 9d13b691
      Kevin Bracey authored
      An attempt to do NVMemory by using part of the Flash that the OS is sitting
      in for Customer L. Programming algorithm works, but I'm not confident that the
      Kernel does the right thing yet.
      
      Version 5.35, 4.79.2.19. Tagged as 'Kernel-5_35-4_79_2_19'
      9d13b691
  11. 07 Mar, 2001 1 commit
  12. 01 Mar, 2001 1 commit
  13. 01 Feb, 2001 1 commit
    • Dan Ellis's avatar
      Addition of HAL UART for Customer L · 69043479
      Dan Ellis authored
      Detail:
        HAL entries have been entered for the Customer L UART (very much like the ARM
      PrimeCell, rather than the 16550).
      Admin:
        It builds.
      
      Version 5.35, 4.79.2.16. Tagged as 'Kernel-5_35-4_79_2_16'
      69043479
  14. 09 Jan, 2001 1 commit
  15. 10 Nov, 2000 2 commits
  16. 20 Oct, 2000 2 commits
  17. 16 Oct, 2000 2 commits
  18. 09 Oct, 2000 1 commit
  19. 05 Oct, 2000 5 commits
  20. 03 Oct, 2000 1 commit
  21. 02 Oct, 2000 1 commit
  22. 15 Sep, 2000 1 commit
    • Kevin Bracey's avatar
      * Converted to building with ObjAsm (but still a single object file using ORG). · 49836a59
      Kevin Bracey authored
      * Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5.
      * Some early prototype HAL bits popped in - a lot of source restructuring still
        to come.
      * New debug target creates an AIF image with debug information, and translates
        this into an ASCII object file for the 16702B logic analyser.
      
      Version 5.35, 4.79.2.1. Tagged as 'Kernel-5_35-4_79_2_1'
      49836a59
  23. 15 Aug, 2000 1 commit
    • Stewart Brodie's avatar
      Fixed minor bug in module initialisation. · efd9b01e
      Stewart Brodie authored
        Added common error cache.
      Detail:
        Fixed module header validation code which was broken in 5.22.  This
          shouldn't have caused much of a problem as it was only a bizarre
          check (SWI chunk looked valid but SWI handler was 0) that would
          have failed - but be reported as a valid set of SWI entries.
        Added common error message cache.  Several common errors (Buffer
          overflow; Number not recognised; Bad vector release; and a couple
          of others) are now cached the first time they are translated into
          a block of memory in the system heap.
      Admin:
        Tested in Ursula build - cacheing only active in Ursula build - change
          HdrSrc if you want it in your products too.
        Requires HdrSrc 0.94
      
      Version 5.31. Tagged as 'Kernel-5_31'
      efd9b01e
  24. 28 Jun, 2000 1 commit
    • Ben Avison's avatar
      Added compile-time support for full-resolution teletext characters in teletext... · e87eeeca
      Ben Avison authored
      Added compile-time support for full-resolution teletext characters in teletext emulation mode (MODE 7) for that authentic BBC Micro feel.
      
        Also introduced a few useful teletext control features via VDU 23,18.
        Unrelatedly, fixed *ScreenLoad to work for interlaced displays.
      
      Detail:
        The new typeface is designed on a 16x20 grid (previously we had used 8x10),
        so it uses a screen resolution of 640x500 pixels (rather than 320x250).
        Since we have been unable to source a genuine teletext font, and since
        examination of a BBC Micro suggests that the genuine font may not have been
        a power-of-2 pixels wide, I have designed one specially, based upon the one
        supplied in Zap distributions (a 12x20 font). Rather than increase the
        amount of workspace that the kernel requires for cacheing graphic
        characters, it now generates them on the fly, as they are required; this
        should only add about 25% to their rendering time.
      
        The new VDU 23 sequences are as follows:
      
        VDU 23,18,0,mode,0,0,0,0,0,0
          Switch transparency mode
            mode = 0: "Text" mode: the whole display is set opaque
            mode = 1: "Mix" mode: foreground colours, and both foreground and
              background of boxed text are opaque; non-boxed background colours are
              all transparent
            mode = 2: "Box" mode: boxed regions are opaque, others are transparent
            mode = 3: "TV" mode: the whole display is set transparent
          Default is mode = 0.
      
        VDU 23,18,1,suspend,0,0,0,0,0,0
          Suspend or resume bitmap updates
          This call allows an application to request that the kernel suspends
          updates to the framebuffer bitmap. This allows for a significant speed
          increase in the rendering time for a large amount of text, for example
          when redrawing a complete teletext page, because each time you plot a
          single character, it can cause the whole of the rest of the line to be
          re-rendered. When you switch out of suspend mode, the whole screen is
          refreshed in a single pass. Note that the appearance of the display is
          undefined is you cause a hardware scroll while in suspend mode.
            suspend = 0: screen update is enabled
            suspend = 1: screen update is suspended
          Default is suspend = 0.
      
        VDU 23,18,2,reveal,0,0,0,0,0,0
          Reveal/conceal
            reveal = 0: characters between the Conceal control code and the next
              colour control code are replaced by spaces
            reveal = 1: all characters are displayed
          Default is reveal = 0.
      
        VDU 23,18,3,black_emable,0,0,0,0,0,0
          Enable/disable black foreground colour control codes
            black_enable = 0: control codes &80 and &90 do nothing
            black_enable = 1: control code &80 selects black text, control code
              &90 selects black graphics
          Default is black_enable = 0.
      
        I have performed some timing tests on the rendering of complete teletext
        pages grabbed from the teletext server. These show that the new code
        generally imposes a 2x speed hit. However, when using the VDU 23,18,1
        suspend function, this improves to a 20% speed increase when compared to
        the old low-resolution code. Better still, because the framebuffer is only
        being updated for the final stage of this process, the screen *appears* to
        be updated some 3x faster than with the old code!
      
        A comment on the VDU variable Log2BPC is in order: in previous kernels,
        this was able unambiguously to refer to both the framebuffer width of a
        character in bytes, and the framebuffer width of an "addressable pixel" in
        bits; this no longer works with the 16-pixel wide teletext font. Bearing
        in mind that future kernels may support Unicode system fonts where the
        width varies from character to character, I have chosen to fix Log2BPC to
        the "addressable pixel" definition.
      
      Admin:
        Requires HdrSrc 0.89 and (for non-desktop builds) Interlace 0.61. A monitor
        definition file containing a definition for a 640x500 screen mode is also
        required; version 0.40 of ModeFiles contains a suitable mode for STB-400.
      
        Tested fairly rigourously on an Ursula build, a Lazarus build and an
        STB-400 build, using genuine teletext pages and Yellow River Kingdom.
      
      Version 5.30. Tagged as 'Kernel-5_30'
      e87eeeca
  25. 17 Apr, 2000 1 commit
  26. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
      Details:
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
      
        The hardest part was the flood-fill...
      
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
      
        Lots of really crusty pre-IOMD code removed.
      
      Admin:
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      
      Version 5.23. Tagged as 'Kernel-5_23'
      b4016e9c
  27. 09 Nov, 1999 1 commit
  28. 19 Oct, 1999 1 commit
    • Kevin Bracey's avatar
      RCMM changes made the Kernel not report the type of I/O chip fitted correctly. · 6142809f
      Kevin Bracey authored
      This has been fixed. In addition, SMC669 and UMC669 chips are reported as
      a different chip configuration by OS_ReadSysInfo 3 (values 4 and 5
      respectively).
      A few assertions added to catch the remaining cases where the RCMM stuff
      won't work - those cases will involve a bit more reordering of hardware
      initialisation.
      
      Version 5.00. Tagged as 'Kernel-5_00'
      6142809f
  29. 14 Oct, 1999 1 commit
  30. 23 Sep, 1999 1 commit
  31. 19 Aug, 1999 1 commit
  32. 17 Aug, 1999 1 commit
  33. 03 Aug, 1999 1 commit
    • Kevin Bracey's avatar
      * Added support for 24LC64 8K EEPROM (untested). · f52b4580
      Kevin Bracey authored
      * Integrated Ursula fast service call dispatch code.
      * Added Interruptible32bitModes from Ursula.
      * Stopped allowing ROM modules (other than the Kernel/UtilityModule) to write
        to the hardware vectors in 26-bit mode.
      
      Version 4.81. Tagged as 'Kernel-4_81'
      f52b4580