Commit 1432808a authored by Mike Stephens's avatar Mike Stephens
Browse files

mjs macros switch on HAL for calling video code in HAL/pseudo HAL cases...

mjs macros switch on HAL for calling video code in HAL/pseudo HAL cases vduhint code even more almost ready to move to HAL

Version 5.35, 4.79.2.6. Tagged as 'Kernel-5_35-4_79_2_6'
parent a18a8de5
......@@ -11,10 +11,10 @@
GBLS Module_HelpVersion
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.5"
Module_MinorVersion SETS "4.79.2.6"
Module_Date SETS "05 Oct 2000"
Module_ApplicationDate2 SETS "05-Oct-00"
Module_ApplicationDate4 SETS "05-Oct-2000"
Module_FullVersion SETS "5.35 (4.79.2.5)"
Module_HelpVersion SETS "5.35 (05 Oct 2000) 4.79.2.5"
Module_FullVersion SETS "5.35 (4.79.2.6)"
Module_HelpVersion SETS "5.35 (05 Oct 2000) 4.79.2.6"
END
......@@ -4,16 +4,16 @@
*
*/
#define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.5
#define Module_MinorVersion_CMHG 4.79.2.6
#define Module_Date_CMHG 05 Oct 2000
#define Module_MajorVersion "5.35"
#define Module_Version 535
#define Module_MinorVersion "4.79.2.5"
#define Module_MinorVersion "4.79.2.6"
#define Module_Date "05 Oct 2000"
#define Module_ApplicationDate2 "05-Oct-00"
#define Module_ApplicationDate4 "05-Oct-2000"
#define Module_FullVersion "5.35 (4.79.2.5)"
#define Module_HelpVersion "5.35 (05 Oct 2000) (4.79.2.5)"
#define Module_FullVersion "5.35 (4.79.2.6)"
#define Module_HelpVersion "5.35 (05 Oct 2000) (4.79.2.6)"
......@@ -1268,7 +1268,8 @@ ChocolateMSBlocks # 4 ; -> array of blocks for module SWI hash n
! 0, "ChocolateMRBlocks at ":CC::STR:(ChocolateMRBlocks)
! 0, "ChocolateMABlocks at ":CC::STR:(ChocolateMABlocks)
! 0, "ChocolateMSBlocks at ":CC::STR:(ChocolateMSBlocks)
[ {TRUE}
[ :LNOT: HAL
mjs_tempHALworkspace # 4 ; required only temporarily for semi-HALised code still in RO kernel
! 0, "*** mjs_tempHALworkspace should be removed when kernel/HAL split permits"
; !!!! Free Space (36 bytes)
......@@ -1277,6 +1278,7 @@ OldSWIHashspace # 9*4
; !!!! Free Space (40 bytes)
OldSWIHashspace # 10*4
]
|
; !!!! Free Space (64 bytes)
OldSWIHashspace # 16*4
......
......@@ -571,14 +571,8 @@ SSETMEMC ROUT
MOVEQ r0, #1 ; blank (video DMA disable)
MOVNE r0, #0 ; unblank (video DMA enable)
MOV r1, #0 ; no funny business with DPMS
;;;
;;;mjsHAL my temporary macros aren't defined early enough!
;;; mjsAddressHAL
;;; mjsCallHAL HAL_Video_SetBlank
LDR r9, =mjs_tempHALworkspace
LDR r9, [r9]
BL HAL_Video_SetBlank
;;;
mjsAddressHAL
mjsCallHAL HAL_Video_SetBlank
Pull "r0-r3, r9, r14"
WritePSRc SVC_mode+I_bit, r11
......
......@@ -16,6 +16,44 @@
SUBT Arthur Variables
OPT 4
; -----------------------------------------------------------------------------
;
; mjs Oct 2000 kernel/HAL split
;
; macros that can be switched between doing real HAL calls and pseudo
; HAL calls with r9-> mjs pseudo HAL workspace
;
; these have been handy for interim HALising of kernel code in-situ
; (particularly used for video stuff), but can probably disappear later
;
[ HAL
MACRO
mjsAddressHAL
AddressHAL
MEND
MACRO
mjsCallHAL $rout
CallHAL $rout
MEND
|
MACRO
mjsAddressHAL
LDR r9, =mjs_tempHALworkspace
LDR r9, [r9] ; sb -> pseudo HAL workspace
MEND
MACRO
mjsCallHAL $rout
BL $rout
MEND
] ;HAL
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; handy macros:
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
......
......@@ -207,14 +207,17 @@ VduInit ROUT
MOV R2, #7 ; copy 7 pages
BL DoResetFont
; mjsHAL - temporary workspace while semi HALised code still in kernel
;
[ :LNOT: HAL
;
; mjsHAL - temporary workspace while semi HALised code still in kernel
;
MOV r3, #mjs_thalwk_size
BL ClaimSysHeapNode ; this had better succeed!
LDR r4, =mjs_tempHALworkspace
STR r2, [r4, #0]
BL mjs_tempHALworkspace_init
;
;
]
;initialise the 6 pointer shape pointers and blocks
;(shape buffers are 6 * &100 starting at CursorData)
......
......@@ -28,7 +28,10 @@
; eventually, vduhint should either have any veneer code/defns or
; should disappear altogether
; temp mjs versions of macros to call HAL routines
; temp mjs versions of macros to call HAL routines are
; defined in s.Kernel
;
; mjsAddressHAL and mjsCallHAL
;
; the HAL calls will be ARM ATPCS compliant (HAL API defined in C)
; for calls from kernel assembler code this means:
......@@ -50,18 +53,16 @@
; temporarily in kernel, but simulate the same register usage
;
;
MACRO
mjsAddressHAL
LDR r9, =mjs_tempHALworkspace
LDR r9, [r9] ; sb -> HAL workspace
MEND
MACRO
mjsCallHAL $rout
; note, real macro will corrupt r12 (ip), but target HAL routine
; can do that anyway
BL $rout
MEND
[ HAL
;;; nothing at all here so far in HAL case!
! 0, "vdu.vduhint compiles as empty in HAL case"
|
;;; non-HAL case, pseudo HAL code
; -----------------------------------------------------------------------------------
......@@ -72,6 +73,8 @@
^ 0
mjs_thalwk_start # 0
VIDC_Address # 4 ; so code doesn't need a compile-time constant if in HAL
IOMD_Address # 4 ; so code doesn't need a compile-time constant if in HAL
VIDC_NextPaletteIndex # 4 ; last index used in setting normal palette entry
VIDC_SoftPalette0 # 4 ; soft copy of BBGGRRSS for normal palette entry 0
; (used to support ReadPaletteEntry)
......@@ -94,6 +97,10 @@ mjs_tempHALworkspace_init ROUT
Push "r0, lr"
LDR r0, =mjs_tempHALworkspace
LDR r0, [r0, #0]
MOV lr, #VIDC
STR lr, [r0, #VIDC_Address]
MOV lr, #IOMD_Base
STR lr, [r0, #IOMD_Address]
MOV lr, #-1
STR lr, [r0, #VIDC_NextPaletteIndex] ; init to invalid
MOV lr, #0
......@@ -444,7 +451,7 @@ FIFOLoadTable
; now make sure video DMA enabled
;
MOV r7, #IOMD_Base
LDR r7, [r9, #IOMD_Address]
LDRB r8, [r7, #IOMD_VIDCR]
AND r8, r8, #&7F ; knock out IOMD_VIDCR_Dup
ORR r8, r8, #IOMD_VIDCR_Enable ; enable video DMA
......@@ -470,7 +477,7 @@ ProgramVIDC20Regs ROUT
MOVNE R4, #CR_Interlace
MOV R7, R0 ; keep copy in R7 in case we go wrong
MOV R3, #VIDC ; R3 -> VIDC20 h/w
LDR R3, [R9, #VIDC_Address] ; R3 -> VIDC20 h/w
18
MOV R1, #(128-PseudoRegisters)*4 ; number of bytes to do (don't program pseudo-registers!)
20
......@@ -558,16 +565,16 @@ ProgramVIDC20Regs ROUT
STR R2, [R9, #VIDC_ControlSoftCopy] ; and save in copy
; now compute FSIZE properly
LDR R10, [R7, #(&94-&80)*4] ; get vertidisplayend
LDR R10, [R7, #(&94-&80)*4] ; get vertidisplayend
BIC R10, R10, #&FF000000
LDR R8, [R7, #(&93-&80)*4] ; get vertidisplaystart
LDR R8, [R7, #(&93-&80)*4] ; get vertidisplaystart
BIC R8, R8, #&FF000000
SUB R10, R10, R8 ; verti displayed
LDR R8, [R7, #(&90-&80)*4] ; verti total
SUB R10, R10, R8 ; verti displayed
LDR R8, [R7, #(&90-&80)*4] ; verti total
BIC R8, R8, #&FF000000
SUB R10, R8, R10
ADD R10, R10, #1 ; vidc parms are n-2, we want n-1
MOV R8, #IOMD_Base
ADD R10, R10, #1 ; vidc parms are n-2, we want n-1
LDR R8, [R9, #IOMD_Address]
STRB R10, [R8, #IOMD_FSIZE]
LDR R14, [R9, #VIDC_PointerHAdjust] ; R14 = horiz display start (-18)
......@@ -862,7 +869,7 @@ ComputeModuli Entry "r2-r12", ComputeModuliStack
; index = index of entry (0..255 for normal, 0 for border, 0..3 for pointer)
; note that RISC OS only uses 1..3 for pointer (0 is assumed to be transparent)
;
; r9 is workspace pointer, may corrupt r0..r2, r12
; r9 is workspace pointer, may corrupt r0..r3, r12
;
HAL_Video_WritePaletteEntry ROUT
......@@ -870,7 +877,7 @@ HAL_Video_WritePaletteEntry ROUT
MOV r1, r1, LSR #8 ; 00BBGGRR
ORR r1, r1, r12, LSL #20 ; 0SBBGGRR
MOV r12, #VIDC
LDR r12, [r9, #VIDC_Address]
CMP r0, #1
BLO HV_WritePaletteEntry_type0
......@@ -952,7 +959,7 @@ HAL_Video_WritePaletteEntries ROUT
;
; type 0, try to be efficient
;
MOV r12, #VIDC
LDR r12, [r9, #VIDC_Address]
CMP r2, #0
......@@ -1052,12 +1059,12 @@ HV_ReadPaletteEntry_not_type0
HAL_Video_SetInterlace ROUT
LDR r1, [R9, #VIDC_ControlSoftCopy]
LDR r1, [r9, #VIDC_ControlSoftCopy]
BIC r1, r1, #CR_Interlace
TST r0, #1
ORRNE r1, r1, #CR_Interlace ; zero => no interlace
MOV r0, #VIDC
LDR r0, [r9, #VIDC_Address]
STR r1, [r0] ; program VIDC
MOV pc, lr
......@@ -1077,7 +1084,7 @@ HAL_Video_SetInterlace ROUT
HAL_Video_SetBlank ROUT
MOV r3, #VIDC
LDR r3, [r9, #VIDC_Address]
TEQ r0, #0
BEQ %FT50
......@@ -1092,7 +1099,7 @@ HAL_Video_SetBlank ROUT
LDRNE r2, =VertiSyncWidth + ((1:SHL:13) -1) ; maximum value in v.sync width register
STRNE r2, [r3]
LDR r2, [R9, #VIDC_ExternalSoftCopy]
LDR r2, [r9, #VIDC_ExternalSoftCopy]
AND r1, r1, #3
TEQ r1, #3 ; if both syncs off
BICEQ r2, r2, #Ext_HSYNCbits :OR: Ext_VSYNCbits
......@@ -1100,7 +1107,7 @@ HAL_Video_SetBlank ROUT
BIC r2, r2, #Ext_DACsOn ; turn off the DACs
STR r2, [r3]
MOV r0, #IOMD_Base
LDR r0, [r9, #IOMD_Address]
LDRB r1, [r0, #IOMD_VIDCR]
BIC r1, r1, #IOMD_VIDCR_Enable ; disable video DMA
STRB r1, [r0, #IOMD_VIDCR]
......@@ -1109,18 +1116,18 @@ HAL_Video_SetBlank ROUT
;
; unblanking
;
50 LDR r2, [R9, #VIDC_ExternalSoftCopy]
50 LDR r2, [r9, #VIDC_ExternalSoftCopy]
STR r2, [r3] ; restore DACs and sync type
TST r1, #1 ; if hsyncs were turned off,
LDRNE r2, [R9, #VIDC_HSWRSoftCopy] ; then restore from soft copy
LDRNE r2, [r9, #VIDC_HSWRSoftCopy] ; then restore from soft copy
STRNE r2, [r3]
TST r1, #2 ; if vsyncs were turned off,
LDRNE r2, [R9, #VIDC_VSWRSoftCopy] ; then restore from soft copy
STRNE r2, [r3]
MOV r0, #IOMD_Base
LDR r0, [r9, #IOMD_Address]
LDRB r1, [r0, #IOMD_VIDCR]
ORR r1, r1, #IOMD_VIDCR_Enable ; enable video DMA
STRB r1, [r0, #IOMD_VIDCR]
......@@ -1135,7 +1142,7 @@ HAL_Video_SetBlank ROUT
HAL_Video_SetPowerSave ROUT
MOV r1, #VIDC
LDR r1, [r9, #VIDC_Address]
TEQ r0, #0
BEQ %FT50
......@@ -1230,7 +1237,7 @@ HAL_Video_UpdatePointer
Push "r4, r5, lr"
MOV r14, #VIDC
LDR r14, [r9, #VIDC_Address]
TST r0, #1
BEQ %FT90 ; pointer off
......@@ -1280,7 +1287,7 @@ HAL_Video_UpdatePointer
ORR r1, r2, #VertiCursorEnd
STR r1, [r14]
MOV r14, #IOMD_Base
LDR r14, [r9, #IOMD_Address]
STR r5, [r14, #IOMD_CURSINIT]
Pull "r4, r5, pc"
......@@ -1328,7 +1335,7 @@ HAL_Video_UpdatePointer
HAL_Video_SetDAG ROUT
MOV r12, #IOMD_Base
LDR r12, [r9, #IOMD_Address]
CMP r0, #1
BEQ %FT20
......@@ -1386,4 +1393,6 @@ HAL_Video_VetMode ROUT
; -------------------------------------------------------------------------
] ; big HAL if/else switch around whole file
END
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