1. 15 Dec, 2013 1 commit
    • Jeffrey Lee's avatar
      Assorted GraphicsV improvements · 694750de
      Jeffrey Lee authored
      Detail:
        This set of changes:
        * Adds basic support for multiple GraphicsV drivers, by way of some new OS_ScreenMode reason codes for registering/deregistering, selecting and enumerating drivers (11, 64-68)
        * Tidies up handling of HAL video calls so that the HAL calls will be transformed into a bona fide GraphicsV driver if they're implemented
        * Changes handling of 16bpp gamma table entries so that they're sent to GraphicsV in a generic form instead of in a VIDC-specific form
        * Adds a new GraphicsV call and defines new VIDC list items to allow GraphicsV drivers to utilise the new pixel formats
        File changes:
        * h/VIDCList, hdr/VIDCList, Makefile - Add new header export containing VIDC list type 3 definitions, to avoid repeated definitions in other components
        * Resources/UK/Messages - Add new GraphicsV/OS_ScreenMode error strings and some missing processor type strings
        * hdr/KernelWS - Clean up some pre-GraphicsV definitions, and add new workspace locations for storing the current GraphicsV driver number and the driver list
        * hdr/Options - Remove obsolete InverseTextTransparency option
        * hdr/VduExt - Add VDU variable 192 for storing GraphicsV driver number (same as ROL's VideoV driver number). Remove old 'Flag_*' mode flag definitions (use new 'ModeFlag_*' defintions instead). Add new OS_ScreenMode reason codes.
        * s/ARM600, s/VMSAv6, s/vdu/vdu23, s/vdu/vdugrafa, s/vdu/vdugrafd, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduwrch - Strip out pre-GraphicsV code. Update GraphicsV code to use correct driver number.
        * s/ArthurSWIs - Pass the default GraphicsV claimant the VduDriverWorkSpace instead of ZeroPage
        * s/Getall - Add Hdr:VIDCList and s/vdu/VduGrafHAL to list of GETs
        * s/NewIRQs - Remove HAL VSync IRQ initialisation, is now handled by grafvhal. Remove old HAL VsyncIRQ entry point, all VSyncs are now handled by VsyncIRQ_ExtEntry.
        * s/PMF/osbyte - Stop OS_Byte 19 waiting forever if no video driver is active
        * s/PMF/osinit - Remove HAL VSync IRQ initialisation, is now handled by grafvhal
        * s/vdu/vducursoft - Use new workspace variable names and flag names
        * s/vdu/vdudecl - Remove old HALDAG_* definitions, GVDAG_* definitions are used instead. Add definition of the per-driver workspace structure and flags.
        * s/vdu/vdudriver - Remove pre-GraphicsV code. Update InitialiseMode to check for and initialise a HAL driver. Use cached driver features word in a few places instead of calling GraphicsV each time. Update PalIndexTable to disable VIDC mangling of 16bpp gamma tables.
        * s/vdu/vdugrafv, s/vdu/vdugrafhal - HAL<->GraphicsV code split off into its own file (vdugrafhal). Default GraphicsV claimant now only deals with VSync events for the active driver.
        * s/vdu/vdumodes - Get rid of old VIDC List type 3 definiton; now in hdr/VIDCList
        * s/vdu/vduswis - Added OS_ScreenMode reason codes 11 and 64-68 for registering, deregistering, selecting and enumerating GraphicsV drivers. Update mode set code to not bother checking if the driver supports the pixel format; instead we assume that the driver's vet mode call will do the check for us.
      Admin:
        Tested in Tungsten, IOMD, OMAP3 & BCM2835 ROMs
        Requires HdrSrc-2_38 and updated video driver modes
      
      
      Version 5.35, 4.79.2.203. Tagged as 'Kernel-5_35-4_79_2_203'
      694750de
  2. 06 Aug, 2013 1 commit
    • Jeffrey Lee's avatar
      Add support for the new RISC OS 5 style sprite mode word. Add partial support... · 57d1a29d
      Jeffrey Lee authored
      Add support for the new RISC OS 5 style sprite mode word. Add partial support for alpha channel sprite masks. Implement OS_ScreenMode reasons 13-15
      
      Detail:
        ECFShift/ECFYOffset:
        - hdr/PublicWS - Add ECFShift and ECFYOffset to list of public exports (SpriteExtend was using hardcoded values). Rearrange exports so that VduWorkspace exports are now labelled as such.
        - hdr/KernelWS - Make sure ECFShift & ECFYOffset match their exported locations
        - hdr/OSRSI6, s/Middle - Add OS_ReadSysInfo 6 items 83 & 84, for reading ECFYOffset and ECFShift locations
        Mode flags/VDU variables:
        - Makefile - Add hdr/VduExt to the C header exports
        - hdr/VduExt - Get rid of NotRVVTBarWobblyBits macro and defined VDU variables manually so that Hdr2H will handle them. Begin replacing overly generic 'Flag_*' mode flag definitions with 'ModeFlag_*' instead. Define new flags as required by the new screen/sprite modes. Add OS_ScreenMode reason codes and mode selector format (from s.vdu.vdudecl)
        - NewModes/NEWF2, NewModes/OldPSSrc, NewModes/PSSrc, s.vdu.vdu23, s.vdu.vducursoft, s.vdu.vdudriver, s.vdu.vdugrafg, s.vdu.vdugrafj, s.vdu.vdugrafl, s.vdu.vdumodes, s.vdu.vdupal10, s.vdu.vdupal20, s.vdu.vdupalette, s.vdu.vdupalxx, s.vdu.vduwrch - Renaming Flag_* to ModeFlag_*
        - s.vdu.vdudecl - Remove OS_ScreenMode reason codes & mode selector format definitions; these are now in hdr/VduExt. Flag_* -> ModeFlag_* renaming.
        - s.vdu.vdupalxx - Apply a greyscale palette in PV_SetDefaultPalette if the greyscale mode flag is set
        New sprite types:
        - s.vdu.vdudriver - Extend GenerateModeSelectorVars to deal with the wide mask flag, 64K sprites, and the new RISC OS 5 sprite mode word format.
        - s.vdu.vdugrafdec - Store more information about the sprite in the SprReadNColour ... SprLog2BPC block.
        - s.vdu.vdugrafg - Update SpriteVecHandler to be able to detect whether RISC OS 5 format sprites are allowed palettes. Update SetupSprModeData to store the extra sprite info that's defined in vdugrafdec. Update PutSprite to fault any sprites with wide masks - SpriteExtend must be used for that (once implemented!)
        - s.vdu.vdugrafh - Update WritePixelColour to avoid temporary poking of NColour VDU variable for 8bpp sprites. Correctly replicate data when writing to RISC OS 5 format sprites. Update ReadPixelMask, WritePixelMask, SpriteMaskAddr, GetMaskspWidth to deal with wide masks. Delete obsolete bounce_new_format_masks routine.
        - s.vdu.vdugrafi - Comment updated to reflect new reality
        - s.vdu.vdugrafj - Get rid of unused code block in CreateHeader/PostCreateHeader. Update SanitizeSGetMode to generate RISC OS 5 style sprite mode words where applicable. Update DecideMaskSize to rely on GetMaskspWidth for calculating mask width.
        - s.vdu.vdugrafl - Update SwitchOutputToSprite/SwitchOutputToMask to deal with the new sprite formats. Allow PushModeInfoAnyMonitor to fail.
        - s.vdu.vduswis - Extended OS_ReadModeVariable to cope with new sprite types
        Misc:
        - s.vdu.vdudriver - Fixed bug with VIDCList copying where any -1 value in the structure would terminate the copy, instead of only -1 as a control item number
        - s.vdu.vduswis - Implemented OS_ScreenMode 13 (Mode string to specifier), 14 (mode specifier to string), and 15 (set mode by string). Mostly as per ROL's specs, but minus support for teletext attributes, and plus support for new RISC OS 5 attributes (L... layout specifier, 4096 & 24bpp packed modes, etc.)
        - s.vdu.vduwrch - Pick correct default text colours for the new modes
      Admin:
        Tested on BB-xM
        Part of an implementation of the Extended Framebuffer Format spec:
        http://www.riscosopen.org/wiki/documentation/show/Extended%20Framebuffer%20Format%20Specification
      
      
      Version 5.35, 4.79.2.194. Tagged as 'Kernel-5_35-4_79_2_194'
      57d1a29d
  3. 04 Jul, 2012 1 commit
    • Robert Sprowson's avatar
      Make GraphicsV_IICOp more consistent · c671badb
      Robert Sprowson authored
      No accepts  r0 = b31-24 set 0
                       b23-16 fully qualified IIC address
                       b15-0  starting offset
                  r1 = buffer pointer
                  r2 = number of bytes to tranfer
                  r4 = b31-24 display number
                       b23-16 head
                       b15-0  reason code (=14)
      Now returns r0 = result codes as per HAL_IICTransfer()
                  r1 = buffer pointer incremented by number of bytes transferred
                  r2 = number of bytes *not* transferred
                  r4 = 0
      Removed '_' after Video in entry numbers to be consistent with other HAL entry naming, and HAL_VideoFlybackDevice.
      Added IICStatus return numbers to Hdr:HALEntries.
      Stop calling HAL_MonitorLeadID as only IOMD implemented it - just guess VGA until the graphics driver says otherwise.
      
      Version 5.35, 4.79.2.159. Tagged as 'Kernel-5_35-4_79_2_159'
      c671badb
  4. 21 May, 2012 1 commit
    • Robert Sprowson's avatar
      Make Mike's macros permanent. · 2c9aad90
      Robert Sprowson authored
      While the HAL and kernel were being split some temporary macros were used for the bits being worked on, after 12 years of use they're probably safe to adopt.
      mjsCallHAL -> CallHAL; mjsAddressHAL -> AddressHAL; mjsHAL -> HAL.
      OS_VIDCDividerSWI code now always does NoSuchSWI (had been switched out previously).
      File vduhint.s no longer assembled (was empty).
      
      
      Version 5.35, 4.79.2.150. Tagged as 'Kernel-5_35-4_79_2_150'
      2c9aad90
  5. 27 Nov, 2011 1 commit
    • Robert Sprowson's avatar
      Rationalise some old switches. · 189b92c1
      Robert Sprowson authored
      Export less in hdr:RISCOS.
      Delete unused GetDecimalPair routine.
      Move CheckYear with other RTC stuff out of PMF/osword.
      Hide DebugROMInit and DebugROMErrors in release (even numbered) versions.
      
      Version 5.35, 4.79.2.127. Tagged as 'Kernel-5_35-4_79_2_127'
      189b92c1
  6. 08 Aug, 2011 1 commit
    • Jeffrey Lee's avatar
      Add zero page relocation support · 2247d8e9
      Jeffrey Lee authored
      Detail:
        A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel
        At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts.
        There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember:
        * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested)
        * ShareFS needs unplugging/removing since it can't cope with it yet
        * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences)
        * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294
        The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?)
        Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents.
        File changes:
        - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero'
        - hdr/Copro15ops - Corrected $quick handling in myISB macro
        - hdr/Options - Added ideal setting for us to use for HiProcVecs
        - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation
        - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit.
        - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use.
        - s/KbdResPC - Disable compilation of dead code
        - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support.
      Admin:
        Tested with OMAP & Iyonix ROM softloads, both with high & low zero page.
        High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work.
      
      
      Version 5.35, 4.79.2.98.2.48. Tagged as 'Kernel-5_35-4_79_2_98_2_48'
      2247d8e9
  7. 17 May, 2009 1 commit
    • Ben Avison's avatar
      Miscellaneous v6-related updates · 9d9aa41b
      Ben Avison authored
      Detail:
       * Stopped calling the broken abort fixup code when running under VMSAv6.
         Might be desirable to update it, possibly farmed out to a separate module -
         still need to think about this.
       * Unaligned load optimisations can now be disabled by the global NoUnaligned
         flag for testing purposes.
       * Extended OS_ReadUnsigned to permit reading of 64-bit unsigned integers.
         See Docs.ReadUnsigned for more details. Also sped it up by using MLA
         (or UMLAL) for most digits rather than repeated addition.
       * Bugfix is OS_GSRead: an uninitialised r0 was being passed to
         OS_ReadUnsigned, causing undesirable effects on rare occasions.
      Admin:
        Tested on a rev B7 beagleboard.
      
      Version 5.35, 4.79.2.98.2.8. Tagged as 'Kernel-5_35-4_79_2_98_2_8'
      9d9aa41b
  8. 10 May, 2009 1 commit
    • Ben Avison's avatar
      Unaligned loads/stores optimised for ARMv6+ · 70865f8b
      Ben Avison authored
      Detail:
        Having scanned the kernel source for unaligned load code fragments which
        would abort on ARMv6 and v7 and not having found any, I took the opportunity
        to give them build-time switches to use unaligned LDR((S)H)/STR(H)
        instructions if built for a new enough platform. Also added a couple of
        cases of LDRSB that will benefit v4 CPUs and a few instances of the v6
        SXTH instruction, but since objasm doesn't yet understand it (and when it
        does, not everyone will have upgraded) they are currently written as
        DCI statements.
        Most of the changes are to OS_Word handlers, which are notorious in that
        their input/output block is not word-aligned.
      Admin:
        Not tested, but it should at least build.
      
      Version 5.35, 4.79.2.98.2.6. Tagged as 'Kernel-5_35-4_79_2_98_2_6'
      70865f8b
  9. 30 Nov, 2002 1 commit
    • Ben Avison's avatar
      Commit of kernel as featured in release 5.00. · 9664c93b
      Ben Avison authored
      Detail:
        Lots of changes since last version, at least the following:
        * Updated OS timestamp, removed alpha status
        * Negative INKEY OS version changed to &AA
        * GraphicsV is now alocated vector number &2A
        * ROM moved up to &FC000000
        * Max application slot increased to 512 Mbytes (for now)
        * Max size of RMA increased to 256 Mbytes
        * RMA is now first-created dynamic area (so it gets lowest address after
          top of application slot)
        * OS_Memory 10 reimplemeted
        * New OS_ReadSysInfo 6 values 18-22 added
        * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
        * Misc internal top-bit-set-address fixes
        * *ChangeDynamicArea can take sizes in megabytes or gigabytes
        * Magic word "&off" in R0 passed to OS_Reset powers down if possible
        * Added acceleration: block copy; CLS; text window scroll up; rectangle
          fill
        * Disabled LED flashing in page mode (liable to crash)
        * Masked sprite plot and VDU 5 text avoids reading the screen if possible
        * Framestore made USR mode accessible
        * Fix for VDU 5,127 bug - now relies on font definitions being in extreme
          quarters of memory, rather than bottom half
        * Allocated 64-bit OS_Convert... SWIs
        * IIC errors use allocated error numbers
        * Looks for Dallas RTC before Philips RTC because we're using a Philips
          NVRAM device with the same ID
        * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled
        * Default mouse type (USB) changed to allocated number
        * Ram disc max size increased to 128 Mbytes (Ursula merge) and made
          cacheable for StrongARMs (not XScale)
        * Branch through zero handler now works in USR mode, by use of a
          trampoline in the system stack to allow PC-relative register storage
        * Address exception handler changed to not use 0 as workspace
        * OS_Memory 13 extended to allow specification of cacheability and access
          privileges
        * Added OS_Memory 16 to return important memory addresses
        * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in
          bits 10 and 11, doubly-mapped flag in bit 20, and access permissions
          specified flag in bit 21
        * Bug fix in last version for application abort handlers didn't quite
          work; register shuffle required
        * "Module is not 32-bit compatible" error now reports the module name
        * Default configured language changed from 10 to 11 (now Desktop again)
      
      Version 5.35, 4.79.2.51. Tagged as 'Kernel-5_35-4_79_2_51'
      9664c93b
  10. 07 Oct, 2002 1 commit
  11. 03 Oct, 2000 1 commit
  12. 28 Jun, 2000 1 commit
    • Ben Avison's avatar
      Added compile-time support for full-resolution teletext characters in teletext... · e87eeeca
      Ben Avison authored
      Added compile-time support for full-resolution teletext characters in teletext emulation mode (MODE 7) for that authentic BBC Micro feel.
      
        Also introduced a few useful teletext control features via VDU 23,18.
        Unrelatedly, fixed *ScreenLoad to work for interlaced displays.
      
      Detail:
        The new typeface is designed on a 16x20 grid (previously we had used 8x10),
        so it uses a screen resolution of 640x500 pixels (rather than 320x250).
        Since we have been unable to source a genuine teletext font, and since
        examination of a BBC Micro suggests that the genuine font may not have been
        a power-of-2 pixels wide, I have designed one specially, based upon the one
        supplied in Zap distributions (a 12x20 font). Rather than increase the
        amount of workspace that the kernel requires for cacheing graphic
        characters, it now generates them on the fly, as they are required; this
        should only add about 25% to their rendering time.
      
        The new VDU 23 sequences are as follows:
      
        VDU 23,18,0,mode,0,0,0,0,0,0
          Switch transparency mode
            mode = 0: "Text" mode: the whole display is set opaque
            mode = 1: "Mix" mode: foreground colours, and both foreground and
              background of boxed text are opaque; non-boxed background colours are
              all transparent
            mode = 2: "Box" mode: boxed regions are opaque, others are transparent
            mode = 3: "TV" mode: the whole display is set transparent
          Default is mode = 0.
      
        VDU 23,18,1,suspend,0,0,0,0,0,0
          Suspend or resume bitmap updates
          This call allows an application to request that the kernel suspends
          updates to the framebuffer bitmap. This allows for a significant speed
          increase in the rendering time for a large amount of text, for example
          when redrawing a complete teletext page, because each time you plot a
          single character, it can cause the whole of the rest of the line to be
          re-rendered. When you switch out of suspend mode, the whole screen is
          refreshed in a single pass. Note that the appearance of the display is
          undefined is you cause a hardware scroll while in suspend mode.
            suspend = 0: screen update is enabled
            suspend = 1: screen update is suspended
          Default is suspend = 0.
      
        VDU 23,18,2,reveal,0,0,0,0,0,0
          Reveal/conceal
            reveal = 0: characters between the Conceal control code and the next
              colour control code are replaced by spaces
            reveal = 1: all characters are displayed
          Default is reveal = 0.
      
        VDU 23,18,3,black_emable,0,0,0,0,0,0
          Enable/disable black foreground colour control codes
            black_enable = 0: control codes &80 and &90 do nothing
            black_enable = 1: control code &80 selects black text, control code
              &90 selects black graphics
          Default is black_enable = 0.
      
        I have performed some timing tests on the rendering of complete teletext
        pages grabbed from the teletext server. These show that the new code
        generally imposes a 2x speed hit. However, when using the VDU 23,18,1
        suspend function, this improves to a 20% speed increase when compared to
        the old low-resolution code. Better still, because the framebuffer is only
        being updated for the final stage of this process, the screen *appears* to
        be updated some 3x faster than with the old code!
      
        A comment on the VDU variable Log2BPC is in order: in previous kernels,
        this was able unambiguously to refer to both the framebuffer width of a
        character in bytes, and the framebuffer width of an "addressable pixel" in
        bits; this no longer works with the 16-pixel wide teletext font. Bearing
        in mind that future kernels may support Unicode system fonts where the
        width varies from character to character, I have chosen to fix Log2BPC to
        the "addressable pixel" definition.
      
      Admin:
        Requires HdrSrc 0.89 and (for non-desktop builds) Interlace 0.61. A monitor
        definition file containing a definition for a 640x500 screen mode is also
        required; version 0.40 of ModeFiles contains a suitable mode for STB-400.
      
        Tested fairly rigourously on an Ursula build, a Lazarus build and an
        STB-400 build, using genuine teletext pages and Yellow River Kingdom.
      
      Version 5.30. Tagged as 'Kernel-5_30'
      e87eeeca
  13. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
      Details:
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
      
        The hardest part was the flood-fill...
      
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
      
        Lots of really crusty pre-IOMD code removed.
      
      Admin:
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      
      Version 5.23. Tagged as 'Kernel-5_23'
      b4016e9c
  14. 05 Nov, 1996 1 commit