Expose more areas via OS_ReadSysInfo 6 & OS_Memory 16. Expose processor...

Expose more areas via OS_ReadSysInfo 6 & OS_Memory 16. Expose processor vectors base + size via OS_PlatformFeatures.

Detail:
  hdr/KernelWS - Define processor vectors address. Currently same as ZeroPage, but in the future will differ for some machines.
  hdr/OSRSI6, s/Middle - Expose VecPtrTab & NVECTORS via OS_ReadSysInfo items 85 & 86
  s/Kernel - Add OS_PlatformFeatures 32, for returning the base + size of the processor vectors
  s/MemInfo - Add areas 12 thru 15 to OS_Memory 16, for reporting ZeroPage, ProcVecs, DebuggerSpace and ScratchSpace. The task manager can now use these for calculating memory usage instead of assuming 32K workspace from &0-&8000.
Admin:
  Tested on Raspberry Pi


Version 5.35, 4.79.2.271. Tagged as 'Kernel-5_35-4_79_2_271'

VersionASM

@@ -13,11 +13,11 @@
                         GBLS    Module_ComponentPath
 Module_MajorVersion     SETS    "5.35"
 Module_Version          SETA    535
-Module_MinorVersion     SETS    "4.79.2.270"
-Module_Date             SETS    "13 Jul 2015"
-Module_ApplicationDate  SETS    "13-Jul-15"
+Module_MinorVersion     SETS    "4.79.2.271"
+Module_Date             SETS    "17 Jul 2015"
+Module_ApplicationDate  SETS    "17-Jul-15"
 Module_ComponentName    SETS    "Kernel"
 Module_ComponentPath    SETS    "castle/RiscOS/Sources/Kernel"
-Module_FullVersion      SETS    "5.35 (4.79.2.270)"
-Module_HelpVersion      SETS    "5.35 (13 Jul 2015) 4.79.2.270"
+Module_FullVersion      SETS    "5.35 (4.79.2.271)"
+Module_HelpVersion      SETS    "5.35 (17 Jul 2015) 4.79.2.271"
                         END

VersionNum

@@ -5,19 +5,19 @@
  *
  */
 #define Module_MajorVersion_CMHG        5.35
-#define Module_MinorVersion_CMHG        4.79.2.270
-#define Module_Date_CMHG                13 Jul 2015
+#define Module_MinorVersion_CMHG        4.79.2.271
+#define Module_Date_CMHG                17 Jul 2015
 
 #define Module_MajorVersion             "5.35"
 #define Module_Version                  535
-#define Module_MinorVersion             "4.79.2.270"
-#define Module_Date                     "13 Jul 2015"
+#define Module_MinorVersion             "4.79.2.271"
+#define Module_Date                     "17 Jul 2015"
 
-#define Module_ApplicationDate          "13-Jul-15"
+#define Module_ApplicationDate          "17-Jul-15"
 
 #define Module_ComponentName            "Kernel"
 #define Module_ComponentPath            "castle/RiscOS/Sources/Kernel"
 
-#define Module_FullVersion              "5.35 (4.79.2.270)"
-#define Module_HelpVersion              "5.35 (13 Jul 2015) 4.79.2.270"
+#define Module_FullVersion              "5.35 (4.79.2.271)"
+#define Module_HelpVersion              "5.35 (17 Jul 2015) 4.79.2.271"
 #define Module_LibraryVersionInfo       "5:35"

hdr/KernelWS

@@ -232,10 +232,12 @@ DANode_NodeSize   #     0
 ; The addresses below are only temporary; eventually most of them will be allocated at run time (we hope!)
 
  [ HiProcVecs
-ZeroPage            * &FFFF0000
+ProcVecs            * &FFFF0000
  |
-ZeroPage            * &00000000
+ProcVecs            * &00000000
  ]
+; Currently, zero page must be located at the processor vectors
+ZeroPage            * ProcVecs
 
  [ HAL
 ; Sort out 26/32 bit versions

hdr/OSRSI6

@@ -84,5 +84,7 @@ OSRSI6_FPEAnchor                               * 81
 OSRSI6_ESC_Status                              * 82
 OSRSI6_ECFYOffset                              * 83
 OSRSI6_ECFShift                                * 84
+OSRSI6_VecPtrTab                               * 85
+OSRSI6_NVECTORS                                * 86
 
         END

s/Kernel

@@ -1592,10 +1592,18 @@ Issue_Service_SWI ROUT
  [ StrongARM
 ; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 ; SWI OS_PlatformFeatures
+;
+;     r0 = reason code:
+;          0 -> read code features
+;          1 -> read MMU features (ROL, unimplemented here)
+;          2-31 -> reserved just in case ROL have used them
+;          32 -> read processor vectors location
 
 PlatFeatSWI ROUT
         Push    lr
-        CMP     r0, #0                  ;Is it a known reason code?
+        CMP     r0, #32                 ;Is it a known reason code?
+        BEQ     %FT30
+        CMP     r0, #0
         BNE     %FT50                   ;No, so send out a service call
 
         ;Ok, it's the 'code_features' reason code.
@@ -1617,6 +1625,13 @@ platfeat_irqinsert
         MOV     r0, r0
         MOV     pc, lr
 
+30
+        ; Return processor vectors base + size
+        LDR     r0, =ProcVecs
+        MOV     r1, #256                ; Currently only 256 bytes available for FIQ handlers
+        Pull    lr
+        B       SLVK
+
 50
   [ {FALSE}
         Push    "r1-r8"

s/MemInfo

@@ -1080,6 +1080,10 @@ ReleasePhysAddr
 ;                               9=HAL workspace
 ;                               10=Kernel buffers
 ;                               11=HAL uncacheable workspace
+;                               12=Kernel 'ZeroPage' workspace
+;                               13=Processor vectors
+;                               14=DebuggerSpace
+;                               15=Scratch space
 ;                       16-31   reserved (set to 0)
 ;
 ;       Out:    r1 = base of area
@@ -1111,6 +1115,10 @@ MAI_TableStart
         B       MAI_HALWs
         B       MAI_Kbuffs
         B       MAI_HALWsNCNB
+        B       MAI_ZeroPage
+        B       MAI_ProcVecs
+        B       MAI_DebuggerSpace
+        B       MAI_ScratchSpace
 MAI_TableEnd
 
 70
@@ -1200,6 +1208,37 @@ MAI_Kbuffs
         LDR     r3, =(KbuffsSize + &FFF) :AND: :NOT: &FFF
         EXIT
 
+MAI_ZeroPage
+        LDR     r1, =ZeroPage
+        MOV     r2, #16*1024
+        MOV     r3, #16*1024
+        EXIT
+
+MAI_ProcVecs
+      [ ZeroPage != ProcVecs
+        LDR     r1, =ProcVecs
+        MOV     r2, #4096
+        MOV     r3, #4096
+      ]
+        EXIT
+
+MAI_DebuggerSpace
+        ; Only report if DebuggerSpace is a standalone page. The debugger module
+        ; finds DebuggerSpace via OS_ReadSysInfo 6, this call is only for the
+        ; benefit of the task manager.
+      [ DebuggerSpace_Size >= &1000
+        LDR     r1, =DebuggerSpace
+        MOV     r2, #DebuggerSpace_Size
+        MOV     r3, #DebuggerSpace_Size
+      ]
+        EXIT
+
+MAI_ScratchSpace
+        LDR     r1, =ScratchSpace
+        MOV     r2, #16*1024
+        MOV     r3, #16*1024
+        EXIT
+
 ;----------------------------------------------------------------------------------------
 ;
 ;        In:    r0 = flags
@@ -1273,6 +1312,7 @@ CheckMemoryAccess ROUT
         CMP     r1, #32*1024
         BHS     %FT10
         ; Check zero page
+        ASSERT  ProcVecs = ZeroPage
       [ ZeroPage = 0
         MOV     r3, #0
         MOV     r4, #16*1024
@@ -1485,6 +1525,7 @@ CheckMemoryAccess ROUT
         MOV     r5, #CMA_ROM
         BL      CMA_AddRange
         ; Finally, high processor vectors/relocated zero page
+        ASSERT  ProcVecs = ZeroPage
       [ ZeroPage > 0
         ASSERT  ZeroPage > ROM
         MOV     r3, r10

s/Middle

@@ -1892,6 +1892,8 @@ osri6_table
     DCD  ZeroPage+ESC_Status                          ;82
     DCD  ZeroPage+VduDriverWorkSpace+ECFYOffset       ;83
     DCD  ZeroPage+VduDriverWorkSpace+ECFShift         ;84
+    DCD  ZeroPage+VecPtrTab                           ;85
+    DCD  NVECTORS                                     ;86
 osri6_maxvalue * (.-4-osri6_table) :SHR: 2