diff --git a/VersionASM b/VersionASM
index ede294c49f6e20d235454ded87fac6acfb467d07..9160a3c31015b40e10a9994376a8e85989050dbb 100644
--- a/VersionASM
+++ b/VersionASM
@@ -13,11 +13,11 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
-Module_MinorVersion SETS "4.79.2.270"
-Module_Date SETS "13 Jul 2015"
-Module_ApplicationDate SETS "13-Jul-15"
+Module_MinorVersion SETS "4.79.2.271"
+Module_Date SETS "17 Jul 2015"
+Module_ApplicationDate SETS "17-Jul-15"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
-Module_FullVersion SETS "5.35 (4.79.2.270)"
-Module_HelpVersion SETS "5.35 (13 Jul 2015) 4.79.2.270"
+Module_FullVersion SETS "5.35 (4.79.2.271)"
+Module_HelpVersion SETS "5.35 (17 Jul 2015) 4.79.2.271"
END
diff --git a/VersionNum b/VersionNum
index 09e8d80a38fa8a1f9aa4b05cfa76329bfd9b65d8..a9bfebd4e4eda8934069f8b3a6aa1427c138518b 100644
--- a/VersionNum
+++ b/VersionNum
@@ -5,19 +5,19 @@
*
*/
#define Module_MajorVersion_CMHG 5.35
-#define Module_MinorVersion_CMHG 4.79.2.270
-#define Module_Date_CMHG 13 Jul 2015
+#define Module_MinorVersion_CMHG 4.79.2.271
+#define Module_Date_CMHG 17 Jul 2015
#define Module_MajorVersion "5.35"
#define Module_Version 535
-#define Module_MinorVersion "4.79.2.270"
-#define Module_Date "13 Jul 2015"
+#define Module_MinorVersion "4.79.2.271"
+#define Module_Date "17 Jul 2015"
-#define Module_ApplicationDate "13-Jul-15"
+#define Module_ApplicationDate "17-Jul-15"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
-#define Module_FullVersion "5.35 (4.79.2.270)"
-#define Module_HelpVersion "5.35 (13 Jul 2015) 4.79.2.270"
+#define Module_FullVersion "5.35 (4.79.2.271)"
+#define Module_HelpVersion "5.35 (17 Jul 2015) 4.79.2.271"
#define Module_LibraryVersionInfo "5:35"
diff --git a/hdr/KernelWS b/hdr/KernelWS
index a8e1b1729ecb4fc056e0ffdfa5cdc5402df164fe..4beba73cfbec88afe09606fd42a7137f84a4593b 100644
--- a/hdr/KernelWS
+++ b/hdr/KernelWS
@@ -232,10 +232,12 @@ DANode_NodeSize # 0
; The addresses below are only temporary; eventually most of them will be allocated at run time (we hope!)
[ HiProcVecs
-ZeroPage * &FFFF0000
+ProcVecs * &FFFF0000
|
-ZeroPage * &00000000
+ProcVecs * &00000000
]
+; Currently, zero page must be located at the processor vectors
+ZeroPage * ProcVecs
[ HAL
; Sort out 26/32 bit versions
diff --git a/hdr/OSRSI6 b/hdr/OSRSI6
index 674043e3fd135e2b7eccd9fcb999d95b8e622d32..773213fa8085061382a9982cc2dae14a2286d6c6 100644
--- a/hdr/OSRSI6
+++ b/hdr/OSRSI6
@@ -84,5 +84,7 @@ OSRSI6_FPEAnchor * 81
OSRSI6_ESC_Status * 82
OSRSI6_ECFYOffset * 83
OSRSI6_ECFShift * 84
+OSRSI6_VecPtrTab * 85
+OSRSI6_NVECTORS * 86
END
diff --git a/s/Kernel b/s/Kernel
index 8121f3da10b56e0a428459482b873fccc3d48f3a..feff724364cbdd77ca5775f67b3cfad1c6def29b 100644
--- a/s/Kernel
+++ b/s/Kernel
@@ -1592,10 +1592,18 @@ Issue_Service_SWI ROUT
[ StrongARM
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; SWI OS_PlatformFeatures
+;
+; r0 = reason code:
+; 0 -> read code features
+; 1 -> read MMU features (ROL, unimplemented here)
+; 2-31 -> reserved just in case ROL have used them
+; 32 -> read processor vectors location
PlatFeatSWI ROUT
Push lr
- CMP r0, #0 ;Is it a known reason code?
+ CMP r0, #32 ;Is it a known reason code?
+ BEQ %FT30
+ CMP r0, #0
BNE %FT50 ;No, so send out a service call
;Ok, it's the 'code_features' reason code.
@@ -1617,6 +1625,13 @@ platfeat_irqinsert
MOV r0, r0
MOV pc, lr
+30
+ ; Return processor vectors base + size
+ LDR r0, =ProcVecs
+ MOV r1, #256 ; Currently only 256 bytes available for FIQ handlers
+ Pull lr
+ B SLVK
+
50
[ {FALSE}
Push "r1-r8"
diff --git a/s/MemInfo b/s/MemInfo
index 10fa10c4d3f7041c14759e61eb25e0862cf1bb0c..56576d78352579824814eeccafee37ac196a5ff2 100644
--- a/s/MemInfo
+++ b/s/MemInfo
@@ -1080,6 +1080,10 @@ ReleasePhysAddr
; 9=HAL workspace
; 10=Kernel buffers
; 11=HAL uncacheable workspace
+; 12=Kernel 'ZeroPage' workspace
+; 13=Processor vectors
+; 14=DebuggerSpace
+; 15=Scratch space
; 16-31 reserved (set to 0)
;
; Out: r1 = base of area
@@ -1111,6 +1115,10 @@ MAI_TableStart
B MAI_HALWs
B MAI_Kbuffs
B MAI_HALWsNCNB
+ B MAI_ZeroPage
+ B MAI_ProcVecs
+ B MAI_DebuggerSpace
+ B MAI_ScratchSpace
MAI_TableEnd
70
@@ -1200,6 +1208,37 @@ MAI_Kbuffs
LDR r3, =(KbuffsSize + &FFF) :AND: :NOT: &FFF
EXIT
+MAI_ZeroPage
+ LDR r1, =ZeroPage
+ MOV r2, #16*1024
+ MOV r3, #16*1024
+ EXIT
+
+MAI_ProcVecs
+ [ ZeroPage != ProcVecs
+ LDR r1, =ProcVecs
+ MOV r2, #4096
+ MOV r3, #4096
+ ]
+ EXIT
+
+MAI_DebuggerSpace
+ ; Only report if DebuggerSpace is a standalone page. The debugger module
+ ; finds DebuggerSpace via OS_ReadSysInfo 6, this call is only for the
+ ; benefit of the task manager.
+ [ DebuggerSpace_Size >= &1000
+ LDR r1, =DebuggerSpace
+ MOV r2, #DebuggerSpace_Size
+ MOV r3, #DebuggerSpace_Size
+ ]
+ EXIT
+
+MAI_ScratchSpace
+ LDR r1, =ScratchSpace
+ MOV r2, #16*1024
+ MOV r3, #16*1024
+ EXIT
+
;----------------------------------------------------------------------------------------
;
; In: r0 = flags
@@ -1273,6 +1312,7 @@ CheckMemoryAccess ROUT
CMP r1, #32*1024
BHS %FT10
; Check zero page
+ ASSERT ProcVecs = ZeroPage
[ ZeroPage = 0
MOV r3, #0
MOV r4, #16*1024
@@ -1485,6 +1525,7 @@ CheckMemoryAccess ROUT
MOV r5, #CMA_ROM
BL CMA_AddRange
; Finally, high processor vectors/relocated zero page
+ ASSERT ProcVecs = ZeroPage
[ ZeroPage > 0
ASSERT ZeroPage > ROM
MOV r3, r10
diff --git a/s/Middle b/s/Middle
index 3f65be41cbb038595db9168ecafb87b9df785b28..177f413c9ea29aece3bb0dfdfe54b2c1a0c48781 100644
--- a/s/Middle
+++ b/s/Middle
@@ -1892,6 +1892,8 @@ osri6_table
DCD ZeroPage+ESC_Status ;82
DCD ZeroPage+VduDriverWorkSpace+ECFYOffset ;83
DCD ZeroPage+VduDriverWorkSpace+ECFShift ;84
+ DCD ZeroPage+VecPtrTab ;85
+ DCD NVECTORS ;86
osri6_maxvalue * (.-4-osri6_table) :SHR: 2