GitLab

* Create new header file defining symbolic name for OS_AMBControl
  reason codes and flags
* Implement OS_AMBControl 9 (used to determine required size of buffer
  passed to OS_AMBControl 8 - potential thread safety issue not addressed)
* Return allocated error numbers in various failure cases

Version 6.38. Tagged as 'Kernel-6_38'

Edits to the RISCOS header file should really have gone through the
allocations system. Fortunately, no harm was done in this case, but a
minor syntactical change is required in order to bring it in line with
the automatic redaction scripts used when exporting the header from the
allocations database.

Version 6.37. Not tagged

* Listen out for PointerV 9, which (RISC OS 5) mouse drivers use to
indicate scroll wheel updates + extra button status
* Changes in the state of the extra buttons are treated the same as
changes to normal mouse buttons: signalled via Event_Mouse, and stored
in the mouse buffer (for reading via OS_Mouse).
* Changes in the scroll wheel(s) are signalled via Event_Expansion,4. If
the event vector call is unclaimed, the kernel's wheel position
accumulators will be updated
* Wheel position accumulators can be read via OS_Pointer 2
* Wheel position accumulators implement "wrap to zero" logic on overflow

This matches RISCOS Ltd's implementation
(http://www.riscos.com/support/developers/riscos6/input/pointerdevices.html),
except that:

* The kernel currently doesn't call PointerV 4, so PointerV 9 is the
only way drivers can report wheel + extra button status
* Extra mouse buttons don't generate KeyV transitions
* Our implementation is in the kernel, not an OSPointer module

Version 6.37. Tagged as 'Kernel-6_37'

During ModHandReason_ClaimAligned care is taken to start on a multiple of 32 and end on a multiple of 32 + 16 (such that the next block in the heap would be at +20 same as plain ModHandReason_Claim would do). However, during a ModHandReason_ExtendBlock there's a possibility that those criteria can't be retained, due to having to move to a larger gap elsewhere, leaving the end at an inconvenient +36.
Similar allocation functions in other OS' don't guarantee to return an extended block with the same alignment, so take the position that for extends we always allocate a fresh block, copy the contents, and free the original. Shrinks are left in place.
Tested with a random allocator which juggles 16 aligned allocations 50,000 times.

Version 6.36. Tagged as 'Kernel-6_36'

Very much like OS_Module 12, but returns the pointer to the PW rather than its contents (or NULL if the module died during init).

Trying to dump a file larger than 2GB starting from an offset below 2GB would fail because the compare checking whether PTR#han > EXT#han accidentally set V which was taken as an error (but with R0 not really being an error block).

OS_Module
=> R0=24
   R3=size in bytes
   R4=alignment in bytes (must be a power of 2)
<= R2=base of request
   or error
Tested with a handful of valid and invalid alignments, and with one grossly larger than the free RMA to trigger an RMA extend to occur.

Version 6.35. Tagged as 'Kernel-6_35'

Reporting invalid parameters to OS_Pointer and OS_ConvertDateAndTime could wander off to bad places due to corrupt LR and/or stack imbalance.

Detail:
  * various low-numbered dynamic areas used by RISC OS 6 and Pyromaniac
  * OS_ReadSysInfo 8 host platform classes for VirtualRPC, A9Home, Pyromaniac
  * OS_Byte 0,<not 0> MosVer values for various systems since the BBC micro
  * OS_Byte 129,0,255 (BASIC INKEY -256) values for various RISC OS systems

Admin:
  Discovered that these weren't really recorded anywhere during recent
  allocation request. Some information gleaned from http://beebwiki.mdfs.net

Version 6.34. Not tagged

Dynamic area PostGrow handlers aren't able to return errors, so the V
flag is likely undefined. Fix AreaGrow so that it ignores any V-set
condition returned by the call (especially since the CallPostGrow rapper
will have clobbered any error pointer).

Fixes issue reported on forums:
https://www.riscosopen.org/forum/forums/4/topics/14662

Version 6.34. Tagged as 'Kernel-6_34'

The XHCIDriver module adds 64k to get the register address. In an attempt to phase this out (so the registers are the true base address), assign a flag so that loading a suitable XHCIDriver on an old HAL still works.

Version 6.33. Not tagged

* Update OS_ScreenMode 11's handling of drivers which fail to
initialise. If there was no previous driver, then instead of trying to
restore that nonexistant driver, stick with the new one. This is mainly
to help with the case where the kernel's built in modes aren't accepted
by the driver, and valid modes only become available once an MDF is
loaded (this can happen with early OMAP3 chip revisions, which have very
tight sync & porch limits, causing 90% of the kernel's modes to be
rejected). If the kernel was to revert to the "no driver" state, then
loading the MDF would still leave you with no video output.
* Since we can now end up in a state where a driver is selected but
hasn't been programmed yet, update OS_Byte 19 to detect this (via the
magic ScreenBlankDPMSState value of 255) and avoid waiting for VSync
* Update RemovePages & InsertRemovePagesExit (screen DA handlers) to
avoid infinite loops if the screen DA gets shrunk to zero size (was seen
while attempting to complete the !Boot sequence while no driver was
active)

Version 6.33. Tagged as 'Kernel-6_33'

* Don't wait for VSync if we're in IRQ context, since (a) IRQ handlers
shouldn't take lots of time, and (b) it may hang the system. Fixes
https://www.riscosopen.org/tracker/tickets/424
* Extend the DPMSUtils-inherited "don't wait for VSync if HSync output
is off" fix to also deal with the case where VSync output is off, since
it's reasonable to assume that turning off VSync output could also
prevent the CPU from receiving the associated interrupts.

OS_DynamicArea 21, 22 & 25 were using the value of the PMP page list
pointer (DANode_PMP) to determine whether the dynamic area is a PMP or
not. However, PMPs which have had their max physical size set to zero
will don't have the page list allocated, which will cause the test to
fail. Normally this won't matter (those calls can't do anything useful
when used on PMPs with zero max size), except for the edge case of where
the SWI has been given a zero-length page list as input. By checking the
value of DANode_PMP, this would result in the calls incorrectly
returning an error.

Fix this by having the code check the DA flags instead. Also, add a
check to OS_DynamicArea 23 (PMP resize), otherwise non-PMP DAs could end
up having page lists allocated for them.

In OS_DynamicArea 2, a stack imbalance would occur if an error is
encountered while releasing the physical pages of a PMP (R1-R8 pushed,
but only R1-R7 pulled). Fix it, but also don't bother storing R1, since
it's never modified.

* Fix caching of page table entry flags (was never updating R9, so the
flags would be recalculated for every page)
* Fix use of flag in bottom bit of R6; if the flag was set, the
early-exit case for having made all the cacheable pages uncacheable will
never be hit, forcing it to loop through the full page list instead

If HAL+OS are contiguous, the combined image is initially mapped as
OSAP_None in order to allow for decompression. Fix the discontiguous
case to use the same permissions

Special case for empty files was crashing, fix by removing
which also supports files which report a size of zero but
actually contain data such as Unix device nodes and
Linux procfs.

Error where start outside file adjusted to permit a start
exactly at the end of a file to permit (apparently) empty
files with no output. Doing likewise for non-empty files
is consistent.

Also fix closing file in case of error reading GS format
from CMOS.

Version 6.32. Tagged as 'Kernel-6_32'

OS_DynamicArea 21 was treating MaxCamEntry as if it was the exclusive
upper bound, when really it's the inclusive bound. The consequence of
this was that PMPs were unable to explicitly claim the highest-numbered
RAM page in the system.

Version 6.31. Tagged as 'Kernel-6_31'

OS_CLI permits commands to be prefixed with a temporary filing
system, for example "ADFS:Format"

It also passes commands unrecognised to FileSwitch to be executed,
so "ADFS::HardDisc4.$.!Boot" first sets the temporary filing to
ADFS then executes ":HardDisc4.$.!Boot".

This does not work if the path contains a special field,
currently this results in an error as the special filed
would be lost.

Unfortunately many programs, including the RISC OS source
fail because of this.

Instead if a filing system prefix with special field
is found switch to the Temporary filing system and
treat the whole command as a path to execute. For example
passing "IXFS#W:$.HardDisc4.!Boot" sets the temporary filing
system to "IXFS" then executes "IXFS#W:$.HardDisc4.!Boot".

Version 6.30. Tagged as 'Kernel-6_30'

OS_DynamicArea 27 is the same as OS_DynamicArea 5 ("return free
memory"), except the result is measured in pages instead of bytes,
allowing it to behave sensibly on machines with many gigabytes of RAM.

Similarly, OS_DynamicArea 28 is the same as OS_DynamicArea 7 (internal
DA enumeration call used by TaskManager), except the returned size
values are measured in pages instead of bytes. A flags word has also
been added to allow for more expansion in the future.

Hdr:OSMem now also contains some more definitions which external code
will find useful.

Version 6.29. Tagged as 'Kernel-6_29'

Version 6.28. Not tagged

This change adds a new OS_Memory reason code, 23, for reserving memory
without actually assigning it to a dynamic area. Other dynamic areas can
still use the memory, but only the code that reserved it will be allowed
to claim exclusive use over it (i.e. PageFlags_Unavailable).

This is useful for systems such as the PCI heap, where physically
contiguous memory is required, but the memory isn't needed all of the
time. By reserving the pages, it allows other regular DAs to make use of
the memory when the PCI heap is small. But when the PCI heap needs to
grow, it guarantees that (if there's enough free memory in the system)
the previously reserved pages can be allocated to the PCI heap.

Notes:

* Reservations are handled on an honour system; there's no checking that
the program that reserved the memory is the one attempting to map it in.

* For regular NeedsSpecificPages DAs, reserved pages can only be used if
the special "RESV" R0 return value is used.

* For PMP DAs, reserved pages can only be made Unavailable if the entry
in the page block also specifies the Reserved page flag. The actual
state of the Reserved flag can't be modified via PMP DA ops, the flag is
only used to indicate the caller's permission/intent to make the page
Unavailable.

* If a PMP DA tries to make a Reserved page Unavailable without
specifying the Reserved flag, the kernel will try to swap it out for a
replacement page taken from the free pool (preserving the contents and
generating Service_PagesUnsafe / Service_PagesSafe, as if another DA
had claimed the page)

Version 6.28. Tagged as 'Kernel-6_28'

 * MinAplWork isn't used.
 * SuperMode isn't used and is less well known than "SWI OS_EnterOS".
 * MEMCADR is now only a magic value returned by OS_UpdateMEMC,
   so it is clearer to include it literally with comment.

Added a comment to explain the baffling combination of
the MEMC1 control register's address with it's value.


Version 6.27. Not tagged

This makes SVLK and NVECTORS available.

Version 6.27. Tagged as 'Kernel-6_27'

Version 6.26. Tagged as 'Kernel-6_26'

Detail:
Similar to HeapReason_GetAligned, GetSkewAligned is used for allocating
aligned blocks (with optional boundary limit). However instead of using
the logical address of the user portion of the block for the alignment
calculation, it uses an arbitrary offset specified in R5. This makes
it useful for clients such as the PCI module, which care about the
physical alignment of blocks rather than logical alignment.

Admin:
Tested with heaptest

Detail:
Kernel-5_44 tweaked the heap manager to try and avoid creating small
free blocks. Adjust HeapTest's block size checks so that it allows for
this behaviour.

Admin:
Tested briefly

Version 6.25. Tagged as 'Kernel-6_25'

Detail:
  Add offset parameter to DumpyTheRegisters in R4
  Shuffle internal register use up one
  Set R4 to offset before calling.
  Arbitrary offset of 0 for unreachable address exception handler.

Admin:
  Tested in RPCEmu.

Between RISC OS 3.6 and 3.7 the directory was renamed from
Doc to Docs and was duplicated during CVS import.

Fix by deleting Doc. Identical files remain in Docs.


Version 6.24. Not tagged

Detail:
This adds a new OS_DynamicArea reason code, 26, for adjusting
AplWorkMaxSize at runtime. This allows compatibility tools such as
Aemulor to adjust the limit without resorting to patching the kernel.
Any adjustment made to the value will affect the upper limit of
application space, and the lower limit of dynamic area placement.
Attempting to adjust beyond the compile-time upper/default limit, or
such that it will interfere with existing dynamic areas / wimpslots,
will result in an error.

Relevant forum thread:
https://www.riscosopen.org/forum/forums/11/topics/14734

Admin:
Tested on BB-xM, desktop active & inactive

Version 6.24. Tagged as 'Kernel-6_24'

Detail:

- s/HAL - Fix ADD v. SUB muddle that could prevent addresses from being rounded down correctly. Fix incorrect logical address being returned to caller on pre-ARMv6 machines due to PageTableSync corrupting a1.
- s/NewReset - Initialising the CMOS RAM cache while in the middle of setting up the processor vectors feels a bit silly. Move the code to just afterwards so that it feels a bit safer, and so that early crashes are easier to debug (processor vectors in stable state)

Admin:

Tested on Iyonix.
Fixes ROM softload failure reported on forums:
https://www.riscosopen.org/forum/forums/11/topics/14749

Version 6.23. Tagged as 'Kernel-6_23'

To achieve this:
* DecodeL1Entry and DecodeL2Entry return 64-bit physical addresses in
  r0 and r1, with additional return values shuffled up to r2 and r3
* DecodeL1Entry now returns the section size, so callers can distinguish
  section- from supersection-mapped memory
* PhysAddrToPageNo now accepts a 64-bit address (though since the physical
  RAM table is currently still all 32-bit, it will report any top-word-set
  addresses as being not in RAM)

Version 6.22. Tagged as 'Kernel-6_22'

Add a new reason code, OS_Memory 22, equivalent to OS_Memory 14, but
accepting a 64-bit physical address in r1/r2. Current ARM architectures can
only express 40-bit or 32-bit physical addresses in their page tables
(depending on whether they feature the LPAE extension or not) so unlike
OS_Memory 14, OS_Memory 22 can return an error if an invalid physical
address has been supplied. OS_Memory 15 should still be used to release a
temporary mapping, whether you claimed it using OS_Memory 14 or OS_Memory 22.

The logical memory map has had to change to accommodate supersection mapping
of the physical access window, which needs to be 16MB wide and aligned to a
16MB boundary. This results in there being 16MB less logical address space
available for dynamic areas on all platforms (sorry) and there is now a 1MB
hole spare in the system address range (above IO).

The internal function RISCOS_AccessPhysicalAddress has been changed to
accept a 64-bit physical address. This function has been a candidate for
adding to the kernel entry points from the HAL for a long time - enough that
it features in the original HAL documentation - but has not been so added
(at least not yet) so there are no API compatibility issues there.

Requires RiscOS/Sources/Programmer/HdrSrc!2

This is facilitated by two extended calls. From the HAL:
* RISCOS_MapInIO64 allows the physical address to be specified as 64-bit

From the OS:
* OS_Memory 21 acts like OS_Memory 13, but takes a 64-bit physical address

There is no need to extend RISCOS_LogToPhys, instead we change its return
type to uint64_t. Any existing HALs will only read the a1 register, thereby
narrowing the result to 32 bits, which is fine because all existing HALs
only expected a 32-bit physical address space anyway.

Internally, RISCOS_MapInIO has been rewritten to detect and use supersections
for IO regions that end above 4GB. Areas that straddle the 4GB boundary should
also work, although if you then search for a sub-area that doesn't, it won't
find a match and will instead map it in again using vanilla sections - this is
enough of an edge case that I don't think we need to worry about it too much.

The rewrite also conveniently fixes a bug in the old code: if the area being
mapped in went all the way up to physical address 0xFFFFFFFF (inclusive) then
only the first megabyte of the area was actually mapped in due to a loop
termination issue.

Requires RiscOS/Sources/Programmer/HdrSrc!2

ControlList_Interlaced is taken to have meant "output interlaced sync on H/V" and "configure DMA to show alternate lines in the framestore on alternate fields", therefore SyncPol flags mean:
b43
 00 = 'normal' progressive scan
 01 = interlaced sync, but both fields show the same image
 10 = (invalid)
 11 = interlaced sync, fields use alternate lines from the image

Version 6.21. Tagged as 'Kernel-6_21'

Without this, some CPUs (including Cortex-A72) take the undefined instruction
trap when encountering any CP15-encoded barrier instructions.

Requires RiscOS/Sources/Programmer/HdrSrc!1

Version 6.20. Tagged as 'Kernel-6_20'

Detail:
  s/vdu/vdudriver - When mapping external framestores, only double-map them if the driver supports hardware scrolling. Avoids wasting IO address space, and reduces IO space fragmentation if the framestore address changes
Admin:
  Tested on Raspberry Pi 3


Version 6.19. Tagged as 'Kernel-6_19'

Detail:
  s/vdu/vdupalxx:
  - Fix conditional code sequence in PV_BulkWrite which meant that the greyscale palette flag was being recalculated when the border or pointer colour was changed.
  - Change PV_1stFlashState / PV_2ndFlashState to act as NOPs in true colour modes, which helps to avoid regular redundant gamma table updates (due to the flashing colour logic in the VSync handler).
Admin:
  Tested on Raspberry Pi 3


Version 6.18. Tagged as 'Kernel-6_18'