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Fix some re-entrancy issues. Minor optimisations.
Jeffrey Lee authored 
Detail:
  s/TickEvents:
  - Change initial TickNodeLeft check in ProcessTickEventChain to exit on HI rather than NE. This fixes a case where the ticker event chain can become corrupted if ProcessTickEventChain is re-entered while in the middle of processing multiple nodes which are due to fire at the same time (after initial node is removed from the list, head node will be left with a TickNodeLeft value of 0)
  - Move "IRQ's off again" PSR write to be after the 10 label, to ensure that IRQs are off before we examine/process the next node (naughty CallEvery may have exited with IRQs enabled)
  - Stop using crusty old WritePSRc macro (currently generates 4 instructions for something that should be 1)
  - Also get rid of ARM2-era NOPs
  - Optimise CallEvery check to be MOVS rather than LDR + CMP
Admin:
  Tested on Pandaboard
  Should fix problem reported on forums with apparent wrap-around of TickNodeLeft value of first node: https://www.riscosopen.org/forum/forums/5/topics/3544
  May also fix other ticker corruption problems: https://www.riscosopen.org/forum/forums/4/topics/2708


Version 5.35, 4.79.2.278. Tagged as 'Kernel-5_35-4_79_2_278'
cbfc4ff1
Name Last commit Last update
..
AMBControl Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
PMF Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
vdu Fix software pointer being enabled when it isn't needed. Improve HangWatch support.
ARM600 Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
ARMops Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
Arthur2 Make OS_GSTrans be more sensible about what it treats as system variables
Arthur3 Review of Internation switch
ArthurSWIs Add OS_Memory 24 implementation. Change OS_ValidateAddress to use it. Fix kernel leaving the physical access MB in a messy state. Try and protect against infinite abort loops caused by bad environment handlers.
ChangeDyn Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
Convrsions Add OS_Memory 24 implementation. Change OS_ValidateAddress to use it. Fix kernel leaving the physical access MB in a messy state. Try and protect against infinite abort loops caused by bad environment handlers.
End Commit of kernel as featured in release 5.00.
ExtraSWIs Add zero page relocation support
FlashROM 32-bit Kernel.
GetAll Add ARMops for PL310 L2 cache controller
HAL Fix DebuggerSpace page to be cacheable
HeapMan Sort out SetBorder
HeapSort Add compressed ROM support. Make more use of ARMv5+ instructions. Other misc tweaks.
KbdResA1 32-bit Kernel.
KbdResPC Add zero page relocation support
KbdResRCMM Reimplement enhancements to kernel Dynamic Area support from
Kernel Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.
LibKern More HAL work. IOMD HAL work in progress. Lots of my own little build scripts. Don't touch this.
MEMC1 Import from cleaned 360 CD
MEMC2 Import from cleaned 360 CD
MOSDict Import from cleaned 360 CD
MemInfo
Middle
ModHand
MoreComms
MoreSWIs
Morris
MsgCode
NewIRQs
NewReset
Oscli
SWINaming
Super1
SysComms
TickEvents
UnSqueeze
Utility
VMSAv6