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Commit 3f877936 authored by Mike Stephens's avatar Mike Stephens
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Reimplement enhancements to kernel Dynamic Area support from 

Ursula. Quite a hairy code merge really, so let's hope it is
worth it to someone. What you get (back after 2 or 3 years):
- much more efficient for largish numbers of DAs (relevance
  to current build = approx 0)
- fancy reason codes to support fast update of
  Switcher bar display (relevance = 0)
- support for clamped maximum area sizes, to avoid address
  space exhaustion with big memory (relevance = 0)
- better implementation of shrinkable DAs, performance
  wise (if lots of DAs, relevance = approx 0)
- support for 'Sparse' DAs. Holey dynamic areas, Batman!
  (relevance, go on someone use the darned things)
Moderately development tested on HAL/32bit ARM9 desktop.
Note the Switcher should be compiled to use the new
reason codes 6&7, for fabled desktop builds.

Also, during this work, so I could see the wood for the
trees, redid some source code clean up, removing pre-Medusa
stuff (like I did about 3 years ago on Ursula, sigh). That's
why loads of source files have changed. The new DA stuff
is confined pretty much to hdr.KernelWS and s.ChangeDyn.

Ta.

Version 5.35, 4.79.2.38. Tagged as 'Kernel-5_35-4_79_2_38'
parent 8727ebaa
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VersionASM
View file @ 3f877936
......@@ -13,12 +13,12 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.37"
Module_Date SETS "15 Jun 2001"
Module_ApplicationDate2 SETS "15-Jun-01"
Module_ApplicationDate4 SETS "15-Jun-2001"
Module_MinorVersion SETS "4.79.2.38"
Module_Date SETS "18 Jun 2001"
Module_ApplicationDate2 SETS "18-Jun-01"
Module_ApplicationDate4 SETS "18-Jun-2001"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.35 (4.79.2.37)"
Module_HelpVersion SETS "5.35 (15 Jun 2001) 4.79.2.37"
Module_FullVersion SETS "5.35 (4.79.2.38)"
Module_HelpVersion SETS "5.35 (18 Jun 2001) 4.79.2.38"
END
VersionNum
View file @ 3f877936
......@@ -4,19 +4,19 @@
*
*/
#define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.37
#define Module_Date_CMHG 15 Jun 2001
#define Module_MinorVersion_CMHG 4.79.2.38
#define Module_Date_CMHG 18 Jun 2001
#define Module_MajorVersion "5.35"
#define Module_Version 535
#define Module_MinorVersion "4.79.2.37"
#define Module_Date "15 Jun 2001"
#define Module_MinorVersion "4.79.2.38"
#define Module_Date "18 Jun 2001"
#define Module_ApplicationDate2 "15-Jun-01"
#define Module_ApplicationDate4 "15-Jun-2001"
#define Module_ApplicationDate2 "18-Jun-01"
#define Module_ApplicationDate4 "18-Jun-2001"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "RiscOS/Sources/Kernel"
#define Module_FullVersion "5.35 (4.79.2.37)"
#define Module_HelpVersion "5.35 (15 Jun 2001) (4.79.2.37)"
#define Module_FullVersion "5.35 (4.79.2.38)"
#define Module_HelpVersion "5.35 (18 Jun 2001) (4.79.2.38)"
hdr/Copro15ops
View file @ 3f877936
......@@ -215,7 +215,7 @@ C15 CN 15
; -------------- ARM 810 only ----------------------------------------------
;
[ ARM810support
[ {FALSE}
;turn off branch prediction
; - the forced mispredicted branch ensures that the predictor is trapped in
......
hdr/KernelWS
View file @ 3f877936
......@@ -213,18 +213,21 @@ OldOpt SETA {OPT}
; Dynamic area node format
^ 0
DANode_Link # 4 ; points to next node
DANode_Number # 4 ; number of this area
DANode_Base # 4 ; base address of area (points in middle of doubly-mapped areas)
DANode_Flags # 4 ; various flags
DANode_Size # 4 ; current size of area
DANode_MaxSize # 4 ; maximum size of area
DANode_Workspace # 4 ; workspace pointer when calling handlers
DANode_Handler # 4 ; pointer to handler routine for area
DANode_Title # 4 ; pointer to area title (variable length)
DANode_NodeSize # 0
^ 0
DANode_Link # 4 ; points to next node
DANode_Number # 4 ; number of this area
DANode_Base # 4 ; base address of area (points in middle of doubly-mapped areas)
DANode_Flags # 4 ; various flags
DANode_Size # 4 ; current size of area (not counting holes, if Sparse area)
DANode_MaxSize # 4 ; maximum size of area
DANode_Workspace # 4 ; workspace pointer when calling handlers
DANode_Handler # 4 ; pointer to handler routine for area
DANode_Title # 4 ; pointer to area title
DANode_SubLink # 4 ; next node in any disjoint sublist (currently used for Shrinkables only)
DANode_SparseHWM # 4 ; high water mark, if Sparse area (highest base+size claimed for area)
DANode_SortLink # 4 ; next node in alphabetically sorted list
DANode_NodeSize # 0
; The addresses below are only temporary; eventually most of them will be allocated at run time (we hope!)
......@@ -1064,12 +1067,12 @@ DAList # 4 ; Pointer to first node on dynamic area list
AlignSpace 16
AMBControl_ws # 4 ; workspace anchor word for AMBControl
ARMA_Cleaner_flipflop # 4 ; address of 16k StrongARM data cache cleaner area (flip flops between two)
DynArea_ws # 4 ; workspace anchor word for data structures to accelerate OS SWIs for dynamic areas
[ StrongARM
SyncCodeA_sema # 1 ; re-entrancy semaphore for SynchroniseCodeAreas (full address space version)
[ :DEF: ShowWS
! 0, "AMBControl_ws at ":CC::STR:(AMBControl_ws)
! 0, "ARMA_Cleaner_flipflop at ":CC::STR:(ARMA_Cleaner_flipflop)
! 0, "AMBControl_ws at ":CC::STR:(AMBControl_ws)
! 0, "DynArea_ws at ":CC::STR:(DynArea_ws)
! 0, "SyncCodeA_sema (byte) at ":CC::STR:(SyncCodeA_sema)
]
]
......@@ -1226,7 +1229,7 @@ ProcVec_UndInst # 4 ; Undefined instruction vector
ProcVec_SWI # 4 ; SWI vector
ProcVec_PrefAb # 4 ; Prefetch abort vector
ProcVec_DataAb # 4 ; Data abort vector
ProcVec_AddrEx # 4 ; Address exception vector (not useful on ARM600/700)
ProcVec_AddrEx # 4 ; not used (was Address exception vector on 26-bit-only ARMs)
ProcVec_IRQ # 4 ; IRQ vector
ProcVec_End # 0
......@@ -1256,13 +1259,11 @@ AppSpaceDANode # DANode_NodeSize ; Dummy area node for application space
FreePoolDANode # DANode_NodeSize ; Area node for free pool
SysHeapDANode # DANode_NodeSize ; Area node for system heap
CDASemaphore # 4 ; Semaphore for OS_ChangeDynamicArea - non-zero => routine threaded
MMUControlSoftCopy # 4 ; Soft copy of ARM600/700 control register
MMUControlSoftCopy # 4 ; Soft copy of ARM control register
AplWorkSize * AppSpaceDANode + DANode_Size
[ LongCommandLines
OldEnvString # 256 ;spare
|
[ :LNOT: LongCommandLines
EnvString # 256
]
......@@ -1881,11 +1882,12 @@ OscliCircBuffLimit # 0
KbuffsEnd # 0
KbuffsSize * KbuffsEnd - KbuffsBaseAddress ;size of Kernel buffers area
ASSERT KbuffsSize <= KbuffsMaxSize
ASSERT ((KbuffsSize + &FFF) :AND: &FFFFF000) <= KbuffsMaxSize
! 0, "Kbuffs at ":CC::STR:(KbuffsBaseAddress)
! 0, "Kbuffs Size is ":CC::STR:(KbuffsSize)
[ {FALSE}
! 0, "GeneralMOSBuffer at ":CC::STR:(GeneralMOSBuffer)
! 0, "EnvString at ":CC::STR:(EnvString)
! 0, "AliasExpansionBuffer at ":CC::STR:(AliasExpansionBuffer)
......@@ -1894,6 +1896,7 @@ KbuffsSize * KbuffsEnd - KbuffsBaseAddress ;size of Kernel buffers
! 0, "exprSTRACC at ":CC::STR:(exprSTRACC)
! 0, "RedirectBuff at ":CC::STR:(RedirectBuff)
! 0, "OscliCircBuffStart at ":CC::STR:(OscliCircBuffStart)
]
] ;LongCommandLines
......
hdr/Options
View file @ 3f877936
......@@ -156,22 +156,13 @@ SoftResets SETL {FALSE}
AlwaysClearRAM SETL {TRUE}
GBLL CacheCMOSRAM ; Whether to keep a RAM copy of CMOS RAM for faster access
CacheCMOSRAM SETL MEMM_Type = "ARM600" ; (Space only allocated on ARM600 versions)
CacheCMOSRAM SETL {TRUE}
GBLL LCDInvert
LCDInvert SETL (VIDC_Type = "VIDC20") :LAND: {TRUE} :LAND: :LNOT: STB
GBLL ExpandedCamMap ; two words per entry instead of one
ExpandedCamMap SETL MEMM_Type = "ARM600" ; NB ARM600 code assumes expanded map
GBLL UseFreePool ; whether OS_ChangeDynamicArea puts and gets memory to and from free pool
UseFreePool SETL MEMM_Type = "ARM600" :LAND: {TRUE}
GBLL NewCDA ; new change dynamic area code
NewCDA SETL MEMM_Type = "ARM600" :LAND: {TRUE} ; let's give it a try!
LCDInvert SETL {TRUE} :LAND: :LNOT: STB
GBLL ModeSelectors ; whether mode selectors are understood
ModeSelectors SETL (VIDC_Type = "VIDC20") :LAND: {TRUE}
ModeSelectors SETL {TRUE}
GBLL MakeModeSelectorsForModeNumbers
MakeModeSelectorsForModeNumbers SETL ModeSelectors :LAND: {FALSE} ; not actually needed after all
......@@ -180,7 +171,7 @@ MakeModeSelectorsForModeNumbers SETL ModeSelectors :LAND: {FALSE} ; not ac
IgnoreVRAM SETL {FALSE}
GBLL LateAborts ; if true, use late abort mode on ARM600 (compulsory on ARM700)
LateAborts SETL MEMM_Type = "ARM600" :LAND: {TRUE}
LateAborts SETL {TRUE}
GBLL ShrinkableDAs ; if true, support Shrinkable Dynamic Areas (eg. CacheFS)
ShrinkableDAs SETL {TRUE}
......@@ -211,12 +202,6 @@ LongCLISize * 1024 ; buffer size for long commands
GBLL SASTMhatbroken ;whether ROM must support SA110's with broken STM^ (revision 3 should fix this)
GBLL StrongARM_POST ;whether to run POST for StrongARM (and possibly ARM8)
GBLL ARM810support ;StrongARM must also be true for this to be useful
GBLL ARM810cleanflushbroken ;whether single MCR for IDC clean+flush broken (a la StrongARM!)
GBLL ARM810fastclock ;whether to attempt to use fast clock (false means bus clock)
GBLL ARM810usePLL ;whether to use PLL for fast clock (else RefClk pin)
GBLL ARM810_POST ;whether to run POST for ARM810 (StrongARM_POST must also be true)
GBLL ARM6support
StrongARM SETL {TRUE}
......@@ -224,15 +209,13 @@ SAcleanflushbroken SETL {TRUE} :LAND: StrongARM
SASTMhatbroken SETL {TRUE} :LAND: StrongARM
StrongARM_POST SETL {TRUE} :LAND: StrongARM
ARM810support SETL {FALSE} :LAND: StrongARM
ARM810cleanflushbroken SETL {TRUE} :LAND: ARM810support
ARM810fastclock SETL {FALSE} :LAND: ARM810support
ARM810usePLL SETL {TRUE} :LAND: ARM810fastclock
ARM810_POST SETL {FALSE} :LAND: ARM810support
ARM6support SETL {TRUE}
;mjs
;concept of sparsely mapped dynamic areas introduced for Ursula
GBLL DA_Batman ;Holey dynamic areas Batman!
;mjs
;Chocolate flavours implemented for Ursula, but they are generally useful performance enhancements
;(not all Ursula performance improvements are flagged with Chocolate - eg. simple changes such as slicker SWI
......@@ -252,6 +235,8 @@ ARM6support SETL {TRUE}
;
GBLL ChocolateAMB ;whether to compile support for Lazy task swapping
DA_Batman SETL {TRUE}
ChocolateSysHeap SETL {TRUE}
ChocolateOSMod SETL {TRUE}
ChocolateSysVars SETL {TRUE}
......@@ -292,25 +277,22 @@ mjsSysHeapNodesTrace SETL {FALSE}
NoSPSRcorruption SETL {FALSE} ;preserves SPSR_SVC
GBLL CheckProtectionLink ; if true, disallow CMOS RAM changes if link in protected position
CheckProtectionLink SETL (IO_Type = "IOMD") :LAND: {TRUE} ; NB affects Delete/Copy/R/T and 0-9/.
CheckProtectionLink SETL {TRUE} ; NB affects Delete/Copy/R/T and 0-9/.
GBLL RMTidyDoesNowt ; if true, RMTidy does nothing
RMTidyDoesNowt SETL (MEMC_Type = "IOMD") :LAND: {TRUE} ; should really be "machine has FSLock in ROM"
RMTidyDoesNowt SETL {TRUE} ; should really be "machine has FSLock in ROM"
GBLL RogerEXEY ; if true, use Roger's new algorithm for XEigFactor, YEigFactor
RogerEXEY SETL {FALSE} ; Marketing don't like it!
GBLL DAF_SpecifyBit ; enable use of dynamic area flag which says an area may need specific pages
DAF_SpecifyBit SETL {TRUE}
GBLL DebugROMInit
DebugROMInit SETL (MEMC_Type = "IOMD") :LAND: {TRUE}
DebugROMInit SETL {TRUE}
GBLL DebugROMPostInit ; Displays when the PostInit service call is sent to each ROM module (currently works on vanilla service call handling only)
DebugROMPostInit SETL (MEMC_Type = "IOMD") :LAND: :LNOT: ChocolateService :LAND: {FALSE}
DebugROMPostInit SETL (:LNOT: ChocolateService) :LAND: {FALSE}
GBLL DebugROMErrors
DebugROMErrors SETL (MEMC_Type = "IOMD") :LAND: {TRUE}
DebugROMErrors SETL {TRUE}
GBLL DebugHeaps ; initialise claimed and freed blocks
DebugHeaps SETL {FALSE} ; (may slow things down unacceptably)
......@@ -323,29 +305,6 @@ DebugCDA SETL {FALSE}
GBLL DebugCDA2
DebugCDA2 SETL {FALSE}
GBLL NewCDA2 ; whether all the new CDA code is in there
NewCDA2 SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_RMA ; whether RMA is a new style area
NewStyle_RMA SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_SpriteArea ; whether sprite area is a new style area
NewStyle_SpriteArea SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_RAMDisc ; whether RAM disc is a new style area
NewStyle_RAMDisc SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_FontArea ; whether font cache is a new style area
NewStyle_FontArea SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_SysHeap ; whether system heap is a new style area (node faked up)
NewStyle_SysHeap SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_Screen ; whether screen is a new style area
NewStyle_Screen SETL NewCDA :LAND: {TRUE}
GBLL NewStyle_All ; whether all old-style areas have been converted to new-style
NewStyle_All SETL NewStyle_RMA :LAND: NewStyle_SpriteArea :LAND: NewStyle_RAMDisc :LAND: NewStyle_FontArea :LAND: NewStyle_SysHeap :LAND: NewStyle_Screen
GBLL StorkPowerSave ;True => power saving for Stork AND A4
StorkPowerSave SETL MorrisSupport ;False=> older A4 code only
......
s/AMBControl/memmap
View file @ 3f877936
......@@ -137,7 +137,7 @@ AMB_LazyFixUp ROUT
SUBS r2,r2,#1
ADD r1,r1,#PageSize
BNE %BT30
MSR SPSR_all,r0 ;SPSR for original abort
MSR SPSR_cxsf,r0 ;SPSR for original abort
MOV lr,r4 ;restore return address
;
90
......
s/ChangeDyn
View file @ 3f877936
This diff is collapsed.
s/KbdResPC
View file @ 3f877936
......@@ -19,7 +19,6 @@
; and SetUpKbd.
; For now, use development podule in slot 0.
[ IO_Type = "IOMD"
IOBase * IOMD_Base
IOData * IOCSERTX
IOStatus * IOMD_KBDCR
......@@ -28,16 +27,6 @@ stat_RXF * IOMD_KBDCR_RxF
stat_TXE * IOMD_KBDCR_TxE
ctl_Enable * IOMD_KBDCR_Enable
ctl_EnableIRQ * 0 ; not needed on IOMD
|
IOBase * &03000000
IOData * 0
IOStatus * 4
IOControl * 4
stat_RXF * &20
stat_TXE * &80
ctl_Enable * &08
ctl_EnableIRQ * &80
]
; PC keyboard codes we are interested in.
......
s/KbdResRCMM
View file @ 3f877936
......@@ -28,7 +28,6 @@
; ConfigureCombo etc only write to IOSystemType, which has now been moved to SkippedTables
; so it doesn't get wiped by ClearPhysRam.
ASSERT IO_Type = "IOMD"
ASSERT :LNOT: BatManSupport
UART2 * ComboBase + &2F8*4 ; -> base of UART 2
......
s/Kernel
View file @ 3f877936
......@@ -95,12 +95,8 @@ Module_BaseAddr SETA 0
$l SetBorder $reg1, $reg2, $red, $green, $blue, $delay
! 0, "Setborder used"
$l LDR $reg1, =VIDC
[ VIDC_Type = "VIDC20"
; Note $reg, $green and $blue are 4 bit values
LDR $reg2, =&40000000+(($red)*&11)+(($green)*&1100)+(($blue)*&110000)
|
LDR $reg2, =&40000000+ $red + $green *16 + $blue *256
]
STR $reg2, [$reg1]
[ "$delay"<>""
MOV $reg1, #$delay
......@@ -699,22 +695,14 @@ JTABLE & SWIWriteC ; this entry never gets used (see ^)
& ScreenModeSWI
& DynamicAreaSWI
& NoSuchSWI ; OS_AbortTrap
[ CPU_Type = "ARM600"
& MemorySWI
|
& NoSuchSWI
]
[ ProcessorVectors
& ClaimProcVecSWI
|
& NoSuchSWI
]
& PerformReset
[ CPU_Type = "ARM600"
& MMUControlSWI
|
& NoSuchSWI
]
[ STB
& NoSuchSWI
|
......
s/MemInfo
View file @ 3f877936
......@@ -719,22 +719,11 @@ MemoryIOSpace ROUT
EXIT
controller_types
[ IO_Type = "IOMD"
DCD IOMD_Base + IOMD_ECTCR ; Expansion card timing control.
DCD easi_space_table - controller_types
|
DCD 0
DCD 0
]
[ VIDC_Type = "VIDC20"
DCD 0
DCD VIDC
|
DCD VIDC
DCD 0
]
[ IO_Type = "IOMD"
easi_space_table
DCD 8 ; Maximum of 8 expansion cards.
DCD PhysSpace + IOMD_EASI_Base0
......@@ -745,7 +734,6 @@ easi_space_table
DCD PhysSpace + IOMD_EASI_Base5
DCD PhysSpace + IOMD_EASI_Base6
DCD PhysSpace + IOMD_EASI_Base7
]
] ; HAL
;----------------------------------------------------------------------------------------
......
s/Middle
View file @ 3f877936
......@@ -1337,19 +1337,7 @@ IOST_BATMAN * 64 ;Stork keyboard/battery controller seems to be present
ANDS r1, r0, #IOST_COMBOMASK
MOVNE r1, #1 ; make r1 0 or 1
[ IO_Type = "IOMD"
[ VIDC_Type = "VIDC20"
LDR r0, =&01010100
|
LDR r0, =&00010100
]
|
ANDS r0, r0, #IOST_IOEB
MOVNE r0, #1 ; make r1 0 or 1
[ VIDC_Type = "VIDC20"
ORR r0, r0, #&01000000
]
]
ExitSWIHandler
]
......@@ -1724,7 +1712,7 @@ osri6_table
DCD MaxCamEntry ;1
DCD PageFlags_Unavailable ;2
DCD PhysRamTable ;3
DCD ARMA_Cleaner_flipflop ;4
DCD 0 ;4 (was ARMA_Cleaner_flipflop, no longer exists in HALised kernel)
DCD TickNodeChain ;5
DCD ROMModuleChain ;6
DCD DAList ;7
......
s/ModHand
View file @ 3f877936
......@@ -199,8 +199,6 @@ ModuleInit Entry "r0-r12" ; call here on system st
; doing podule ROM
[ IO_Type = "IOMD"
ASSERT ?PoduleFrugalCMOS = 8 ; ensure we're using the correct Hdr:CMOS
CMP r12, #7 ; if bit number <= 7
CMPLS r3, #8 ; then if podule number <= 8
......@@ -209,13 +207,6 @@ ModuleInit Entry "r0-r12" ; call here on system st
MOVHI r11, #0 ; otherwise no CMOS
ORRLS r11, r11, r14, LSL r12 ; OR in bit mask
B %FT36
|
ASSERT ?PoduleFrugalCMOS >= 4
CMP r3, #4 ; if podule number < 4
CMPCC r12, #8 ; and bit number < 8
ADDCC r11, r3, #PoduleFrugalCMOS ; then compute CMOS address
ORRCC r11, r11, r14, LSL r12 ; and OR in bit mask
]
B %FT35
; doing extension ROM
......
s/NewIRQs
View file @ 3f877936
......@@ -129,7 +129,6 @@ DefaultIRQ1Vcode ROUT
MOV r14, r11
ADD r1, pc, r1, LSL #2 ; so table contains DevNo * 3
|
[ IO_Type = "IOMD"
MOV r3, #IOC ; base for IOC and IOMD
LDRB r0, [r3, #IOMD_DMAREQ]
TEQ r0, #0
......@@ -157,16 +156,6 @@ DefaultIRQ1Vcode ROUT
ADREQ r1, IrqReqADevnos
LDRB r0, [r1, r0] ; pick up offset in device despatcher
| ; IO_Type
MOV r3, #IOC
LDRB r0, [r3, #IOCIRQREQB]
CMP r0, #0
LDREQB r0, [r3, #IOCIRQREQA]
ADREQ r1, IrqReqADevnos
ADRNE r1, IrqReqBDevnos
LDRB r0, [r1, r0] ; pick up offset in device despatcher
] ; IO_Type
ADD r1, pc, r0, LSL #2 ; so table contains DevNo * 3
] ; HAL
LDMIA r1, {r12, pc}
......@@ -189,15 +178,11 @@ NoInterrupt * 64
| ; HAL
[ IO_Type = "IOMD"
[ MorrisSupport
NoInterrupt * 38 ; Morris has IOMD's extra interrupts plus 16 of its own
|
NoInterrupt * 22 ; IOMD has 6 more interrupts for DMA
]
|
NoInterrupt * 16 ; internal devno; when ReqA = 0!
] ; IO_Type
Devices
......@@ -277,7 +262,6 @@ Devices
]
& 0
[ IO_Type = "IOMD"
; IOMD DMA devices
; DMA channel 0
& 0
......@@ -303,7 +287,6 @@ Devices
& 0
& IRQ
& 0
]
[ MorrisSupport
; register D devices
......@@ -387,8 +370,6 @@ Devices
;
DeviceTables
[ IO_Type = "IOMD"
; Prioritised IOMD DMA device numbers
IrqDMAPrio0 * 1:SHL:5
......@@ -444,9 +425,6 @@ IrqDMADevnos
DTabC SETA DTabC+1
WEND
]
; generic IRQA bits
IrqReqAPrio0 * por_bit
IrqReqADev0 * PowerOn_DevNo
......@@ -465,29 +443,7 @@ IrqReqADev7 * FIQDowngrade_DevNo
; Machine specific IRQB bits (devices 0-2)
[ IO_Type = "IOC-A1" :LOR: IO_Type = "IOC-A500"
IrqReqAPrio1 * ring_bit
IrqReqADev1 * Ringing_DevNo
IrqReqAPrio2 * pbusy_bit
IrqReqADev2 * PrinterBusy_DevNo
IrqReqAPrio3 * pack_bit
IrqReqADev3 * PrinterAck_DevNo
]
[ IO_Type = "IOEB"
IrqReqAPrio1 * IOEB_battery_low_bit
IrqReqADev1 * Ringing_DevNo
IrqReqAPrio2 * pbusy_bit
IrqReqADev2 * PrinterBusy_DevNo
IrqReqAPrio3 * IOEB_floppy_index_bit
IrqReqADev3 * PrinterAck_DevNo
]
[ IO_Type = "IOMD"
IrqReqAPrio1 * 1:SHL:1 ; not used
IrqReqADev1 * 1
......@@ -509,7 +465,6 @@ IrqReqADev2 * IOMD_PrinterIRQ_DevNo
IrqReqAPrio3 * IOMD_floppy_index_bit
IrqReqADev3 * IOMD_FloppyIndex_DevNo
]
]
DTabC SETA 1
......@@ -567,49 +522,6 @@ IrqReqBDev5 * Podule_DevNo
; Machine specific IRQB bits
[ IO_Type = "IOC-A500"
IrqReqBPrio0 * 0
IrqReqBDev0 * NoInterrupt
IrqReqBPrio1 * sound_IRQ_bit
IrqReqBDev1 * Sound_DevNo
IrqReqBPrio6 * winnie_IRQ_bit :OR: winnie_DRQ_bit
IrqReqBDev6 * WinnieIRQ_DevNo
IrqReqBPrio7 * serial_bit
IrqReqBDev7 * Serial_DevNo
]
[ IO_Type = "IOC-A1"
IrqReqBPrio0 * winnie_DRQ_bit
IrqReqBDev0 * DiscChanged_DevNo
IrqReqBPrio1 * sound_IRQ_bit
IrqReqBDev1 * Sound_DevNo
IrqReqBPrio6 * winnie_IRQ_bit
IrqReqBDev6 * WinnieIRQ_DevNo
IrqReqBPrio7 * serial_bit
IrqReqBDev7 * Serial_DevNo
]
[ IO_Type = "IOEB"
IrqReqBPrio0 * IOEB_ide_IRQ_bit
IrqReqBDev0 * DiscChanged_DevNo
IrqReqBPrio1 * IOEB_sound_IRQ_bit
IrqReqBDev1 * Sound_DevNo
IrqReqBPrio6 * IOEB_floppy_IRQ_bit
IrqReqBDev6 * WinnieIRQ_DevNo
IrqReqBPrio7 * serial_bit
IrqReqBDev7 * Serial_DevNo
]
[ IO_Type = "IOMD"
[ ReassignedIOMDInterrupts
IrqReqBPrio0 * IOMDr_MPEGAudio_IRQ_bit
IrqReqBDev0 * IOMDr_MPEGAudio_DevNo
......@@ -635,8 +547,6 @@ IrqReqBDev6 * WinnieIRQ_DevNo
IrqReqBPrio7 * IOMD_serial_IRQ_bit
IrqReqBDev7 * IOMD_Serial_DevNo
]
]
DTabC SETA 1
......
s/NewReset
View file @ 3f877936
......@@ -118,12 +118,6 @@ ReadCMOSAndConfigure ROUT
Push lr
BL Read ; CMOS byte -> R0
[ :LNOT: NewStyle_FontArea
CMP r3, #FontCacheAddress
MOVEQ r0, r0, LSL #12 ; *4K
BEQ NotScreen
]
AND R0, R0, #127 ; mask to same bitfield as status
ConfigureRMA
MOV R10, #0
......@@ -242,7 +236,6 @@ CONT_Break
; Data tables: VIDC := mode 0, all palette black
VIDCTAB
[ VIDC_Type = "VIDC20"
; Program Control Register first, to clear power-down bit
; Now depending upon the VIDCClockSource flag, re-program the clock source.
......@@ -285,11 +278,7 @@ VIDCTAB
& &91000002 ; VSWR = 3
& &92000015 ; VBSR = 3 + 19
& &93000025 ; VDSR = 3 + 19 + 16
[ MEMC_Type = "IOMD"
& &94000125 ; VDER = 3 + 19 + 16 + 256
| ;MEMC_Type <> "IOMD"
& &94000125 ; VDER = 3 + 19 + 16 + 256
] ;MEMC_Tupe = "IOMD"
& &95000135 ; VBER = 3 + 19 + 16 + 256 + 16
& &96000025 ; VCSR = VDSR
& &97000025 ; VCER = VDSR
......@@ -304,51 +293,6 @@ VIDCTAB
]
& &F0013000 ; DCR: bus D[31:0], Hdisc ;RCM 29/9/94: changed from &F0012000 at PSwindells request
& &FFFFFFFF ; That's the lot
| ;VIDC_Type<>"VIDC20"
& &00000000
& &04000000
& &08000000
& &0C000000
& &10000000
& &14000000
& &18000000
& &1C000000
& &20000000
& &24000000
& &28000000
& &2C000000
& &30000000
& &34000000
& &38000000
& &3C000000
& &40000000
& &44000000 ; Cursor -> black
& &48000000
& &4C000000 ; Palette programmed (avoid messy screen on reset)
& &807FC000 ; HCR Get a stable display up so we get stable signals
& &8408C000 ; HSWR
& &881B0000 ; HBSR
& &94770000 ; HBER
& &A04E0000 ; VCR
& &A4024000 ; VSWR
& &A8050000 ; VBSR
& &B44E0000 ; VBER
& &C0000100 ; SFR NB. TEST BIT !!! - also DFlynn requested value
& &E00000B2 ; CR Set 640*256, 1 bit per pixel, rate of 12MHz
; change bottom byte to 22 for Linear Microvitecs (CS)
; B2 for Monochrome/Philips (SS)
& &8C208000 ; HDSR
& &90708000 ; HDER
& &98258000 ; HCSR
& &9C400000 ; HIR
& &AC098000 ; VDSR
& &B0498000 ; VDER
& &B8098000 ; VCSR
& &BC498000 ; VCER
; don't mess with the stereo image registers: sound code will set them.
& &FFFFFFFF ; That's the lot
] ;VIDC_Type = "VIDC20"
VIDCPhys * &03400000 ; used to address VIDC when MMU is off
......
s/PMF/osinit
View file @ 3f877936
This diff is collapsed.
s/vdu/vdu5
View file @ 3f877936
......@@ -178,11 +178,8 @@ Vdu5NextLine
Push "ecfptr,scrend,charmsk,llength,charptr"
[ VIDC_Type = "VIDC20"
LDR R14, [WsPtr, #TextExpandArea] ;Address correct expansion
|
ADD R14, WsPtr, #TextExpand ;Address correct expansion
]
ADD charptr, charbyte, #&100 ; table entry, assuming that
ADD charptr, R14, charptr, LSL lgBPC ; this is not mode 10 or greater
......@@ -235,10 +232,8 @@ Vdu5TryNextLine
; This is mode 10 (or similar) - we must do bit expansion on the fly
Vdu5Mode10
[ VIDC_Type = "VIDC20"
CMP lgBPC, #5 ; is this a 32 bit per pixel mode, if so then ignore the
BEQ Vdu5Mode32 ; existing code and use a newer function
]
ADRL charptr, C16BTab
AND R14, charbyte, #&0F
......@@ -270,8 +265,6 @@ Vdu5Mode10
; Expand the character data out to 32 bit per pixel (mode 48 or similar)
[ VIDC_Type = "VIDC20"
MACRO
$l PixMunge32 $reg, $mask, $offset
$l
......@@ -299,7 +292,6 @@ Vdu5Mode32
B Vdu5LinePainted ; flow down and try the next line
]
; *****************************************************************************
;
......
s/vdu/vdugrafg
View file @ 3f877936
......@@ -144,43 +144,6 @@ SpriteInit ROUT
BL ClearSpritePtrName ; clear SpChoosePtr,SpChooseName
[ :LNOT: NewStyle_SpriteArea
[ AssemblingArthur
MOV R0, #0
LDRB R0, [R0, #OsbyteVars + :INDEX: LastBREAK]
CMP R0, #0 ; Soft=0,POR=1,Hard=2
BNE %FT10 ; If CtrlBreak or PowerOnReset setup default
Pull PC, EQ ; sprite area
; LDR R1, [WsPtr, #SpAreaStart]
; CMP R1, #0
; BEQ %FT20
; BL ValidateSpriteArea
; BVC %FT20
]
10
[ AssemblingArthur :LOR: Module
MOV R2, #0
LDR R2, [R2, #SpriteSize] ; Tony sez this is (0..n)*(8or32)Kbytes
CMP R2, #0
STREQ R2, [WsPtr, #SpAreaStart] ; EQ means no workspace
Pull PC, EQ
LDR R1, =SpriteSpaceAddress
STR R1, [WsPtr, #SpAreaStart]
; SUB R2, R2, #16 ; Lose 4 words in case we overshoot
MOV R3, #0 ; no sprites
MOV R4, #SpriteAreaCBsize ; saFirst
MOV R5, #SpriteAreaCBsize ; saFree
STMIA R1, {R2,R3,R4,R5} ; saEnd,saNumber,saFirst,saFree
|
MOV R1, #0
STR R1, [WsPtr, #SpAreaStart] ; no sprite workspace
]
20
]
Pull PC
LTORG
......
s/vdu/vduttx
View file @ 3f877936
......@@ -1309,11 +1309,7 @@ TTXPaintChar ROUT
TST R0, #(MapBit_Bottom :OR: MapBit_Double)
BLNE PrintDoubleHeight
[ VIDC_Type = "VIDC20"
LDR bigfont, [WsPtr, #TextExpandArea]
|
ADD bigfont, WsPtr, #TextExpand
]
MOV mask, #&FF000000
LDR linelen, [WsPtr, #LineLength]
Push "R0, screen"
......@@ -1335,11 +1331,8 @@ TTXPaintChar ROUT
TST R0, #MapBit_Bottom ; for bottom-half characters
ADDNE R1, R1, #2*10 ; start half-way through the character
[ VIDC_Type = "VIDC20"
LDR bigfont, [WsPtr, #TextExpandArea]
|
ADD bigfont, WsPtr, #TextExpand
]
MOV mask, #&FF000000
LDR linelen, [WsPtr, #LineLength]
SUB linelen, linelen, #4 ; adjust line offset to account for writing 2 words/line
......
s/vdu/vduwrch
View file @ 3f877936
......@@ -203,17 +203,11 @@ SetColours ROUT
TEQ bpp, #16
BEQ Colour16Bit ; can't optimise
[ VIDC_Type = "VIDC20"
TEQ bpp, #32
BEQ Colour32Bit ; cannie optimise captin!
]
EOR fore, fore, back ; so we can AND and EOR
[ VIDC_Type = "VIDC20"
LDR loaddr, [WsPtr, #TextExpandArea]
|
ADD loaddr, WsPtr, #TextExpand
]
ADD dest, loaddr, bpp, LSL #8 ; end+1 destination addr
MOV hiaddr, dest ; TextPlain now moves around,
; depending on bytes-per-char
......@@ -235,11 +229,8 @@ SetColours ROUT
;
Colour16Bit
[ VIDC_Type = "VIDC20"
LDR tabaddr, [WsPtr, #TextExpandArea]
|
ADD tabaddr, WsPtr, #TextExpandArea
]
ADR hiaddr, C16BTab
ADD R10, hiaddr, #128
......@@ -286,8 +277,6 @@ C16BTab
& &FFFFFFFF, &0000FFFF
& &FFFFFFFF, &FFFFFFFF
[ VIDC_Type = "VIDC20"
; *****************************************************************************
;
; Colour32Bit - Set up colour table for MODE 48 (32 bit per pixel)
......@@ -335,8 +324,6 @@ C32B20
Pull "PC"
]
; *****************************************************************************
;
; Fast CLS used when no text window defined
......@@ -467,11 +454,7 @@ TimWrch ROUT
Push R14, EQ
ADREQ R14, %FT15
LDREQ screen, [WsPtr, #CursorAddr]
[ VIDC_Type = "VIDC20"
LDREQ bigfont, [WsPtr, #TextExpandArea]
|
ADDEQ bigfont, WsPtr, #TextExpand
]
LDREQ linelen, [WsPtr, #LineLength]
LDREQ PC, [WsPtr, #WrchNbit]
......@@ -2065,11 +2048,7 @@ Delete ROUT
MOV tophalf, #0 ; Print with space
MOV bottomhalf, #0
LDR screen, [WsPtr, #CursorAddr]
[ VIDC_Type = "VIDC20"
LDR bigfont, [WsPtr, #TextExpandArea]
|
ADD bigfont, WsPtr, #TextExpand
]
LDR linelen, [WsPtr, #LineLength]
LDR PC, [WsPtr, #WrchNbit]
......@@ -2168,11 +2147,7 @@ PlainBit ROUT
MOVGT PC, R14 ; nothing to do on a mode change in this mode
Push R14
[ VIDC_Type = "VIDC20"
LDR tabaddr, [WsPtr, #TextExpandArea]
|
ADD tabaddr, WsPtr, #TextExpand
]
ADD tabaddr, tabaddr, bpp, LSL #8 ; TextPlain now dynamic
MOV dest, #&80000000
......@@ -2374,7 +2349,7 @@ ReadCharacter
CMP R1, #3
BCC RdCh4Bit
BEQ RdCh8Bit
[ VIDC_Type = "VIDC20"
CMP R1, #4
BEQ RdCh16Bit
......@@ -2428,8 +2403,6 @@ RdCh32Bit_Loop
MOV PC,LR
]
RdCh16Bit
ADD R2, R2, #12
ADD R5, R2, R8, LSL #2 ; half way
......
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