1. 14 Aug, 2015 1 commit
    • Jeffrey Lee's avatar
      Replace WriteBuffer_Drain ARMop with a suite of memory barrier ARMops · afc3b390
      Jeffrey Lee authored
      Detail:
        - Docs/HAL/ARMop_API - Updated with documentation for the new ARMops.
        - s/ARMops - Set up pointers for the new memory barrier ARMops. Add full implementations for ARMv6 & ARMv7; older architectures should be able to get by with a mix of null ops & write buffer drain ops. Update ARMopPtrTable to validate structure against the list in hdr/OSMisc
        - hdr/KernelWS - Reserve workspace for new ARMops. Free up a bit of space by limiting ourselves to 2 cache levels with ARMv7. Remove some unused definitions.
        - hdr/OSMisc - New header defining OS_PlatformFeatures & OS_MMUControl reason codes, OS_PlatformFeatures 0 flags, and OS_MMUControl 2 ARMop indices
        - Makefile - Add export rules for OSMisc header
        - hdr/ARMops, s/ARM600, s/VMSAv6 - Remove CPUFlag_* and MMUCReason_* definitions. Update OS_MMUControl write buffer drain to use DSB_ReadWrite ARMop (which is what most existing write buffer drain implementations have been renamed to).
        - s/GetAll - Get Hdr:OSMisc
        - s/Kernel - Use OS_PlatformFeatures reason code symbols
        - s/vdu/vdudecl - Remove unused definition
      Admin:
        Tested on ARM11, Cortex-A8, Cortex-A9
      
      
      Version 5.35, 4.79.2.279. Tagged as 'Kernel-5_35-4_79_2_279'
      afc3b390
  2. 11 Jan, 2015 1 commit
    • Jeffrey Lee's avatar
      Add ARMops for PL310 L2 cache controller · 6eb6ee2a
      Jeffrey Lee authored
      Detail:
        Unlike on the Cortex-A8 or Cortex-A15, the L2 cache that's used with the Cortex-A9 isn't hooked up to the standard ARMv7 CP15 cache maintenance ops. Instead, memory-mapped registers must be used to program and maintain the cache.
        Since the PL310 can't be detected automatically, this change adds support for a 'cache controller' HAL device which the HAL can use to advertise the presence of any external caches. If a cache device is registered during HAL_InitDevices the kernel will then check it against a list of known cache types and replace the appropriate ARMop routines with the alternatives for that controller.
        File changes:
        - hdr/PL310 - New header containing PL310 register listing
        - Makefile - Add export for PL310 header. Reorder exports to be alphabetical
        - hdr/HALDevice - Add cache controller device type, PL310 device
        - hdr/KernelWS - Allocate some workspace for storing a pointer to the current cache HAL device
        - s/ARMops - Add code for searching for known cache types, and implementation of PL310-specific ARMops
        - s/GetAll - Get Hdr:PL310
        - s/NewReset - Look for a cache controller after calling HAL_InitDevices
      Admin:
        Tested on Pandaboard
        Fixes various assorted instability issues
      
      
      Version 5.35, 4.79.2.252. Tagged as 'Kernel-5_35-4_79_2_252'
      6eb6ee2a
  3. 15 Dec, 2013 1 commit
    • Jeffrey Lee's avatar
      Assorted GraphicsV improvements · 694750de
      Jeffrey Lee authored
      Detail:
        This set of changes:
        * Adds basic support for multiple GraphicsV drivers, by way of some new OS_ScreenMode reason codes for registering/deregistering, selecting and enumerating drivers (11, 64-68)
        * Tidies up handling of HAL video calls so that the HAL calls will be transformed into a bona fide GraphicsV driver if they're implemented
        * Changes handling of 16bpp gamma table entries so that they're sent to GraphicsV in a generic form instead of in a VIDC-specific form
        * Adds a new GraphicsV call and defines new VIDC list items to allow GraphicsV drivers to utilise the new pixel formats
        File changes:
        * h/VIDCList, hdr/VIDCList, Makefile - Add new header export containing VIDC list type 3 definitions, to avoid repeated definitions in other components
        * Resources/UK/Messages - Add new GraphicsV/OS_ScreenMode error strings and some missing processor type strings
        * hdr/KernelWS - Clean up some pre-GraphicsV definitions, and add new workspace locations for storing the current GraphicsV driver number and the driver list
        * hdr/Options - Remove obsolete InverseTextTransparency option
        * hdr/VduExt - Add VDU variable 192 for storing GraphicsV driver number (same as ROL's VideoV driver number). Remove old 'Flag_*' mode flag definitions (use new 'ModeFlag_*' defintions instead). Add new OS_ScreenMode reason codes.
        * s/ARM600, s/VMSAv6, s/vdu/vdu23, s/vdu/vdugrafa, s/vdu/vdugrafd, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduwrch - Strip out pre-GraphicsV code. Update GraphicsV code to use correct driver number.
        * s/ArthurSWIs - Pass the default GraphicsV claimant the VduDriverWorkSpace instead of ZeroPage
        * s/Getall - Add Hdr:VIDCList and s/vdu/VduGrafHAL to list of GETs
        * s/NewIRQs - Remove HAL VSync IRQ initialisation, is now handled by grafvhal. Remove old HAL VsyncIRQ entry point, all VSyncs are now handled by VsyncIRQ_ExtEntry.
        * s/PMF/osbyte - Stop OS_Byte 19 waiting forever if no video driver is active
        * s/PMF/osinit - Remove HAL VSync IRQ initialisation, is now handled by grafvhal
        * s/vdu/vducursoft - Use new workspace variable names and flag names
        * s/vdu/vdudecl - Remove old HALDAG_* definitions, GVDAG_* definitions are used instead. Add definition of the per-driver workspace structure and flags.
        * s/vdu/vdudriver - Remove pre-GraphicsV code. Update InitialiseMode to check for and initialise a HAL driver. Use cached driver features word in a few places instead of calling GraphicsV each time. Update PalIndexTable to disable VIDC mangling of 16bpp gamma tables.
        * s/vdu/vdugrafv, s/vdu/vdugrafhal - HAL<->GraphicsV code split off into its own file (vdugrafhal). Default GraphicsV claimant now only deals with VSync events for the active driver.
        * s/vdu/vdumodes - Get rid of old VIDC List type 3 definiton; now in hdr/VIDCList
        * s/vdu/vduswis - Added OS_ScreenMode reason codes 11 and 64-68 for registering, deregistering, selecting and enumerating GraphicsV drivers. Update mode set code to not bother checking if the driver supports the pixel format; instead we assume that the driver's vet mode call will do the check for us.
      Admin:
        Tested in Tungsten, IOMD, OMAP3 & BCM2835 ROMs
        Requires HdrSrc-2_38 and updated video driver modes
      
      
      Version 5.35, 4.79.2.203. Tagged as 'Kernel-5_35-4_79_2_203'
      694750de
  4. 20 Nov, 2013 1 commit
    • Robert Sprowson's avatar
      Migrate RTC driver out of the kernel · 574ab818
      Robert Sprowson authored
      The kernel will use RTC_Read and RTC_Write to access the hardware clock, while maintaining the software clock as before.
      Makefile: header export is now in the RTC module's sources
      KernelWS: remove RTCFitted flag
      NewReset: sync the time after the module init
      i2cutils: deleted clock chip code
      osinit: move OS_ResyncTime into PMF/realtime
      realtime: mostly packages up ordinals and calls the respective SWI
      
      Tested on IOMD softload.
      
      Version 5.35, 4.79.2.202. Tagged as 'Kernel-5_35-4_79_2_202'
      574ab818
  5. 28 Mar, 2013 1 commit
    • Jeffrey Lee's avatar
      Teach the kernel about different memory attributes · c40b2dba
      Jeffrey Lee authored
      Detail:
        Briefly, this set of changes:
        * Adjusts PhysRamTable so that it retains the flags passed in by the HAL from OS_AddRAM (by storing them in the lower 12 bits of the size field)
        * Sorts the non-VRAM entries of PhysRamTable by speed and DMA capability, to ensure optimal memory allocation during OS startup.
        * Adjust the initial memory allocation logic to allow the cursor/sound chunk and HAL noncacheable workspace to come from DMA capable memory
        * Extends OS_Memory 12 to accept a 'must be DMA capable' flag in bit 8 of R0. This is the same as available in ROL's OS.
        * Extends OS_DynamicArea 0 to allow the creation of dynamic areas that automatically allocate from DMA capable memory. In ROL's OS this was done by setting bit 12 of R4, but we're using bits 12-14 for specifying the cache policy, so instead bit 15 is used.
        * Fixes OS_ReadSysInfo 6 to return the correct DevicesEnd value now that the IRQ/device limit is computed at runtime
        File changes:
        * hdr/OSEntries - Add definitions of the various flags passed to OS_AddRAM by the HAL. Add a new flag, NoDMA, for memory which can't be used for DMA.
        * hdr/KernelWS - Tidy PhysRamTable definition a bit by removing all the DRAM bank definitions except the first - this makes it easier to search for code which is interacting with the table. Remove VRAMFlags, it's redundant now that the flags are kept in the table. Add DMA allocation info to InitWs.
        * s/AMBControl/memmap - Updated to mask out the flags from PhysRamTable when reading RAM block sizes.
        * s/ARM600 - Strip out a lot of IOMD specific pre-HAL code.
        * s/ChangeDyn - Updated to cope with the flags stored in PhysRamTable. Implement support for DMA-capable dynamic areas. Rewrite InitDynamicAreas to insert pages into the free pool in the right order so that the fastest memory will be taken from it first.
        * s/GetAll, s/Middle - Fix OS_ReadSysInfo 6 to return the correct HAL-specific DevicesEnd value
        * s/HAL - Significant rework of initial RAM allocation code to allow the kernel workspace to come from the fastest DMA incapable RAM, while also allowing allocation of DMA capable memory for HAL NCNB workspace & kernel cursor/sound chunks. ClearPhysRAM rewritten as part of this.
        * s/MemInfo - Updated to cope with the flags stored in PhysRamTable. Add support for the new OS_Memory 12 flag. Update OS_Memory 7 to not assume PhysRamTable entries are sorted in address order, and rip out the old pre-HAL IOMD implementation.
        * s/NewReset - Remove GetPagesFromFreePool option, assume TRUE (as this has been the case for the past 10+ years). Revise a few comments and strip dead code. Update to cope with PhysRamTable flags.
        * s/VMSAv6 - Remove a couple of unused definitions
        * s/vdu/vdudriver - Update to cope with PhysRamTable flags
      Admin:
        Tested in Kinetic RiscPC ROM softload, Iyonix softload, & OMAP3
      
      
      Version 5.35, 4.79.2.186. Tagged as 'Kernel-5_35-4_79_2_186'
      c40b2dba
  6. 27 Jan, 2013 1 commit
    • Robert Sprowson's avatar
      Adopt some switches from Hdr:Machine/Machine · e5188347
      Robert Sprowson authored
      SystemName, ROMSizeOffset, HAL32, HAL26 only used here, moved here.
      Remove uses of "M_" booleans, apparently that's bad form.
      Fix SWIDespatch_Size for the non thumb capable case (was ASSERTing).
      Swapped UserMemStart for AppSpaceStart.
      Removed last use of OldComboSupport (pre Medusa!).
      Removed switch 'CDVPoduleIRQs', a correction to the machine definitions mean this can now simply be switched on NumberOfPodules (previously, IOMD couldn't chain podule interrupts).
      Take out disabled sub interrupt support - it's in CVS if you want to try to get it working.
      Moved ConfiguredLang to 11 for everyone, it only matters if !Boot fails, and no harm in making it common for 5.xx onwards.
      
      Version 5.35, 4.79.2.183. Tagged as 'Kernel-5_35-4_79_2_183'
      e5188347
  7. 05 Dec, 2012 1 commit
    • Jeffrey Lee's avatar
      Add support for new extended internal key codes, low level key codes, and key handler format · bcb499b5
      Jeffrey Lee authored
      Detail:
        s/Middle - Added OS_ReadSysInfo 13 to allow the kernel to validate a key handler before the owner attempts to install it
        Resources/UK/Messages - Text for new "Bad key handler" error
        s/GetAll, s/PMF/Def - Get rid of now obsolete s/PMF/Def file. It only contained definitions for pre-HAL hardware, and for the key handler layout (now in Hdr:Keyboard)
        hdr/KeyWS - Increased size of KeysDown array so it can hold 768 keys instead of 160. Trim a couple of obsolete variables, and increase CurrKey/OldKey from 1 byte to 4 bytes.
        s/PMF/key, s/PMF/osbyte - Main bulk of the changes for the new key handling. All the important interfaces are now able to deal with extended (i.e. > 8 bit) internal key numbers, and the kernel is able to cope with key handlers which use 16 bit internal/low level key numbers instead of 8 bit.
      Admin:
        Tested on Pandora & BB-xM
        Requires HdrSrc-2_20
      
      
      Version 5.35, 4.79.2.178. Tagged as 'Kernel-5_35-4_79_2_178'
      bcb499b5
  8. 04 Jun, 2012 1 commit
    • Jeffrey Lee's avatar
      Add new HAL entry, HAL_UARTDefault. Make use of Hdr:SerialOp & OS_SerialOp 10. · 5519f1d8
      Jeffrey Lee authored
      Detail:
        hdr/HALEntries - Brought in line with RPi branch, plus addition of new HAL_UARTDefault HAL entry, to allow DualSerial to determine which (if any) of the HAL UARTs should be the default UART accessed via OS_SerialOp
        s/GetAll - Add GET of Hdr:SerialOp
        s/PMF/osbyte - Use OS_SerialOp 10 when constructing filename to open for OS_Byte 2
      Admin:
        Tested in OMAP3, Tungsten ROMs
      
      
      Version 5.35, 4.79.2.152. Tagged as 'Kernel-5_35-4_79_2_152'
      5519f1d8
  9. 26 May, 2012 1 commit
    • Robert Sprowson's avatar
      Adoption of *CONFIGURE/STATUS CACHE commands · ef95917b
      Robert Sprowson authored
      The kernel already looks after all other aspects of the ARM CPU, so can look after the cache control command too.
       HelpStrs.s:New tokens for help and syntax
       CmdHelp.s:UK help and syntax
       Arthur3.s:Tables updates for *CONFIGURE/STATUS, lined some stuff up, default error text sync'd with Hdr:NewErrors
       MoreComms.s:Parsing and doing of *CACHE
       Utility.s:Hashing table updated for *CACHE
      Other minor changes
       hdr/Options:Bring 'MosVer' into the private header
       hdr/RISCOS:aasm aliases for SP removed, MainVars and MosVer made private, added definition of the start of application space
       HeapMan.s:Use of GRAB changed to Pull
       Offset of TutuCMOS changed for more informative PrintSoundCMOS
       PMF/osbyte.s:Use OsBytes header file in place of MainVars
      
      Version 5.35, 4.79.2.151. Tagged as 'Kernel-5_35-4_79_2_151'
      ef95917b
  10. 21 May, 2012 1 commit
    • Robert Sprowson's avatar
      Make Mike's macros permanent. · 2c9aad90
      Robert Sprowson authored
      While the HAL and kernel were being split some temporary macros were used for the bits being worked on, after 12 years of use they're probably safe to adopt.
      mjsCallHAL -> CallHAL; mjsAddressHAL -> AddressHAL; mjsHAL -> HAL.
      OS_VIDCDividerSWI code now always does NoSuchSWI (had been switched out previously).
      File vduhint.s no longer assembled (was empty).
      
      
      Version 5.35, 4.79.2.150. Tagged as 'Kernel-5_35-4_79_2_150'
      2c9aad90
  11. 27 Jan, 2012 1 commit
  12. 27 Nov, 2011 3 commits
    • Robert Sprowson's avatar
      Rationalise some old switches. · 189b92c1
      Robert Sprowson authored
      Export less in hdr:RISCOS.
      Delete unused GetDecimalPair routine.
      Move CheckYear with other RTC stuff out of PMF/osword.
      Hide DebugROMInit and DebugROMErrors in release (even numbered) versions.
      
      Version 5.35, 4.79.2.127. Tagged as 'Kernel-5_35-4_79_2_127'
      189b92c1
    • Robert Sprowson's avatar
      Added 'UnConv' error (see also HdrSrc). · 191ae197
      Robert Sprowson authored
      Implement OS_ConvertVariform, internally the other conversions now just call it.
      Add tester for Variform to 'Dev'.
      Made block copy weirdness for XScale dependent on XScale arch flag.
      
      Version 5.35, 4.79.2.126. Tagged as 'Kernel-5_35-4_79_2_126'
      191ae197
    • Robert Sprowson's avatar
      Conversions rationalisation. · 0d73c680
      Robert Sprowson authored
      Delete pmf/convdate, moved to conversions.
      Moved OS_BinaryToDecimal to conversions.
      Remove OS_ConvertHex16 and friends.
      Add OS_ConvertVariform skeleton.
      Tidied conversions.
      
      Version 5.35, 4.79.2.125. Tagged as 'Kernel-5_35-4_79_2_125'
      0d73c680
  13. 22 May, 2011 1 commit
    • Jeffrey Lee's avatar
      Update Cortex branch of kernel to support HALSize env variable. Export C version of hdr.OSEntries. · 1bd9c9e0
      Jeffrey Lee authored
      Detail:
        Makefile - Now exports a C version of hdr.OSEntries, for use by the new HAL USB drivers
        s/GetAll, s/Kernel - The HALSize env variable is now used in place of hard-coded values for the HAL size
        s/HAL - Reset_IRQ_Handler now switches to SVC mode before calling HAL_KbdScanInterrupt, to allow the HAL USB drivers to re-enable interrupts if they wish.
        s/VMSAv6 - Deleted some obsolete definitions
      Admin:
        Tested on rev C2 BB, A2 BB-xM, C1 TouchBook
        Needs latest BuildSys, Env, HdrSrc
      
      
      Version 5.35, 4.79.2.98.2.37. Tagged as 'Kernel-5_35-4_79_2_98_2_37'
      1bd9c9e0
  14. 28 Oct, 2009 1 commit
    • Ben Avison's avatar
      Build fix · 62fb1997
      Ben Avison authored
      Detail:
        Hdr:Macros has just been changed on the trunk in such a way that you now
        need to include Hdr:CPU.Arch as well. Previously this include file was only
        referenced by the Cortex branch kernel - now mirrored on the HAL branch
        kernel too.
      Admin:
        Verified that IOMD ROM now builds again - should fix Tungsten ROM build too.
      
      Version 5.35, 4.79.2.105. Tagged as 'Kernel-5_35-4_79_2_105'
      62fb1997
  15. 23 Jul, 2009 1 commit
    • Jeffrey Lee's avatar
      Add HAL RTC support to Cortex branch of kernel, clean up RTCSupport code · 7f21e480
      Jeffrey Lee authored
      Detail:
        HAL kernels (on the Cortex branch at least) now support HALDevice-based RTCs. If the kernels own RTC code is disabled or fails to detect an RTC, then after HAL_InitDevices is called the HALDevice list will be scanned for any HAL-resident RTC devices.
        Additionally, the RTCSupport flag (in Hdr:Machine.Machine), which was previously TRUE for all HAL kernels, can now be set to FALSE in HAL kernels to disable the kernels own IIC RTC code. This allows the unwanted legacy RTC code to be disabled for machines which are known to use HAL RTCs instead.
        hdr/RTCDevice - new header describing data structures used for HAL RTC device
        hdr/HALDevice - added RTCDevice device type, IIC serial bus type
        hdr/KernelWS - upgraded RTCFitted from a 1 byte field to 4 byte. It now stores either a null value (for no RTC), a value <2048 for an IIC RTC address, or a value >= 2048 for a RTCDevice ptr
        Makefile - added header export of hdr/RTCDevice
        s/GetAll - include hdr/RTCDevice
        s/NewReset - initialise HAL RTC after HAL_InitDevices if required
        s/PMF/i2cutils, s/PMF/osinit, s/PMF/osword - modifications to allow use of HAL RTC (and disallow use of builtin IIC RTC)
      Admin:
        Tested on rev C2 beagleboard
      
      
      Version 5.35, 4.79.2.98.2.11. Tagged as 'Kernel-5_35-4_79_2_98_2_11'
      7f21e480
  16. 10 May, 2009 1 commit
    • Ben Avison's avatar
      Unaligned loads/stores optimised for ARMv6+ · 70865f8b
      Ben Avison authored
      Detail:
        Having scanned the kernel source for unaligned load code fragments which
        would abort on ARMv6 and v7 and not having found any, I took the opportunity
        to give them build-time switches to use unaligned LDR((S)H)/STR(H)
        instructions if built for a new enough platform. Also added a couple of
        cases of LDRSB that will benefit v4 CPUs and a few instances of the v6
        SXTH instruction, but since objasm doesn't yet understand it (and when it
        does, not everyone will have upgraded) they are currently written as
        DCI statements.
        Most of the changes are to OS_Word handlers, which are notorious in that
        their input/output block is not word-aligned.
      Admin:
        Not tested, but it should at least build.
      
      Version 5.35, 4.79.2.98.2.6. Tagged as 'Kernel-5_35-4_79_2_98_2_6'
      70865f8b
  17. 30 Nov, 2002 1 commit
    • Ben Avison's avatar
      Commit of kernel as featured in release 5.00. · 9664c93b
      Ben Avison authored
      Detail:
        Lots of changes since last version, at least the following:
        * Updated OS timestamp, removed alpha status
        * Negative INKEY OS version changed to &AA
        * GraphicsV is now alocated vector number &2A
        * ROM moved up to &FC000000
        * Max application slot increased to 512 Mbytes (for now)
        * Max size of RMA increased to 256 Mbytes
        * RMA is now first-created dynamic area (so it gets lowest address after
          top of application slot)
        * OS_Memory 10 reimplemeted
        * New OS_ReadSysInfo 6 values 18-22 added
        * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
        * Misc internal top-bit-set-address fixes
        * *ChangeDynamicArea can take sizes in megabytes or gigabytes
        * Magic word "&off" in R0 passed to OS_Reset powers down if possible
        * Added acceleration: block copy; CLS; text window scroll up; rectangle
          fill
        * Disabled LED flashing in page mode (liable to crash)
        * Masked sprite plot and VDU 5 text avoids reading the screen if poss...
      9664c93b
  18. 16 Oct, 2002 1 commit
    • Ben Avison's avatar
      Mostly device stuff. · 14a44ef3
      Ben Avison authored
      Detail:
        * Implemented OS_Hardware 2, 3 and 4 as described in Docs.HAL.NewAPI.
        * Added new OS->HAL and HAL->OS routines to register HAL devices with the
          OS during hard resets.
        * Updated Docs.HAL.NewAPI to correct inconsistencies, fill in missing
          definitions, and allow for interrupt sharing.
        * Now uses OS_LeaveOS to trigger callbacks after ROM module init.
      Admin:
        Untested. Requires new HAL.
      
      Version 5.35, 4.79.2.49. Tagged as 'Kernel-5_35-4_79_2_49'
      14a44ef3
  19. 07 Oct, 2002 1 commit
  20. 11 Jul, 2001 1 commit
    • David Cotton's avatar
      Change for Customer M build. · 16021e84
      David Cotton authored
      Detail:
          The Kernel now sets "ProtectStationID" on the basis of the Embedded_UI
      flag, rather than the STB flag, so you're able to set the bottom byte of your
      IP address in IPConfig.
      
      Admin:
          Untested.
      
      Version 5.35, 4.79.2.46. Tagged as 'Kernel-5_35-4_79_2_46'
      16021e84
  21. 07 Mar, 2001 1 commit
  22. 10 Nov, 2000 1 commit
  23. 16 Oct, 2000 1 commit
  24. 10 Oct, 2000 1 commit
  25. 09 Oct, 2000 1 commit
  26. 03 Oct, 2000 1 commit
  27. 02 Oct, 2000 1 commit
  28. 15 Sep, 2000 1 commit
    • Kevin Bracey's avatar
      * Converted to building with ObjAsm (but still a single object file using ORG). · 49836a59
      Kevin Bracey authored
      * Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5.
      * Some early prototype HAL bits popped in - a lot of source restructuring still
        to come.
      * New debug target creates an AIF image with debug information, and translates
        this into an ASCII object file for the 16702B logic analyser.
      
      Version 5.35, 4.79.2.1. Tagged as 'Kernel-5_35-4_79_2_1'
      49836a59
  29. 18 Aug, 2000 1 commit
    • Stewart Brodie's avatar
      Improved the error cacheing. · 3976268c
      Stewart Brodie authored
        Removed DriversInKernel conditional.
      Detail:
        If the territory changes or the resource file changes, the kernel
          will now decache all the cached error blocks so that next time
          they are required, they will be looked up again.
        The error cacheing is now a kernel build option and is always set
          to on.
        Removed one of the 5 error messages to be cached - it never seems
          to happen.  The remaining 4 are more frequent.
      Admin:
        Tested in Ursula build.
        Cannot be used with HdrSrc 0.94.  HdrSrc 0.95 and later is required
          (or HdrSrc 0.93 and earlier subject to other kernel requirements)
        Requires MessageTrans 0.42 or later for correct operation when a
          replacement messages file is loaded.
      
      Version 5.32. Tagged as 'Kernel-5_32'
      3976268c
  30. 10 May, 2000 1 commit
    • David Cotton's avatar
      Added new debug flag DebugROMPostInit · 7b449b13
      David Cotton authored
      Detail:
      	It is often the case that modules fail on receipt of a PostInit
      cervice call. The Kernel already has an option to display debugging on module
      initialisation (DebugROMInit), but this does not help if a module crashes
      during the PostInit stage.
      	To aid debugging of the PostInit stage of module initialisation, a
      new flag (DebugROMPostInit) has been added to the vanilla service call
      handler. This flag displays the name of each module that the PostInit is
      being dispatched to, and then displays whether control has passed back to the
      kernel. Hence crashes of a module during PostInit can be detected.
      
      Admin:
      	Note that this debug option only works in the vanilla service call
      handler. If your build uses the chocolate handler and you wish to debug
      PostInit of modules, then set it temporarilly to use vanilla handlers.
      	Tested in Lazarus builds both with and without the option switched.
      
      Version 5.26. Not tagged
      7b449b13
  31. 13 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      * Run-time emulator detection added (no need for separate images). Needs an · 36ba4cb5
      Kevin Bracey authored
        RPCEm update.
      * Register allocation in default ErrorV handler fixed - problems occured when
        callbacks were triggered on way out.
      * OS_Byte 19 didn't manipulate interrupt disable flag correctly in 26-bit
        builds.
      * Stray bit of debugging left in sprite code many years ago removed.
      
      Version 5.23. Not tagged
      36ba4cb5
  32. 04 Apr, 2000 1 commit
    • Kevin Bracey's avatar
      32-bit Kernel. · b4016e9c
      Kevin Bracey authored
      Details:
        The Kernel will now compile to produce a pure 32-bit system if No26bitCode is
        set to TRUE.
        If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel,
        although some internal changes have taken place to minimise compile
        switches between the two cases. See Docs.32bit for more technical info.
      
        The hardest part was the flood-fill...
      
      Other changes:
        Pointer shape changes now take place on the next VSync, rather than actually
        WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine
        down by 5% now :)
      
        Lots of really crusty pre-IOMD code removed.
      
      Admin:
        Tested in 32 and 26-bit forms in a limited desktop build. Basically, this
        will need to see a lot of use to iron out difficulties. I'd like anyone who
        has a non-frozen project to at least attempt using this Kernel.
      
      Version 5.23. Tagged as 'Kernel-5_23'
      b4016e9c
  33. 18 Oct, 1999 1 commit
  34. 07 Oct, 1999 1 commit
  35. 16 Sep, 1999 1 commit
    • Kevin Bracey's avatar
      Default RCLK mode now RCLK/2 rather than RCLK/1. · b28fe2e3
      Kevin Bracey authored
      Doesn't force CMOS setting of sync and monitortype on NCs/STBs.
      Accepts HClockSelect parameter (number 9) in VIDC lists. Uses this to
      determine whether to use HCLK or not, rather than abusing
      Service_MonitorLeadTranslation.
      If DontUseVCO flag is set, then VCLK will not be used - only RCLK (or HCLK if
      requested).
      
      Version 4.86. Tagged as 'Kernel-4_86'
      b28fe2e3
  36. 19 Aug, 1999 1 commit
  37. 17 Aug, 1999 1 commit
  38. 03 Aug, 1999 1 commit
    • Kevin Bracey's avatar
      * Added support for 24LC64 8K EEPROM (untested). · f52b4580
      Kevin Bracey authored
      * Integrated Ursula fast service call dispatch code.
      * Added Interruptible32bitModes from Ursula.
      * Stopped allowing ROM modules (other than the Kernel/UtilityModule) to write
        to the hardware vectors in 26-bit mode.
      
      Version 4.81. Tagged as 'Kernel-4_81'
      f52b4580