1. 29 Sep, 1999 1 commit
    • Kevin Bracey's avatar
      * Meaning of FEIOSpeedHalf was accidentally inverted. · fb297c9b
      Kevin Bracey authored
      * Wasn't allowing writes to most of EEPROM.
      * Old prototype OS_SetTime SWI code removed.
      * MPEGPoduleNTSCNotPALMask option support removed to simplify things a bit.
      * Now can cope with a system with a PAL/NTSC link, but no monitor detect line.
      * Default PAL & NTSC modes now always 12 & 46 respectively.
      * Kernel now knows about monitor type 8 (NTSC) - modes 44-46 (640x200) are
        available.
      * STB/NC CMOS test removed from POST pending further investigation.
      
      Version 4.90. Tagged as 'Kernel-4_90'
      fb297c9b
  2. 23 Sep, 1999 1 commit
  3. 24 Aug, 1999 1 commit
  4. 03 Aug, 1999 1 commit
    • Kevin Bracey's avatar
      * Added support for 24LC64 8K EEPROM (untested). · f52b4580
      Kevin Bracey authored
      * Integrated Ursula fast service call dispatch code.
      * Added Interruptible32bitModes from Ursula.
      * Stopped allowing ROM modules (other than the Kernel/UtilityModule) to write
        to the hardware vectors in 26-bit mode.
      
      Version 4.81. Tagged as 'Kernel-4_81'
      f52b4580
  5. 25 Feb, 1999 1 commit
  6. 15 Feb, 1999 1 commit
  7. 09 Feb, 1999 1 commit
    • Neil Turton's avatar
      ROM speed not taken from the Machine header file. POST can now exist in a... · 417410eb
      Neil Turton authored
      ROM speed not taken from the Machine header file.  POST can now exist in a softloaded OS, since it searches for a zero word in the ROM instead of using one within the POST when trying to communicate with the POST adapter (the zero word must be in ROM).  Fixed to build on non-chrontel STB/NC products.  Lots of duplicate code merged in
      
      MemSize.  MemSize copes better with the softload case, and is less
      willing to use the region the OS occupies as video memory, or
      page tables.  POST is now ON (memory tests disabled).
      OS_ReadSysInfo 4 now uses the NVRAM module to access the ethernet
      address in NVRAM/CMOS, so that the availability/location of the
      MAC address can be changed.  CMOS location 0 is now unprotected on
      STB/NC products to try to stop people poking the hardware directly.
      Fixed a CMOS resetting problem on STBs where the value expected in a
      location was different from the value written on a CMOS reset, so the
      CMOS would be reset every time...
      
      Version 4.69. Tagged as 'Kernel-4_69'
      417410eb
  8. 16 Dec, 1998 1 commit
  9. 30 Oct, 1998 1 commit
    • Kevin Bracey's avatar
      OS_Byte 129 0 255 now reports &A7 for STB build (because it _is_ a · 2392dd15
      Kevin Bracey authored
      RISC OS 3.7 generation kernel).
      CMOS no longer gets scrambled when reset in STB build.
      UpCall_KeyboardStatus now issued when OS_Byte 202 called or when keyboard
      status byte is changed by other means (such as pressing Caps Lock).
      
      Version 4.67. Tagged as 'Kernel-4_67'
      2392dd15
  10. 30 Sep, 1998 1 commit
    • Kevin Bracey's avatar
      Spinner branch merged. · 5ba3f5db
      Kevin Bracey authored
      Bandwidth limit for 7500FE fixed.
      RO371Timings flag set to :LNOT:STB
      
      Version 4.64. Tagged as 'Kernel-4_64'
      5ba3f5db
  11. 07 May, 1997 1 commit
  12. 01 May, 1997 1 commit
  13. 21 Jan, 1997 1 commit
  14. 21 Nov, 1996 1 commit
  15. 06 Nov, 1996 1 commit
  16. 05 Nov, 1996 1 commit