1. 31 Mar, 2003 1 commit
  2. 27 Jan, 2003 1 commit
    • Kevin Bracey's avatar
      Support for keys held down in the HAL at power on. · 2c1c85d9
      Kevin Bracey authored
      *Configure ANYTHINGsize was broken due to not setting R0 to ReadUnsigned
      IIC ack message uninternationalised
      OS_Memory was saying we only had 4M of RAM
      VDU4 scrolling when output was switched to sprite was causing corruption
      on use of CTRL-J and CTRL-K
      Default SystemSize CMOS set to 32k
      
      Version 5.35, 4.79.2.55. Tagged as 'Kernel-5_35-4_79_2_55'
      2c1c85d9
  3. 13 Dec, 2002 1 commit
    • Ben Avison's avatar
      HAL device support, and a couple of new service calls. · 5fa74be7
      Ben Avison authored
      Detail:
        * Rejigged documented meaning of device "Location" field so that we can
          fit full PCI locations in.
        * Defined lots of device "Type" values in Hdr:HALDevice.
        * Removed obsolete DMA-related HAL entries in Hdr:HALEntries (no longer
          required by DMAManager 0_15-4_4_2_6, no longer provided by Tungsten HAL
          0.07).
        * OS_Hardware 2 and 3 actually work now.
        * Changed OS_Hardware 4 to take a maximum major version number to match.
        * HAL workspace is now USR mode readable.
        * Service calls issued after module initialisation/finalisation (see
          Docs.ModPostServ).
      Admin:
        OS_Hardware tested, service calls not tested.
      
      Version 5.35, 4.79.2.52. Tagged as 'Kernel-5_35-4_79_2_52'
      5fa74be7
  4. 30 Nov, 2002 1 commit
    • Ben Avison's avatar
      Commit of kernel as featured in release 5.00. · 9664c93b
      Ben Avison authored
      Detail:
        Lots of changes since last version, at least the following:
        * Updated OS timestamp, removed alpha status
        * Negative INKEY OS version changed to &AA
        * GraphicsV is now alocated vector number &2A
        * ROM moved up to &FC000000
        * Max application slot increased to 512 Mbytes (for now)
        * Max size of RMA increased to 256 Mbytes
        * RMA is now first-created dynamic area (so it gets lowest address after
          top of application slot)
        * OS_Memory 10 reimplemeted
        * New OS_ReadSysInfo 6 values 18-22 added
        * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off
        * Misc internal top-bit-set-address fixes
        * *ChangeDynamicArea can take sizes in megabytes or gigabytes
        * Magic word "&off" in R0 passed to OS_Reset powers down if possible
        * Added acceleration: block copy; CLS; text window scroll up; rectangle
          fill
        * Disabled LED flashing in page mode (liable to crash)
        * Masked sprite plot and VDU 5 text avoids reading the screen if possible
        * Framestore made USR mode accessible
        * Fix for VDU 5,127 bug - now relies on font definitions being in extreme
          quarters of memory, rather than bottom half
        * Allocated 64-bit OS_Convert... SWIs
        * IIC errors use allocated error numbers
        * Looks for Dallas RTC before Philips RTC because we're using a Philips
          NVRAM device with the same ID
        * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled
        * Default mouse type (USB) changed to allocated number
        * Ram disc max size increased to 128 Mbytes (Ursula merge) and made
          cacheable for StrongARMs (not XScale)
        * Branch through zero handler now works in USR mode, by use of a
          trampoline in the system stack to allow PC-relative register storage
        * Address exception handler changed to not use 0 as workspace
        * OS_Memory 13 extended to allow specification of cacheability and access
          privileges
        * Added OS_Memory 16 to return important memory addresses
        * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in
          bits 10 and 11, doubly-mapped flag in bit 20, and access permissions
          specified flag in bit 21
        * Bug fix in last version for application abort handlers didn't quite
          work; register shuffle required
        * "Module is not 32-bit compatible" error now reports the module name
        * Default configured language changed from 10 to 11 (now Desktop again)
      
      Version 5.35, 4.79.2.51. Tagged as 'Kernel-5_35-4_79_2_51'
      9664c93b
  5. 16 Oct, 2002 1 commit
    • Ben Avison's avatar
      Mostly device stuff. · 14a44ef3
      Ben Avison authored
      Detail:
        * Implemented OS_Hardware 2, 3 and 4 as described in Docs.HAL.NewAPI.
        * Added new OS->HAL and HAL->OS routines to register HAL devices with the
          OS during hard resets.
        * Updated Docs.HAL.NewAPI to correct inconsistencies, fill in missing
          definitions, and allow for interrupt sharing.
        * Now uses OS_LeaveOS to trigger callbacks after ROM module init.
      Admin:
        Untested. Requires new HAL.
      
      Version 5.35, 4.79.2.49. Tagged as 'Kernel-5_35-4_79_2_49'
      14a44ef3
  6. 07 Oct, 2002 1 commit
  7. 26 Jun, 2001 1 commit
    • Mike Stephens's avatar
      1) Bring IOMD HAL more up to date. Add support for new call HAL_CleanerSpace... · 63a6ffec
      Mike Stephens authored
      1) Bring IOMD HAL more up to date. Add support for new call HAL_CleanerSpace (preparation for StrongARM kernel support).
      
      2) In kernel, add HAL_CleanerSpace call (preparation for
      StrongARM and XScale core support). Fix bug found with
      ARMv3 support during test on Risc PC.
      
      3) Implement new API for kernel SWIs that have used top
      bits of addresses as flags. The new API has an extra
      flag that must be set, so kernel can distinguish and
      support both APIs. The reason for all this is that
      addresses are 32-bits now, people, keep up there. Briefly:
      
        OS_HeapSort
          bit 31 of r0 set for new API, r1 is full 32-bit address
          flags move from r1 bits 31-29 to r0 bits 30-28
      
        OS_ReadLine
          bit 31 of r1 set for new API, r0 is full 32-bit address
          flags move from bits 31,30 of r0 to bits 30,29 of r1
      
        OS_SubstituteArgs
          bit 31 of r2 set for new API, r0 is full 32-bit address
          flag moves from bit 31 of r0 to bit 30 of r2
      
      Tested on Risc PC and briefly on Customer A 2
      
      Ta
      
      Version 5.35, 4.79.2.41. Tagged as 'Kernel-5_35-4_79_2_41'
      63a6ffec
  8. 11 Jun, 2001 1 commit
  9. 17 May, 2001 1 commit
    • Kevin Bracey's avatar
      * Fixed the IIC code. · 390c26e8
      Kevin Bracey authored
      * Kernel puts sensible default FIQ handler in through the HAL.
      * Fix to temporary page uncaching code.
      
      Version 5.35, 4.79.2.30. Tagged as 'Kernel-5_35-4_79_2_30'
      390c26e8
  10. 16 Mar, 2001 1 commit
  11. 01 Mar, 2001 1 commit
  12. 01 Feb, 2001 1 commit
    • Dan Ellis's avatar
      Addition of HAL UART for Customer L · 69043479
      Dan Ellis authored
      Detail:
        HAL entries have been entered for the Customer L UART (very much like the ARM
      PrimeCell, rather than the 16550).
      Admin:
        It builds.
      
      Version 5.35, 4.79.2.16. Tagged as 'Kernel-5_35-4_79_2_16'
      69043479
  13. 10 Nov, 2000 1 commit
  14. 20 Oct, 2000 1 commit
  15. 16 Oct, 2000 1 commit
  16. 09 Oct, 2000 1 commit
  17. 05 Oct, 2000 3 commits
  18. 02 Oct, 2000 1 commit