GitLab

Runtime selection between long descriptor and short descriptor page
table format is now possible (with the decision based on whether the HAL
registers any high RAM or not). The main source changes are as follows:

* LongDesc and ShortDesc switches are in hdr.Options to control what
kernel variant is built
* PTOp and PTWhich macros introduced in hdr.ARMops to allow for
invocation of functions / code blocks which are specific to the page
table format. If the kernel is being built with only one page table
format enabled, PTOp is just a BL instruction, ensuring there's no
performance loss compared to the old code.
* _LongDesc and _ShortDesc suffixes added to various function names, to
allow both versions of the function to be included at once if runtime
selection is enabled
* Most of the kernel / MMU initialisation code in s.HAL is now encased
in a big WHILE loop, allowing it to be duplicated if runtime switching
is enabled (easier than adding dynamic branches all over the place, and
only costs a few KB of ROM/RAM)
* Some more functions (notably AccessPhysicalAddress,
ReleasePhysicalAddress, and MapInIO) have been moved to s.ShortDesc /
s.LongDesc since they were already 90% specific to page table format

IICInit only initialises the entries for valid IIC buses (i.e up to the
limit returned by HAL_IICBuses), but some code accesses the array
without checking against the HAL_IICBuses limit. This causes problems
because the array lives in the SkippedTables area of workspace, meaning
it isn't zero-initialised automatically.

Ensure that the entries for the invalid bus numbers are
zero-initialised, so that code which doesn't check against HAL_IICBuses
won't mistake the invalid entries for valid IRQ-driven buses
(InitialiseIRQ1Vtable, Reset_IRQ_Handler, etc.)

Also, protect against overwriting the end of the array if HAL_IICBuses
is more than the OS supports.

Fixes hang on startup on Pi 4 if memory is filled with -1 (and OS is
told that RAM isn't clear), and on Pi400 with normal memory:
https://www.riscosopen.org/forum/forums/11/topics/16313

Version 6.55. Tagged as 'Kernel-6_55'

This adds initial support for the "long descriptor" MMU page table
format, which allows the CPU to (flexibly) use a 40-bit physical address
space.

There are still some features that need fixing (e.g. RISCOS_MapInIO
flags), and the OS doesn't yet support RAM above the 32bit limit, but
this set of changes is enough to allow for working ROMs to be produced.

Also, move MMUControlSoftCopy initialisation out of ClearWkspRAM, since
it's unrelated to whether the HAL has cleared the RAM or not.

Previously both `RdchInkey` and `PageTest` enabled interrupts after
running callbacks before calling Portable_Idle with the result that
callback could be delayed until the next interrupt.

* Change `process_callback_chain` to leave interrupts disabled, and
  rename accordingly.
* Remove redundant check of CallBack_Flag.
* In `PageTest` move running calbacks into `CtrlShiftTest`, so that
  it is immediately before the test.
* Re-enable interrupts at appropriate locations.

Tested on StrongARM Risc PC.

Version 6.44. Tagged as 'Kernel-6_44'

This ensures that on exit from OS_ReadC / INKEY either
a character is returned or the input buffer is empty,
and that Portable_Idle is only called when the input
buffer is empty.

This avoids a 10 microsecond delay and relying on timer
interrupts to make progress and allows reliably waiting
for input and another event by:

Disable Interrupts
Repeat
  Call INKEY(0), exit loop if key pressed
  Check other event, exit loop if key pressed
  Call Portable_Idle

Version 6.42. Tagged as 'Kernel-6_42'

Despite never being properly documented in the RISC OS PRMs, there's
evidence that Acorn were recommending that third-parties used OS_Byte
166 for locating the OS_Byte variables well into the mid-1990's:

https://www.riscosopen.org/forum/forums/5/topics/14676#posts-94080

Currently OS builds which use zero page relocation will only return the
low 16 bits of the address from OS_Byte 166, most likely breaking any
third-party software which is trying to use it. Attempt to restore
compatibility by having OS_Byte 166 add the missing high address bits
into the "next location" value returned in R2, and fix OS_Byte 167 in a
similar manner (adding into R1).

Additionally, make the values read-only, because the kernel is littered
with code that uses hard-coded OsbyteVars addresses and so is unlikely
to do anything sensible if someone was to modify the OsbyteVars address
that's stored in workspace.

Version 6.39. Tagged as 'Kernel-6_39'

* Listen out for PointerV 9, which (RISC OS 5) mouse drivers use to
indicate scroll wheel updates + extra button status
* Changes in the state of the extra buttons are treated the same as
changes to normal mouse buttons: signalled via Event_Mouse, and stored
in the mouse buffer (for reading via OS_Mouse).
* Changes in the scroll wheel(s) are signalled via Event_Expansion,4. If
the event vector call is unclaimed, the kernel's wheel position
accumulators will be updated
* Wheel position accumulators can be read via OS_Pointer 2
* Wheel position accumulators implement "wrap to zero" logic on overflow

This matches RISCOS Ltd's implementation
(http://www.riscos.com/support/developers/riscos6/input/pointerdevices.html),
except that:

* The kernel currently doesn't call PointerV 4, so PointerV 9 is the
only way drivers can report wheel + extra button status
* Extra mouse buttons don't generate KeyV transitions
* Our implementation is in the kernel, not an OSPointer module

Version 6.37. Tagged as 'Kernel-6_37'

Reporting invalid parameters to OS_Pointer and OS_ConvertDateAndTime could wander off to bad places due to corrupt LR and/or stack imbalance.

Detail:
  * various low-numbered dynamic areas used by RISC OS 6 and Pyromaniac
  * OS_ReadSysInfo 8 host platform classes for VirtualRPC, A9Home, Pyromaniac
  * OS_Byte 0,<not 0> MosVer values for various systems since the BBC micro
  * OS_Byte 129,0,255 (BASIC INKEY -256) values for various RISC OS systems

Admin:
  Discovered that these weren't really recorded anywhere during recent
  allocation request. Some information gleaned from http://beebwiki.mdfs.net

Version 6.34. Not tagged

* Update OS_ScreenMode 11's handling of drivers which fail to
initialise. If there was no previous driver, then instead of trying to
restore that nonexistant driver, stick with the new one. This is mainly
to help with the case where the kernel's built in modes aren't accepted
by the driver, and valid modes only become available once an MDF is
loaded (this can happen with early OMAP3 chip revisions, which have very
tight sync & porch limits, causing 90% of the kernel's modes to be
rejected). If the kernel was to revert to the "no driver" state, then
loading the MDF would still leave you with no video output.
* Since we can now end up in a state where a driver is selected but
hasn't been programmed yet, update OS_Byte 19 to detect this (via the
magic ScreenBlankDPMSState value of 255) and avoid waiting for VSync
* Update RemovePages & InsertRemovePagesExit (screen DA handlers) to
avoid infinite loops if the screen DA gets shrunk to zero size (was seen
while attempting to complete the !Boot sequence while no driver was
active)

Version 6.33. Tagged as 'Kernel-6_33'

* Don't wait for VSync if we're in IRQ context, since (a) IRQ handlers
shouldn't take lots of time, and (b) it may hang the system. Fixes
https://www.riscosopen.org/tracker/tickets/424
* Extend the DPMSUtils-inherited "don't wait for VSync if HSync output
is off" fix to also deal with the case where VSync output is off, since
it's reasonable to assume that turning off VSync output could also
prevent the CPU from receiving the associated interrupts.

Detail:
  NewReset.s: Remove warning about soft reset, this is not supported any longer
  MsgCode.s: Reload LR after potentially changing mode
  PMF/osinit.s: Delete vestiges of soft reset support
Admin:
  Submission from Timothy Baldwin.

Version 6.07. Tagged as 'Kernel-6_07'

The default OS_Byte value enabled num lock, but this was passed to the keyboard *before* a decision to wipe the CMOS (and hence potentially override it) was made.
This left the LED on until a key was pressed, regardless of the configured state.
Change the default OS_Byte value to be off so there's only one transition (off->on, or off->off), and refresh the keyboard after the validity of CMOS has been made.
Ref: https://www.riscosopen.org/forum/forums/4/topics/10400

Version 5.99. Tagged as 'Kernel-5_99'

This is now a HAL only kernel, and 0x3200000 is most likely somewhere in RAM.

Newly born boards have all 0xFF's in their CMOS (EEPROM), but the new order of keyboard scan did
  Init -> Scan keyboard -> Check (or wipe) CMOS
and would therefore leave 0xFF's in a select few kernel workspace areas and OS_Byte values.
Defer the init which reads CMOS until after the check/wipe step. Only the screen area size is now done early, but MassageScreenSize clamps that properly anyway.

Arthur3.s: Relocate stranded function SetupPrinterBuffer to osinit.
PMF/key.s: Drop support for SoftReset.
PMF/osinit.s: Stuff in hardcoded defaults at early init. Retrieve the proper ones later. Take ownership of SystemSprite/RamFS/Font Manager dynamic areas (deferrable).
vdudriver.s: Use symbolic name.
NewReset.s: Defer SystemSprite/RamFS/Font Manager area creation, MouseInit, Read(Hard)CMOSDefaults until later.
hdr/Options: Delete unused IgnoreVRAM. Remove MaxRAMFS_Size now PMPs make it not useful. Shuffle ARM6Support/XScaleMiniCache/XScaleJTAGDebug to be adjacent to their definitions.

Tested by filling first 256 bytes with 0xFF and powering up. Reset now completes, OS_Byte variables look sensible.

Version 5.95. Tagged as 'Kernel-5_95'

Detail:
  To make it easier to support arbitrary complexity keyboard controllers (eg. USB via DWCDriver on the Pi) have the kernel do the early keyboard recovery key press detection instead of the HAL.
  During the first pass those modules used for reading the keyboard are started, ignoring the CMOS frugal bits.
  The keyboard is then scanned for 3s, during which time the RAM is cleared (unless the HAL indicated it has already been done).
  During the second pass the remaining modules are started respecting the CMOS frugal bits. Any which were already started in the first pass are inserted into the new chain, so the keyboard is reset once and only once.

  Boot times, with a 300cs key scan time in NewReset.
  Risc PC with 160MB RAM (128+32+0).
  Times from turning on power to initial "beep", using a stopwatch.
                RISC OS 3.70 RISC OS 5.22 This OS
  ARM610        12.5         10.4         10.3
  ARM710        11.8         10.2         9.7
  StrongARM 233 11.1         9.5          8.4

  In NewReset.s:
  Remove old KbdScan code (leave Reset_IRQ_Handler for IIC only)
  If HAL_KbdScanDependencies returns a null string then present KbdDone flag and skip to full init.
  A few vestiges of soft resets removed.
  Do RAM clear when waiting for INKEY (being careful not to trash the running modules...).
  Clearing just the freepool on a 2GB Titanium cleared 7EFD6 pages (99.2%).

  In ModHand.s:
  2nd pass need to sneaky renumber the nodes (so *ROMModules is in the right order, frugal bits line up) without resetting the chain

  In HAL.s:
  Change ClearPhysRAM to ClearWkspRAM, such that it only clears the kernel workspace rather than all RAM. The bulk of the RAM is cleared during the keyboard scan by new function ClearFreePoolSection.
  Add a variant of Init_MapInRAM which clears the mapped in RAM too (as these very early claims will not be in the free pool when the RAM is cleared later).
  Remove HAL keyboard scan setup & IRQ handler.
  Fix bug in HALDebugHexTX2, the input value needs pre-shifting by 16b before continuing.

  In GetAll.s, PMF/osbyte.s:
  Use Hdr:Countries and Hdr:OsBytes for constants.

  In PMF/key.s, PMF/osinit.s:
  Relocate the key post init from PostInit to KeyPostInit.
  Changed PostInit to not tail call KeyPostInit so they can be called independently.

  In hdr/KernelWs:
  Improve comments, add InitWsStart label to refer to.

  In hdr/HALEntries:
  Add HAL_KbdScanDependencies.
  Delete KbdFlag exports.
  Took the opportunity to reorder some of the higher numbered HAL entries and re-grouping, specifically (112,120) (84,106,108,117).
Admin:
  Tested on an ARM6/ARM7/SA Risc PC, BeagleBoard xM, Iyonix, Pandaboard ES, Wandboard Quad, IPEGv5, Titanium, Pi 2 and 3.
  Requires corresponding HAL change.
  Submission for USB bounty.

Version 5.89. Tagged as 'Kernel-5_89'

Detail:
  Return the calculated checksum from MakeChecksum, like the comment says.
Admin:
  Spotted during code review (not tagged).

CheckBits is a hangover from when the kernel used to read the monitor ID lines on a Risc PC, no longer called with a HAL.

Detail:
  This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
  * FixCallBacks
  * UseProcessTransfer
  * CanLiveOnROMCard
  * BleedinDaveBell
  * NewStyleEcfs
  * DoVdu23_0_12
  * LCDPowerCtrl
  * HostVdu
  * Print
  * EmulatorSupport
  * TubeInfo
  * AddTubeBashers
  * TubeChar, TubeString, TubeDumpNoStack, TubeNewlNoStack macros
  * FIQDebug
  * VCOstartfix
  * AssemblingArthur (n.b. still defined for safety with anything in Hdr: which uses it, but not used explicitly by the kernel)
  * MouseBufferFix
  * LCDInvert
  * LCDSupport
  * DoInitialiseMode
  * Interruptible32bitModes
  * MouseBufferManager
  * StrongARM (new CacheCleanerHack and InterruptDelay switches added to hdr/Options to cover some functionality that StrongARM previously covered)
  * SAcleanflushbroken
  * StrongARM_POST
  * IrqsInClaimRelease
  * CheckProtectionLink
  * GSWorkspaceInKernelBuffers
  * EarlierReentrancyInDAShrink
  * LongCommandLines
  * ECC
  * NoSPSRcorruption
  * RMTidyDoesNowt
  * RogerEXEY
  * StorkPowerSave
  * DebugForcedReset
  * AssembleKEYV
  * AssemblePointerV
  * ProcessorVectors
  * Keyboard_Type
  Assorted old files have also been deleted.
Admin:
  Identical binary to previous revision for IOMD & Raspberry Pi builds


Version 5.51. Tagged as 'Kernel-5_51'

Detail:
  This change gets rid of the following switches from the source (picking appropriate code paths for a desktop build):
  * STB
  * RO371Timings
  * NormalSpeedROMS
  * AutoSpeedROMS
  * RISCPCBurstMode
  * InterlacedPointer
  * ParallelFlashUpgrade (and s/FlashROM file)
  * Embedded_UI
  Some of the deleted code might be worth revisiting in future:
  * OS_ReadSysInfo 4 support for storing the MAC in alternate CMOS locations (including 2nd copy for error checking) or fetching via Service_MachineAddress
  * Mouse handling changes, possibly aimed at hiding the mouse pointer if a mouse isn't connected
  * More strict CMOS validation in s/NewReset
Admin:
  Identical binary to previous revision for IOMD & Raspberry Pi builds


Version 5.50. Tagged as 'Kernel-5_50'

Detail:
  This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build):
  * HAL
  * HAL26
  * HAL32
  * No26bitCode
  * No32bitCode
  * IncludeTestSrc
  * FixR9CorruptionInExtensionSWI
  Various old files have also been removed (POST code, Arc/STB keyboard drivers, etc.)
Admin:
  Identical binary to previous revision for IOMD & Raspberry Pi builds


Version 5.49. Tagged as 'Kernel-5_49'

Detail:
  s/HeapSort, s/vdu/vdugrafc, s/vdu/vduswis - Avoid unnecessary remainder calculations in DivRem macro
  s/PMF/i2cutils, s/PMF/osword - Make use of DivRem's ability to accept a constant as the divisor
Admin:
  Tested on Cortex-A15


Version 5.35, 4.79.2.318. Tagged as 'Kernel-5_35-4_79_2_318'

Detail:
  Resources/UK/Messages, hdr/KernelWS, s/Kernel - On return from a SWI with V set, do some basic validity checks on the error pointer in order to try and catch buggy SWIs that return bad pointers or invalid error blocks. If a bad pointer is found we'll substitute it with a pointer to a different error block, which has the SWI number in the error message, to allow the user to identify the source of the problem. (There's also a chance we'll crash when investigating a bad pointer, but crashing here in the kernel is preferable to crashing elsewhere because R12 should still contain the SWI number)
  hdr/OSMisc - Define SeriousErrorV reason codes and extended ROM footer entry IDs
  hdr/Options - Remove HangWatch integration flag, obsolete now that SeriousErrorV is available
  s/ArthurSWIs - Keep defaultvectab up to date with vector allocations
  s/Middle - Update serious error handling to call SeriousErrorV at several key points. This allows for accurate crash dumps to be obtained, along with a mechanism to warn low-level components such as RTSupport that the privileged mode stacks are being flattened.
  s/Middle - Add OS_ReadSysInfo 15, for enumerating extended ROM footer entries
  s/PMF/osbyte - Update InitNewFX0Error to use the ROM footer entry ID defined in hdr/OSMisc
Admin:
  Tested on Pi 1B, 2B, 3B


Version 5.35, 4.79.2.313. Tagged as 'Kernel-5_35-4_79_2_313'

Fix overriding of default CMOS settings. Reserve HAL device ID for the official Raspberry Pi touchscreen/display.

Detail:
  s/PMF/i2cutils - Move $CMOS_Override to the start of DefaultCMOSTable, so that it can be used to override values which are already in the table (since NVMemory_ResetValue stops its search on the first address match)
  hdr/HALDevice - Add new Touchscreen device type and reserve an ID for the official Pi touchscreen controller
Admin:
  Tested on Raspberry Pi
  Fixes filesystem incorrectly defaulting to ADFS


Version 5.35, 4.79.2.299. Tagged as 'Kernel-5_35-4_79_2_299'

Detail:
  Rather than fill the Kernel sources with an ever-increasing number of
  platform-specific switches to control the default CMOS settings, this
  change introduces a variable which passes the requirements direct from
  the Components file to the Kernel. Since it uses a comma-separated list
  of address/value pairs, it is inherently extensible. All the symbolic
  names of addresses from Hdr:CMOS are available, and any valid objasm
  expression can be used for the value.
Admin:
  This removes the need for the EnforceSCSI4 switch, and leaves almost
  no uses of the Machine variable in the Kernel either.


Version 5.35, 4.79.2.298. Tagged as 'Kernel-5_35-4_79_2_298'

Detail:
  Default to SCSI::4 for boot driver is custom switch at buildtime
  (EnforceSCSI4) is defined. 2 fontcache items also defaulted with this switch
Admin:
  tested on iMx6


Version 5.35, 4.79.2.290. Tagged as 'Kernel-5_35-4_79_2_290'

Detail:
  s/PMF/IIC - when dealing with IIC transfers which use the high-level HAL API, take into account the bus speed when calculating the max retry count. Otherwise if (e.g.) writing to CMOS we may give up before the device has recovered from the previous write (which is typically listed as a max time of 5ms)
Admin:
  Fixes issues with CMOS checksum not being updated correctly if using IIC bus speeds > 100khz


Version 5.35, 4.79.2.289. Tagged as 'Kernel-5_35-4_79_2_289'

Detail:
  Ideally, $Machine would only exist within Hdr:Machine, they define a class of machines which in turn requires the lowest common denominator. It doesn't encode any capabilities about the class (eg. amount of memory, screen capabilities, peripherals).
Admin:
  Fixes report of Pandaboard no longer booting, since it has no drive 4.

Detail:
  default SCSIFSDrive to 4, and both FontMax and FontSize to their
  max values. (the machines in question have a min of 512Meg of ram -
  being miserly with font caches is unhelpful)
Admin:
  tested on iMx6

Version 5.35, 4.79.2.288. Tagged as 'Kernel-5_35-4_79_2_288'

Improve support for VMSAv6 cache policies & memory types. Expose raw ARMops via OS_MMUControl & cache information via OS_PlatformFeatures.

Detail:
  Docs/HAL/ARMop_API - Document two new ARMops: Cache_Examine and IMB_List
  hdr/KernelWS - Shuffle workspace round a bit to allow space for the two new ARMops. IOSystemType now deleted (has been deprecated and fixed at 0 for some time)
  s/ARM600 - Cosmetic changes to BangCam to make it clearer what's going on. Add OS_MMUControl 2 (get ARMop) implementation.
  s/ARMops - Switch out different ARMop implementations and XCB tables depending on MMU model - helps reduce assembler warnings and make it clearer what code paths are and aren't possible. Add implementations of the two new ARMops. Simplify ARM_Analyse_Fancy by removing some tests which we know will have certain results. Use CCSIDR constants in ARMv7 ARMops instead of magic numbers. Update XCB table comments, and add a new table for VMSAv6
  s/ChangeDyn - Define constant for the new NCB 'idempotent' cache policy (VMSAv6 normal, non-cacheable memory)
  s/HAL - Use CCSIDR constants instead of magic numbers. Extend RISCOS_MapInIO to allow the TEX bits to be specified.
  s/Kernel - OS_PlatformFeatures 33 (read cache information) implementation (actually, just calls through to an ARMop)
  s/MemInfo - Modify VMSAv6 OS_Memory 0 cache/uncache implementation to use the XCB table instead of modifying L2_C directly. This allows the cacheability to be changed without affecting the memory type - important for e.g. unaligned accesses to work correctly. Implement cache policy support for OS_Memory 13.
  s/Middle - Remove IOSystemType from OS_ReadSysInfo 6.
  s/VMSAv6 - Make sure BangCam uses the XCB table for working out the attributes of temp-uncacheable pages instead of manipulating L2_C directly. Add OS_MMUControl 2 implementation.
  s/AMBControl/memmap - Update VMSAv6 page table pokeing to use XCB table
  s/PMF/osinit - Remove IOSystemType reference, and switch out some pre-HAL code that was trying to use IOSystemType.
Admin:
  Tested on Iyonix, ARM11, Cortex-A7, -A8, -A9, -A15
  Note that contrary to the comments in the source the default NCB policy currently maps to VMSAv6 Device memory type (as per previous kernel versions). This is just a temporary measure, and it will be switched over to Normal, non-cacheable once appropriate memory barriers have been added to the affected IO code.


Version 5.35, 4.79.2.273. Tagged as 'Kernel-5_35-4_79_2_273'

Fix OS_Byte 19 getting stuck if it's called just before the screen blanker activates. Add new OS_ReadSysInfo reason code for determining IIC bus count.

Detail:
  s/PMF/osbyte - For OS_Byte 19, move screen blanker check (and current GraphicsV driver check) inside the WFI loop so that the loop will terminate if the screen should blank (or current GraphicsV driver should die) before the next VSync occurs. Also move the Portable_Idle call to before the interrupt trigger - the old location meant that if the screen blanked we'd continue on to the Portable_Idle call and end up pointlessly stalling the system
  s/Middle - Add OS_ReadSysInfo 14, as a legitimate way of finding the number of IIC buses present on the system
Admin:
  Tested on Pandaboard


Version 5.35, 4.79.2.261. Tagged as 'Kernel-5_35-4_79_2_261'

Detail:
  s/PMF/IIC - OS_IICOp now does some basic validation of its parameters, to help avoid crashes, memory corruption, or bad IIC transfers being performed when invalid parameters are supplied
Admin:
  Tested on Pandaboard
  Fixes ticket #404
  https://www.riscosopen.org/tracker/tickets/404


Version 5.35, 4.79.2.260. Tagged as 'Kernel-5_35-4_79_2_260'

Detail:
  The Raspberry Pi ROM now joins the IOMD ROM in supporting multiple
  architectures, in this case ARMv6 and ARMv7. This has been achieved by
  creating a new machine type specific for Raspberry Pi. The old ARM11ZF
  machine type remains for builds that are ARM11-only.

Version 5.35, 4.79.2.256. Tagged as 'Kernel-5_35-4_79_2_256'

With ProtectStationID turned on there are no routes to writing the Econet station (or bottom octect of the IP address), a function previously fulfilled by the SetStation utility which pokes the hardware directly and doesn't fit into a HAL model.
Add a new subreason to OS_NVMemory to perform this role. This SWI appeared for RISC OS 5.00, and errors unsupported subreasons, so there's a means of run tim selecting its use by checking the platform class and trying the SWI. All RISC OS 5 based platforms can always be upgraded to this version, since they're all still being maintained.

hdr/Options: move the switch with the other options from osinit.s
i2cutils.c: new subreason

Ditch the 'ObsoleteNC1CMOS' switch, if it was obsolete for NC1, it's certainly obsolete now.
Ditch unmaintained messages files for Morris4/Omega/Ursula projects.
Tested on a Risc PC.

Version 5.35, 4.79.2.247. Tagged as 'Kernel-5_35-4_79_2_247'

When HAL_NVMemoryType reports NVMemoryFlag_MaybeIIC the kernel tries to probe a number of common/known addresses on startup, however the result of the probe is stored around line 1346 without a value value for zero page in R2.
This is sufficiently early on that the default data abort handler (from when probing the ARM's abort model) is still in place so the stores are silently skipped.
Due to the RAM clear the NVRamBase (and size) are 0, which later on in ValChecksum result in a zero length IIC probe to address &01.
Now, R2 is initialised.

Version 5.35, 4.79.2.239. Tagged as 'Kernel-5_35-4_79_2_239'

Not tagged.

Detail:
  hdr/KernelWS - Enlarge the SkippedTables area to encompass IICBus_Base
  s/PMF/IIC - Manually set IICBus_Status of each bus to 0 within IICInit
Admin:
  Bug was introduced in Kernel-5_35-4_79_2_168 when IIC initialisation was moved to earlier in the ROM init sequence, but has gone unnoticed due to it only really affecting the high-level API (and none of the relevant HALs were relying on the kernel for the RAM clear)
  Tested on BB-xM with kernel RAM clear


Version 5.35, 4.79.2.236. Tagged as 'Kernel-5_35-4_79_2_236'

Detail:
  s/MemInfo - Fixed typo causing build error with HiProcVecs/zero page relocated kernel
  s/PMF/osinit - Fix the call to GraphicsV_StartupMode to work correctly with non-zero driver numbers
Admin:
  Tested on BB-xM with high processor vectors


Version 5.35, 4.79.2.226. Tagged as 'Kernel-5_35-4_79_2_226'

Detail:
  s/PMF/osinit, s/vdu/vdudriver - Move GraphicsV_StartupMode call from InitialiseMode to TranslateMonitorLeadType. This means (a) it'll only be used if the CMOS mode is set to 'auto' and (b) the returned mode can more easily be read by other modules via OS_ReadSysInfo 1.
  s/vdu/vduswis - Make OS_CheckModeValid act as if we have practically unlimited screen memory if using a GraphcisV driver with variable external framestore. In this case it's the driver should have already OK'd the memory requirements from within the VetMode call issued by FindOKMode - although the check won't be fully valid if we're checking for a shadow mode as the driver currently isn't told how many screen banks are required.
Admin:
  Tested on Raspberry Pi
  OS_CheckModeValid fix ensures valid modes which require large amounts of VRAM are reported correctly when we're currently in a low-memory mode


Version 5.35, 4.79.2.220. Tagged as 'Kernel-5_35-4_79_2_220'

The only function to use the abandoned extensions to OS_ClaimDeviceVector, the 2nd & 3rd members of the structure never got used.
Change uses of HAL_IICDevice to pass in the bus, and expect the device number back.
Docs updated accordingly.

Version 5.35, 4.79.2.218. Tagged as 'Kernel-5_35-4_79_2_218'