- 25 Mar, 2018 1 commit
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Robert Sprowson authored
This is now a HAL only kernel, and 0x3200000 is most likely somewhere in RAM.
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- 03 Feb, 2018 1 commit
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Robert Sprowson authored
Newly born boards have all 0xFF's in their CMOS (EEPROM), but the new order of keyboard scan did Init -> Scan keyboard -> Check (or wipe) CMOS and would therefore leave 0xFF's in a select few kernel workspace areas and OS_Byte values. Defer the init which reads CMOS until after the check/wipe step. Only the screen area size is now done early, but MassageScreenSize clamps that properly anyway. Arthur3.s: Relocate stranded function SetupPrinterBuffer to osinit. PMF/key.s: Drop support for SoftReset. PMF/osinit.s: Stuff in hardcoded defaults at early init. Retrieve the proper ones later. Take ownership of SystemSprite/RamFS/Font Manager dynamic areas (deferrable). vdudriver.s: Use symbolic name. NewReset.s: Defer SystemSprite/RamFS/Font Manager area creation, MouseInit, Read(Hard)CMOSDefaults until later. hdr/Options: Delete unused IgnoreVRAM. Remove MaxRAMFS_Size now PMPs make it not useful. Shuffle ARM6Support/XScaleMiniCache/XScaleJTAGDebug to be adjacent to their definitions. Tested by filling first 256 bytes with 0xFF and powering up. Reset now completes, OS_Byte variables look sensible. Version 5.95. Tagged as 'Kernel-5_95'
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- 09 Sep, 2017 1 commit
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ROOL authored
Detail: To make it easier to support arbitrary complexity keyboard controllers (eg. USB via DWCDriver on the Pi) have the kernel do the early keyboard recovery key press detection instead of the HAL. During the first pass those modules used for reading the keyboard are started, ignoring the CMOS frugal bits. The keyboard is then scanned for 3s, during which time the RAM is cleared (unless the HAL indicated it has already been done). During the second pass the remaining modules are started respecting the CMOS frugal bits. Any which were already started in the first pass are inserted into the new chain, so the keyboard is reset once and only once. Boot times, with a 300cs key scan time in NewReset. Risc PC with 160MB RAM (128+32+0). Times from turning on power to initial "beep", using a stopwatch. RISC OS 3.70 RISC OS 5.22 This OS ARM610 12.5 10.4 10.3 ARM710 11.8 10.2 9.7 StrongARM 233 11.1 9.5 8.4 In NewReset.s: Remove old KbdScan code (leave Reset_IRQ_Handler for IIC only) If HAL_KbdScanDependencies returns a null string then present KbdDone flag and skip to full init. A few vestiges of soft resets removed. Do RAM clear when waiting for INKEY (being careful not to trash the running modules...). Clearing just the freepool on a 2GB Titanium cleared 7EFD6 pages (99.2%). In ModHand.s: 2nd pass need to sneaky renumber the nodes (so *ROMModules is in the right order, frugal bits line up) without resetting the chain In HAL.s: Change ClearPhysRAM to ClearWkspRAM, such that it only clears the kernel workspace rather than all RAM. The bulk of the RAM is cleared during the keyboard scan by new function ClearFreePoolSection. Add a variant of Init_MapInRAM which clears the mapped in RAM too (as these very early claims will not be in the free pool when the RAM is cleared later). Remove HAL keyboard scan setup & IRQ handler. Fix bug in HALDebugHexTX2, the input value needs pre-shifting by 16b before continuing. In GetAll.s, PMF/osbyte.s: Use Hdr:Countries and Hdr:OsBytes for constants. In PMF/key.s, PMF/osinit.s: Relocate the key post init from PostInit to KeyPostInit. Changed PostInit to not tail call KeyPostInit so they can be called independently. In hdr/KernelWs: Improve comments, add InitWsStart label to refer to. In hdr/HALEntries: Add HAL_KbdScanDependencies. Delete KbdFlag exports. Took the opportunity to reorder some of the higher numbered HAL entries and re-grouping, specifically (112,120) (84,106,108,117). Admin: Tested on an ARM6/ARM7/SA Risc PC, BeagleBoard xM, Iyonix, Pandaboard ES, Wandboard Quad, IPEGv5, Titanium, Pi 2 and 3. Requires corresponding HAL change. Submission for USB bounty. Version 5.89. Tagged as 'Kernel-5_89'
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- 30 Jun, 2016 2 commits
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Jeffrey Lee authored
Detail: This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build): * FixCallBacks * UseProcessTransfer * CanLiveOnROMCard * BleedinDaveBell * NewStyleEcfs * DoVdu23_0_12 * LCDPowerCtrl * HostVdu * Print * EmulatorSupport * TubeInfo * AddTubeBashers * TubeChar, TubeString, TubeDumpNoStack, TubeNewlNoStack macros * FIQDebug * VCOstartfix * AssemblingArthur (n.b. still defined for safety with anything in Hdr: which uses it, but not used explicitly by the kernel) * MouseBufferFix * LCDInvert * LCDSupport * DoInitialiseMode * Interruptible32bitModes * MouseBufferManager * StrongARM (new CacheCleanerHack and InterruptDelay switches added to hdr/Options to cover some functionality that StrongARM previously covered) * SAcleanflushbroken * StrongARM_POST * IrqsInClaimRelease * CheckProtectionLink * GSWorkspaceInKernelBuffers * EarlierReentrancyInDAShrink * LongCommandLines * ECC * NoSPSRcorruption * RMTidyDoesNowt * RogerEXEY * StorkPowerSave * DebugForcedReset * AssembleKEYV * AssemblePointerV * ProcessorVectors * Keyboard_Type Assorted old files have also been deleted. Admin: Identical binary to previous revision for IOMD & Raspberry Pi builds Version 5.51. Tagged as 'Kernel-5_51'
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Jeffrey Lee authored
Detail: This change gets rid of the following switches from the source (picking appropriate code paths for a 32bit HAL build): * HAL * HAL26 * HAL32 * No26bitCode * No32bitCode * IncludeTestSrc * FixR9CorruptionInExtensionSWI Various old files have also been removed (POST code, Arc/STB keyboard drivers, etc.) Admin: Identical binary to previous revision for IOMD & Raspberry Pi builds Version 5.49. Tagged as 'Kernel-5_49'
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- 17 Dec, 2013 1 commit
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Jeffrey Lee authored
Detail: hdr/Options, s/ArthurSWIs, s/ChangeDyn, s/PMF/KbdDrA1, s/PMF/key, s/vdu/vdugrafa, s/vdu/vdugrafd, s/vdu/vdugrafhal, s/vdu/vdugrafv, s/vdu/vdumodes, s/vdu/vduwrch: - Strip out DoingVdu build switch (did nothing) - Strip out Japanese16BitSound switch (did nothing) - Strip out MakeModeSelectorsForModeNUmbers switch (altered the mode list structures, but there wasn't any code to do anything with the new data) - Strip out remaining uses of UseGraphicsV switch (now hardwired to {TRUE}) - Strip out ShadowROM switch (altered FixedAreasTable to show the shadow mapping, but code to create the mapping is missing) - Strip out PollMouse switch (old Archimedes-era debug/development option) Admin: Tested on BB-xM Builds to same binary as previous version Version 5.35, 4.79.2.204. Tagged as 'Kernel-5_35-4_79_2_204'
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- 20 Nov, 2013 1 commit
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Robert Sprowson authored
IssueService -> BL Issue_Service.
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- 05 Dec, 2012 1 commit
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Jeffrey Lee authored
Detail: s/Middle - Added OS_ReadSysInfo 13 to allow the kernel to validate a key handler before the owner attempts to install it Resources/UK/Messages - Text for new "Bad key handler" error s/GetAll, s/PMF/Def - Get rid of now obsolete s/PMF/Def file. It only contained definitions for pre-HAL hardware, and for the key handler layout (now in Hdr:Keyboard) hdr/KeyWS - Increased size of KeysDown array so it can hold 768 keys instead of 160. Trim a couple of obsolete variables, and increase CurrKey/OldKey from 1 byte to 4 bytes. s/PMF/key, s/PMF/osbyte - Main bulk of the changes for the new key handling. All the important interfaces are now able to deal with extended (i.e. > 8 bit) internal key numbers, and the kernel is able to cope with key handlers which use 16 bit internal/low level key numbers instead of 8 bit. Admin: Tested on Pandora & BB-xM Requires HdrSrc-2_20 Version 5.35, 4.79.2.178. Tagged as 'Kernel-5_35-4_79_2_178'
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- 07 Sep, 2012 1 commit
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Jeffrey Lee authored
Detail: Docs/RPiNotes - Deleted, contents no longer relevant s/HAL, s/Kernel, s/vdu/vduswis, s/pmf/key - Cleaned up debug code s/NewIRQs - No need to piggy back on timer 0 IRQ to generate a fake VSync; PushModeInfo already claims/releases TickerV as appropriate if video driver doesn't provide a VSync IRQ. s/NewReset - Re-enable LookForHALRTC call, the stack imbalance bug was fixed before the Pi changes were merged in s/vdu/vducursoft - Streamline PostWrchCursor a bit by only preserving R14 around RestorePointer if the software pointer is in use s/vdu/vdudriver - Amend ModeChangeSub improvements to ensure old external framestore handling logic is used if driver doesn't support framestore growth/realloc Admin: Tested on Raspberry Pi with high processor vectors Kernel now looks to be in a good state for merging back into HAL branch Note - Software mouse pointer support in vducursoft only checks HALVideoFeatures, so doesn't take into account the capabilities o...
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- 10 May, 2012 1 commit
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Ben Avison authored
Detail: This is a new branch from the current tip of the HAL branch, incorporating the changes received from Adrian Lees. The same caveats apply - this is a work in progress and will not work on any other platform at present. Admin: Builds, but not tested. Version 5.35, 4.79.2.147.2.1. Tagged as 'Kernel-5_35-4_79_2_147_2_1'
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- 25 Feb, 2012 1 commit
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Jeffrey Lee authored
Detail: hdr/OSEntries, s/HAL, s/Kernel - Add compressed ROM support. With the current scheme, a compressed ROM will have everything except the HAL and kernel compressed. During the keyboard scan period the kernel will allocate some temporary decompression workspace and call the decompression stub that was appended to the ROM. The decompression stub is expected to perform in-place decompression of the ROM. Once decompression is complete the workspace will be freed and the page tables updated to make the ROM image readonly. It's the HAL's responsibility to make sure any compressed ROM is located in an area of physically contiguous RAM large enough to hold the uncompressed image. More info here: http://www.riscosopen.org/wiki/documentation/show/Compressed%20ROMs Makefile, h/OSEntries - Add C export of hdr/OSEntries hdr/HALDevice - Add device ID for Tungsten video device. Convert tabs to spaces for consistency. hdr/HALEntries, s/NewReset - Moved KbdFlag_* definitions to hdr/HALEntries so HALs can use them in their keyboard scan code s/ArthurSWIs, S/HAL, s/HeapSort, s/Kernel, s/MemInfo, s/Middle, s/NewIRQs, s/TickEvents, s/vdu/vdugrafb - Make use of BLX, BFI and long multiplies if the CPU supports them. Don't support SWI calls from thumb mode if the CPU doesn't support thumb. s/HAL - Made the LDMIA in Init_MapInRAM more sensible (register order was backwards). The old code did work, but wasn't doing what the comments described. Removed unused/unfinished HAL_Write0 function. Improve RISCOS_LogToPhys to check L1PT for any section mappings if the logical_to_physical call fails s/ModHand - Save one instruction by using ADR instead of MOV+ADD to compute lr s/NewReset, s/PMF/key - Pass L1PT to HAL_Reset to allow machines without hardware reset (e.g. IOMD) to perform resets by manually disabling the MMU and restarting the ROM s/vdu/vdudriver, s/vdu/vdugrafv - Use GVEntry macro borrowed from NVidia module for setting up the GraphicsV jump table. Make GraphicsV_ReadPaletteEntry call HAL_Video_ReadPaletteEntry if left unclaimed. Fixup GV_Render to only call HAL_Video_Render if the HAL call is implemented. Admin: Tested with OMAP3, IOMD & Tungsten ROMs/softloads. Version 5.35, 4.79.2.138. Tagged as 'Kernel-5_35-4_79_2_138'
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- 24 Sep, 2011 1 commit
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Jeffrey Lee authored
Detail: s/Arthur3, s/ChangeDyn, s/HAL, s/HeapMan, s/Middle, s/MoreSWIs, s/NewIRQs, s/Utility, s/VMSAv6, s/PMF/key, s/PMF/osbyte, s/PMF/osword, s/vdu/vdudecl, s/vdu/vdudriver, s/vdu/vduplot, s/vdu/vduwrch - Tweaked lots of LDM/STM instructions in order to get rid of the depracation/performance warnings Admin: Tested on rev A2 BB-xM Version 5.35, 4.79.2.98.2.53. Tagged as 'Kernel-5_35-4_79_2_98_2_53'
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- 08 Aug, 2011 1 commit
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Jeffrey Lee authored
Detail: A whole mass of changes to add high processor vectors + zero page relocation support to the Cortex branch of the kernel At the moment the code can only cope with two ZeroPage locations, &0 and &FFFF0000. But with a bit more tweaking those restrictions can probably be lifted, allowing ZeroPage to be hidden at almost any address (assuming it's fixed at compile time). If I've done my job right, these restrictions should all be enforced by asserts. There's a new option, HiProcVecs, in hdr/Options to control whether high processor vectors are used. When enabling it and building a ROM, remember: * FPEmulator needs to be built with the FPEAnchor=High option specified in the components file (not FPEAnchorType=High as my FPEmulator commit comments suggested) * ShareFS needs unplugging/removing since it can't cope with it yet * Iyonix users will need to use the latest ROOL boot sequence, to ensure the softloaded modules are compatible (OMAP, etc. don't really softload much so they're OK with older sequences) * However VProtect also needs patching to fix a nasty bug there - http://www.riscosopen.org/tracker/tickets/294 The only other notable thing I can think of is that the ProcessTransfer code in s/ARM600 & s/VMSAv6 is disabled if high processor vectors are in use (it's fairly safe to say that code is obsolete in HAL builds anyway?) Fun challenge for my successor: Try setting ZeroPage to &FFFF00FF (or similar) so its value can be loaded with MVN instead of LDR. Then use positive/negative address offsets to access the contents. File changes: - hdr/ARMops - Modified ARMop macro to take the ZeroPage pointer as a parameter instead of 'zero' - hdr/Copro15ops - Corrected $quick handling in myISB macro - hdr/Options - Added ideal setting for us to use for HiProcVecs - s/AMBControl/allocate, s/AMBControl/growp, s/AMBControl/mapslot, s/AMBControl/memmap, s/AMBControl/service, s/AMBControl/shrinkp, s/Arthur2, s/Arthur3, s/ArthurSWIs, s/ChangeDyn, s/ExtraSWIs, s/HAL, s/HeapMan, s/Kernel, s/MemInfo, s/Middle, s/ModHand, s/MoreSWIs, s/MsgCode, s/NewIRQs, s/NewReset, s/Oscli, s/PMF/buffer, s/PMF/IIC, s/PMF/i2cutils, s/PMF/key, s/PMF/mouse, s/PMF/osbyte, s/PMF/oseven, s/PMF/osinit, s/PMF/osword, s/PMF/oswrch, s/SWINaming, s/Super1, s/SysComms, s/TickEvents, s/Utility, s/vdu/vdu23, s/vdu/vdudriver, s/vdu/vdugrafl, s/vdu/vdugrafv, s/vdu/vdupalxx, s/vdu/vdupointer, s/vdu/vduswis, s/vdu/vduwrch - Lots of updates to deal with zero page relocation - s/ARM600 - UseProcessTransfer option. Zero page relocation support. Deleted pre-HAL ClearPhysRAM code to tidy the file up a bit. - s/ARMops - Zero page relocation support. Set CPUFlag_HiProcVecs when high vectors are in use. - s/KbdResPC - Disable compilation of dead code - s/VMSAv6 - UseProcessTransfer option. Zero page relocation support. Admin: Tested with OMAP & Iyonix ROM softloads, both with high & low zero page. High zero page hasn't had extensive testing, but boot sequence + ROM apps seem to work. Version 5.35, 4.79.2.98.2.48. Tagged as 'Kernel-5_35-4_79_2_98_2_48'
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- 06 May, 2004 1 commit
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Kevin Bracey authored
[Not fully implemented - for now leaves at least 16MB free if only one RAM area; was 1MB]. * Added HAL_USBControllerInfo, HAL_MonitorLeadID and HAL_Video_Render. * Added HAL->OS call OS_IICOpV. * OS_MMUControl now allows independent control of I and C bits. * Added facility to deactivate keyboard debounce (magic word "NoKd" in R2 in KeyV 0). * Fixed problem with RAM amounts not a multiple of 4MB. * Supremacy bit (in VDU 19) now sets all 8 bits of supremacy. * Added PaletteV 14 (reads gamma tables). * Added Supremacy transfer functions (like gamma correction, but for supremacy). Allows easy global supremacy effects in a mode-independent fashion. Controlled with PaletteV 15,16. * Added modes 50-53 (320x240, 1,2,4,8bpp). Intended for small LCD. * Added 13.5kHz versions of TV modes (selected by Hdr:Machine). * Upped desktop version to 5.06. Version 5.35, 4.79.2.66. Tagged as 'Kernel-5_35-4_79_2_66'
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- 02 Dec, 2003 1 commit
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Ben Avison authored
Fixed bug in KeyV handling: if it was called before the keyboard handler was installed, it would abort reading from an address that used to be in the logical copy of physical space on an IOMD machine. This manifested itself during software-initiated resets as an abort during ROM init, leaving you with an apparently dead machine. Version 5.35, 4.79.2.61. Tagged as 'Kernel-5_35-4_79_2_61'
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- 28 Feb, 2003 1 commit
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Ben Avison authored
(b) doesn't unbalance the SVC stack. Version 5.35, 4.79.2.57. Tagged as 'Kernel-5_35-4_79_2_57'
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- 30 Nov, 2002 1 commit
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Ben Avison authored
Detail: Lots of changes since last version, at least the following: * Updated OS timestamp, removed alpha status * Negative INKEY OS version changed to &AA * GraphicsV is now alocated vector number &2A * ROM moved up to &FC000000 * Max application slot increased to 512 Mbytes (for now) * Max size of RMA increased to 256 Mbytes * RMA is now first-created dynamic area (so it gets lowest address after top of application slot) * OS_Memory 10 reimplemeted * New OS_ReadSysInfo 6 values 18-22 added * OS_ReadSysInfo 8 gains flag bit to indicate soft power-off * Misc internal top-bit-set-address fixes * *ChangeDynamicArea can take sizes in megabytes or gigabytes * Magic word "&off" in R0 passed to OS_Reset powers down if possible * Added acceleration: block copy; CLS; text window scroll up; rectangle fill * Disabled LED flashing in page mode (liable to crash) * Masked sprite plot and VDU 5 text avoids reading the screen if possible * Framestore made USR mode accessible * Fix for VDU 5,127 bug - now relies on font definitions being in extreme quarters of memory, rather than bottom half * Allocated 64-bit OS_Convert... SWIs * IIC errors use allocated error numbers * Looks for Dallas RTC before Philips RTC because we're using a Philips NVRAM device with the same ID * Fix to bug that meant the oscillator in the Dallas RTC wasn't enabled * Default mouse type (USB) changed to allocated number * Ram disc max size increased to 128 Mbytes (Ursula merge) and made cacheable for StrongARMs (not XScale) * Branch through zero handler now works in USR mode, by use of a trampoline in the system stack to allow PC-relative register storage * Address exception handler changed to not use 0 as workspace * OS_Memory 13 extended to allow specification of cacheability and access privileges * Added OS_Memory 16 to return important memory addresses * RISCOS_MapInIO() takes cacheable flag in bit 3, access permissions in bits 10 and 11, doubly-mapped flag in bit 20, and access permissions specified flag in bit 21 * Bug fix in last version for application abort handlers didn't quite work; register shuffle required * "Module is not 32-bit compatible" error now reports the module name * Default configured language changed from 10 to 11 (now Desktop again) Version 5.35, 4.79.2.51. Tagged as 'Kernel-5_35-4_79_2_51'
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- 07 Oct, 2002 1 commit
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Kevin Bracey authored
Version 5.35, 4.79.2.48. Tagged as 'Kernel-5_35-4_79_2_48'
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- 15 Sep, 2000 1 commit
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Kevin Bracey authored
* Added ARM_IMB and ARM_IMBRange SWIs as recommended by ARMv5. * Some early prototype HAL bits popped in - a lot of source restructuring still to come. * New debug target creates an AIF image with debug information, and translates this into an ASCII object file for the 16702B logic analyser. Version 5.35, 4.79.2.1. Tagged as 'Kernel-5_35-4_79_2_1'
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- 18 Aug, 2000 1 commit
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Stewart Brodie authored
Removed DriversInKernel conditional. Detail: If the territory changes or the resource file changes, the kernel will now decache all the cached error blocks so that next time they are required, they will be looked up again. The error cacheing is now a kernel build option and is always set to on. Removed one of the 5 error messages to be cached - it never seems to happen. The remaining 4 are more frequent. Admin: Tested in Ursula build. Cannot be used with HdrSrc 0.94. HdrSrc 0.95 and later is required (or HdrSrc 0.93 and earlier subject to other kernel requirements) Requires MessageTrans 0.42 or later for correct operation when a replacement messages file is loaded. Version 5.32. Tagged as 'Kernel-5_32'
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- 04 Apr, 2000 1 commit
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Kevin Bracey authored
Details: The Kernel will now compile to produce a pure 32-bit system if No26bitCode is set to TRUE. If No26bitCode is FALSE, then the Kernel will be a standard 26-bit Kernel, although some internal changes have taken place to minimise compile switches between the two cases. See Docs.32bit for more technical info. The hardest part was the flood-fill... Other changes: Pointer shape changes now take place on the next VSync, rather than actually WAITING for the VSync. Turning the Hourglass on shouldn't slow your machine down by 5% now :) Lots of really crusty pre-IOMD code removed. Admin: Tested in 32 and 26-bit forms in a limited desktop build. Basically, this will need to see a lot of use to iron out difficulties. I'd like anyone who has a non-frozen project to at least attempt using this Kernel. Version 5.23. Tagged as 'Kernel-5_23'
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- 14 Oct, 1999 1 commit
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Kevin Bracey authored
When screen is blanked, DACs are turned off (60mA saving). If DPMS state 3 comes on, sync lines are set low. Version 4.96. Tagged as 'Kernel-4_96'
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- 13 Oct, 1999 1 commit
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Kevin Bracey authored
Now calls XPortable_Idle, not Portable_Idle in key-wait code. Calls Portable_Idle in OS_Byte 19. Version 4.94. Tagged as 'Kernel-4_94'
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- 30 Oct, 1998 1 commit
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Kevin Bracey authored
RISC OS 3.7 generation kernel). CMOS no longer gets scrambled when reset in STB build. UpCall_KeyboardStatus now issued when OS_Byte 202 called or when keyboard status byte is changed by other means (such as pressing Caps Lock). Version 4.67. Tagged as 'Kernel-4_67'
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- 05 Nov, 1996 1 commit
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Neil Turton authored
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