1. 07 Jun, 2009 1 commit
    • Ben Avison's avatar
      Build fix · 0538bbba
      Ben Avison authored
      Detail:
        Some users reported problems building the sources if they had other
        installations of perl on their build machine. The build system was using a
        mixture of "perl" and "<Perl$Dir>.perl" to invoke the interpreter, and
        sometimes but not always using "do" to expand system variables on the
        command line. This has now been standardised to use "do <Perl$Dir>.perl in
        all cases, and where possible, to use the makefile macro ${PERL}.
      Admin:
        Checked that a Tungsten build still works on a build machine with no other
        perl installation. "perl" was aliased to an error to ensure it wasn't used.
      
      Version 5.35, 4.79.2.102. Tagged as 'Kernel-5_35-4_79_2_102'
      0538bbba
  2. 23 Apr, 2009 1 commit
    • Ben Avison's avatar
      Increased Kernel version number to 5.15. · 40949773
      Ben Avison authored
      Detail:
        Castle seems to have settled on an official 5.14 build, so changed our
        version to distinguish our test builds from the official one.
      Admin:
        No testing required
      
      Version 5.35, 4.79.2.101. Tagged as 'Kernel-5_35-4_79_2_101'
      40949773
  3. 21 Apr, 2009 1 commit
  4. 15 Apr, 2009 1 commit
  5. 22 Dec, 2008 1 commit
    • Ben Avison's avatar
      Minor kernel updates · ab08ee91
      Ben Avison authored
      Detail:
        * Added some documentation on previously undocumented HAL calls
        * Corrected NVMemoryFlag_Provision bitmask to match documentation
        * Bugfix: NVMemoryFlag_ProtectAtEnd flag was being ignored
      Admin:
        Not tested
      
      Version 5.35, 4.79.2.98. Tagged as 'Kernel-5_35-4_79_2_98'
      ab08ee91
  6. 03 Dec, 2008 1 commit
  7. 04 Oct, 2008 1 commit
    • Ben Avison's avatar
      Merged in changes from Castle · ffe4d1b4
      Ben Avison authored
      Detail:
        Updated GraphicsV documentation
        Upped ROM version number - currently matches latest Castle release (5.13)
      Admin:
        No code change
      
      Version 5.35, 4.79.2.96. Tagged as 'Kernel-5_35-4_79_2_96'
      ffe4d1b4
  8. 22 Feb, 2006 1 commit
  9. 16 Feb, 2006 1 commit
  10. 07 Oct, 2005 1 commit
  11. 24 Sep, 2005 1 commit
  12. 23 Sep, 2005 1 commit
  13. 16 Sep, 2005 1 commit
  14. 15 Sep, 2005 1 commit
    • Ben Avison's avatar
      Bugfix to *Help. · 82d4de44
      Ben Avison authored
      Detail:
        Internationalisation of *Help code (ie probably dating back to RISC OS 3.1)
        broke the Escape condition checking. This is particularly nasty if you
        do *Help . on a machine with slow hardware scrolling!
      Admin:
        Not tested.
      
      Version 5.35, 4.79.2.89. Tagged as 'Kernel-5_35-4_79_2_89'
      82d4de44
  15. 12 Sep, 2005 1 commit
  16. 09 Jun, 2005 1 commit
  17. 18 May, 2005 1 commit
  18. 04 May, 2005 1 commit
  19. 21 Mar, 2005 1 commit
  20. 12 Nov, 2004 1 commit
    • Ben Avison's avatar
      BBE tidying. · ec70a1a4
      Ben Avison authored
      Detail:
        Tightened up BBE resources export, to exclude in appropriate files (this
        component has a non-standard resources directory structure).
      Admin:
        Tested in a Tungsten BBE build.
      
      Retagged, since this won't affect any existing builds.
      ec70a1a4
  21. 04 Nov, 2004 2 commits
  22. 02 Nov, 2004 1 commit
    • John Ballance's avatar
      several mode: · 208da9fd
      John Ballance authored
           1: default ticker based vsync generated whenever no device present to do so
           2: graphicsv handling and spec updated to use the hi 8 bits in the
              reason code (R4) to define the display number. Kernel only knows
              of display 0
      Detail:
      Admin:
           tested castle  castle added ip
      
      
      Version 5.35, 4.79.2.81. Tagged as 'Kernel-5_35-4_79_2_81'
      208da9fd
  23. 29 Oct, 2004 2 commits
  24. 13 Oct, 2004 1 commit
    • Ben Avison's avatar
      Bugfix and header change. · 9a6346d8
      Ben Avison authored
      Detail:
        * I noticed in passing that the default exception handlers were broken for
          non-IOMD machines if the exception was raised in FIQ mode - unless you
          had a very large application slot, then the machine would lock up. Now
          properly HAL-ised.
        * Added a new event number, allocated for PRISM use back in June.
      Admin:
        Not tested. However, it can't make the situation any worse!
      
      Version 5.35, 4.79.2.78. Tagged as 'Kernel-5_35-4_79_2_78'
      9a6346d8
  25. 06 Oct, 2004 1 commit
    • Ben Avison's avatar
      Change to calling conditions of UnthreadV. · 5e89ff87
      Ben Avison authored
      Detail:
        Previously, UnthreadV was only called when the IRQsema chain was empty, the
        link for the just-completed interrupt having just been removed. However,
        the information in the link is necessary to allow OS_Heap to be called from
        UnthreadV context, and patching up IRQsema within the UnthreadV handler
        prevents the implementation of a prioritised threading scheme. As a result,
        we must call UnthreadV every time the interrupt dispatch unthreads, and
        leave it up to the UnthreadV handler to distinguish between return to
        thread context and return from a nested interrupt handler.
      Admin:
        Will require some sort of patch to enable heap-safe prioritised threading
        on RISC OS-STB 5.0.0 or RISC OS 5.07, the only two released OSes with the
        previous UnthreadV behaviour.
      
      Version 5.35, 4.79.2.77. Tagged as 'Kernel-5_35-4_79_2_77'
      5e89ff87
  26. 08 Sep, 2004 2 commits
  27. 06 Sep, 2004 1 commit
    • John Ballance's avatar
      fix for invalid cmos checksum computation on iyonix new version date for 5.07 · 83827e89
      John Ballance authored
      Detail:
         CheckSumBlock called IIC_OpV to checksum byte 0 of CMOS, but read back the
         resultant checksum from the wrong offset (#20.. new R1 value)..  now
         corrected to #24 as the correct offset (approx line 997).
      
      Admin:
         tested at castle in iyonix
         castle added IP
      
      
      Version 5.35, 4.79.2.74. Tagged as 'Kernel-5_35-4_79_2_74'
      83827e89
  28. 12 Aug, 2004 1 commit
  29. 05 Jul, 2004 1 commit
  30. 25 Jun, 2004 1 commit
    • Kevin Bracey's avatar
      * Changed some STB switches to Embedded_UI · 0731377c
      Kevin Bracey authored
      * Added use of CDVPoduleIRQs (from Hdr:Machine)
      * Fixed checksum corruption in OS_NVMemory block writes ending just below
        the checksum byte.
      * Fixed R4 corruption by OS_Byte 162 with certain HALs.
      
      Version 5.35, 4.79.2.71. Tagged as 'Kernel-5_35-4_79_2_71'
      0731377c
  31. 21 Jun, 2004 2 commits
    • Ben Avison's avatar
      Bugfixes to OS_Bytes 13 and 14. · 799120d5
      Ben Avison authored
      Detail:
        Event numbers greater than 31 are possible, it's just that OS_GenerateEvent
        doesn't bother cheking the event semaphores for them. However, the value
        returned in R1 from these OS_Bytes always indicated that such events were
        disabled. This suggests that OS_GenerateEvent was not always so, but the
        initials in comments there suggest the change was about RISC OS 3.0.
        The OS_Bytes now correctly reflect OS_GenerateEvent behaviour.
        Another bug fix is that once the event semaphores had saturated at 255,
        OS_Byte 13 was still happy to decrement the semaphore, so for example 256
        enables followed by 255 disables would have disabled the event.
      Admin:
        Not tested.
      
      Version 5.35, 4.79.2.70. Tagged as 'Kernel-5_35-4_79_2_70'
      799120d5
    • Ben Avison's avatar
      Added UnthreadV (vector &2B). Called near the end of despatch of the outermost... · 297a95c2
      Ben Avison authored
      Added UnthreadV (vector &2B). Called near the end of despatch of the outermost interrupt, in IRQ32/26 mode with IRQs disabled, just before transient and non-transient callback checking is performed. Suitable for implementing a CBAI replacement.
      
      Version 5.35, 4.79.2.69. Tagged as 'Kernel-5_35-4_79_2_69'
      297a95c2
  32. 18 Jun, 2004 1 commit
    • Ben Avison's avatar
      Added four new VDU variables. · f0e2e714
      Ben Avison authored
      Detail:
        174: left border size
        175: bottom border size
        176: right border size
        177: top border size
      Admin:
        Not tested.
      
      Version 5.35, 4.79.2.68. Tagged as 'Kernel-5_35-4_79_2_68'
      f0e2e714
  33. 07 May, 2004 1 commit
  34. 06 May, 2004 1 commit
    • Kevin Bracey's avatar
      * HAL can choose to limit amount of screen memory to allocate · 0f6941a8
      Kevin Bracey authored
        [Not fully implemented - for now leaves at least 16MB free if only
        one RAM area; was 1MB].
      * Added HAL_USBControllerInfo, HAL_MonitorLeadID and HAL_Video_Render.
      * Added HAL->OS call OS_IICOpV.
      * OS_MMUControl now allows independent control of I and C bits.
      * Added facility to deactivate keyboard debounce (magic word "NoKd" in
        R2 in KeyV 0).
      * Fixed problem with RAM amounts not a multiple of 4MB.
      * Supremacy bit (in VDU 19) now sets all 8 bits of supremacy.
      * Added PaletteV 14 (reads gamma tables).
      * Added Supremacy transfer functions (like gamma correction, but for
        supremacy). Allows easy global supremacy effects in a mode-independent
        fashion. Controlled with PaletteV 15,16.
      * Added modes 50-53 (320x240, 1,2,4,8bpp). Intended for small LCD.
      * Added 13.5kHz versions of TV modes (selected by Hdr:Machine).
      * Upped desktop version to 5.06.
      
      Version 5.35, 4.79.2.66. Tagged as 'Kernel-5_35-4_79_2_66'
      0f6941a8
  35. 04 Mar, 2004 1 commit
  36. 17 Feb, 2004 1 commit