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Commit 0731377c authored by Kevin Bracey's avatar Kevin Bracey
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* Changed some STB switches to Embedded_UI 

* Added use of CDVPoduleIRQs (from Hdr:Machine)
* Fixed checksum corruption in OS_NVMemory block writes ending just below
  the checksum byte.
* Fixed R4 corruption by OS_Byte 162 with certain HALs.

Version 5.35, 4.79.2.71. Tagged as 'Kernel-5_35-4_79_2_71'
parent 799120d5
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VersionASM
View file @ 0731377c
;
; This file is automatically maintained by srccommit, do not edit manually.
; Last processed by srccommit version: 1.2.
; Last processed by srccommit version: 1.68.
;
GBLS Module_MajorVersion
GBLA Module_Version
......@@ -13,11 +13,11 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.70"
Module_Date SETS "21 Jun 2004"
Module_ApplicationDate SETS "21-Jun-04"
Module_MinorVersion SETS "4.79.2.71"
Module_Date SETS "25 Jun 2004"
Module_ApplicationDate SETS "25-Jun-04"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.35 (4.79.2.70)"
Module_HelpVersion SETS "5.35 (21 Jun 2004) 4.79.2.70"
Module_FullVersion SETS "5.35 (4.79.2.71)"
Module_HelpVersion SETS "5.35 (25 Jun 2004) 4.79.2.71"
END
VersionNum
View file @ 0731377c
/* (5.35)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.2.
* Last processed by srccommit version: 1.68.
*
*/
#define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.70
#define Module_Date_CMHG 21 Jun 2004
#define Module_MinorVersion_CMHG 4.79.2.71
#define Module_Date_CMHG 25 Jun 2004
#define Module_MajorVersion "5.35"
#define Module_Version 535
#define Module_MinorVersion "4.79.2.70"
#define Module_Date "21 Jun 2004"
#define Module_MinorVersion "4.79.2.71"
#define Module_Date "25 Jun 2004"
#define Module_ApplicationDate "21-Jun-04"
#define Module_ApplicationDate "25-Jun-04"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "RiscOS/Sources/Kernel"
#define Module_FullVersion "5.35 (4.79.2.70)"
#define Module_HelpVersion "5.35 (21 Jun 2004) 4.79.2.70"
#define Module_FullVersion "5.35 (4.79.2.71)"
#define Module_HelpVersion "5.35 (25 Jun 2004) 4.79.2.71"
#define Module_LibraryVersionInfo "5:35"
hdr/HALEntries
View file @ 0731377c
......@@ -159,6 +159,10 @@ EntryNo_HAL_MonitorLeadID # 1
EntryNo_HAL_Video_Render # 1
EntryNo_HAL_USBPortPower # 1
EntryNo_HAL_USBPortStatus # 1
EntryNo_HAL_USBPortIRQ # 1
KnownHALEntries # 0 ; Used inside Kernel
; Various flags and constants
......
hdr/Options
View file @ 0731377c
......@@ -113,7 +113,7 @@ RISCPCBurstMode SETL {FALSE}
] ; :LNOT:RO371Timings
GBLL DoInitialiseMode
DoInitialiseMode SETL {TRUE} :LAND: STB
DoInitialiseMode SETL {TRUE} :LAND: Embedded_UI
[ STB
GBLL Select16BitSound ; STBs and pre-IOMD systems don't have this link
......
s/NewIRQs
View file @ 0731377c
......@@ -802,7 +802,7 @@ FillInDefaultIRQ1VDevices
ADDNE a1, v1, a1, LSL #2
STMNEIB a1, {a2, a3}
[ :LNOT:{FALSE}
[ CDVPoduleIRQs
; Now Podule bits
MOV a1, #IRQDesp_Link_Unshared
LDR a2, =PIRQ_Chain - (PodDesp_Link-PodDesp_R12Val)
......@@ -918,8 +918,10 @@ Default_PFIQasIRQHandler_Node
; r3 = interrupt location or r3 = 0 or (if r4 > 64K) r3 = routine
; r4 = interrupt mask/polarity r4 = workspace
|
[ CDVPoduleIRQs
; r0 = PFIQ|PIRQ devno -> r3 = interrupt location
; r4 = interrupt mask
]
]
CDV_Flags * &FF000000
......@@ -943,9 +945,11 @@ DeviceVector_Claim ROUT
; TEQ r3, #0
; BNE SubInterruptClaim
|
[ CDVPoduleIRQs
CMP r0, #Podule_DevNo
CMPNE r0, #PFIQasIRQ_DevNo
BEQ PoduleChainClaim
]
]
MOV r3, #12
......@@ -1032,7 +1036,8 @@ AlreadySubbed
STR r10, [r5, #IRQDesp_R12Val]
Pull "r5"
B DV_Exit
|
]
[ CDVPoduleIRQs
PoduleChainClaim
MOV r3, #PodDesp_NodeSize
BL ClaimSysHeapNode
......@@ -1072,7 +1077,7 @@ DeviceVector_Release ROUT
BHS DV_Fail_NaffDevNo
WritePSRc SVC_mode + I_bit, r12 ; IRQs off while holding context
[ :LNOT:(HAL:LAND:{FALSE})
[ CDVPoduleIRQs
CMP r0, #Podule_DevNo
CMPNE r0, #PFIQasIRQ_DevNo
BEQ PoduleChainRelease
......@@ -1182,7 +1187,8 @@ SubInterruptRelease
BL FreeSysHeapNode ; free sub-interrupt
BVS DV_Exit
B %BT02 ; then go back to delink top level
|
]
[ CDVPoduleIRQs
PoduleChainRelease
CMP r0, #Podule_DevNo
LDREQ r0, =PIRQ_Chain-PodDesp_Link
......
s/NewReset
View file @ 0731377c
......@@ -1851,7 +1851,7 @@ ResetPart1Done ; R0 is reset type
SWI XOS_Claim
]
[ DoInitialiseMode :LOR: :LNOT: STB
[ DoInitialiseMode :LOR: :LNOT: Embedded_UI
BL InitialiseMode ; select correct screen mode, in case any
; module prints anything in initialisation
]
......@@ -1939,9 +1939,9 @@ SkipHardResetPart2 ; code executed on all types of reset
STRNEB r0, [r0, #ErrorSemaphore] ; then allow errors to be translated
]
[ DoInitialiseMode :LOR: :LNOT: STB
[ DoInitialiseMode :LOR: :LNOT: Embedded_UI
BL InitialiseMode
[ :LNOT: STB ; don't print stuff on STB type products
[ :LNOT: Embedded_UI
SWI XOS_WriteS
= 10, "$SystemName ", 0 ; now RISC OS (no +) again
ALIGN
......@@ -1969,7 +1969,7 @@ SkipHardResetPart2 ; code executed on all types of reset
]
[ StrongARM
[ STB
[ Embedded_UI
! 0,"Printing of processor type disabled"
|
; IMPORT ARM_PrintProcessorType
......@@ -2078,7 +2078,7 @@ HorologicalDelayLoop1
BL WriteMultiField
64
[ DoInitialiseMode :LOR: :LNOT: STB
[ DoInitialiseMode :LOR: :LNOT: Embedded_UI
BL InitialiseMode
[ International
......@@ -2269,7 +2269,7 @@ str_booterror DCB "Boot$Error",0
AutoBootCosNoKbd
[ :LNOT: STB
[ :LNOT: Embedded_UI
[ International
SWI XOS_WriteI+7
BLVC WriteS_Translated
......
s/PMF/i2cutils
View file @ 0731377c
......@@ -290,7 +290,7 @@ WriteBlock ROUT
CMP R0, #CheckSumCMOS ; are we going to write the checksum byte?
BHI %FT03
CMP R3, #CheckSumCMOS
BHS %FT05
BHI %FT05
03
; we're not writing the checksum byte manually, so we need to update it
......@@ -565,7 +565,7 @@ Read
; else drop thru into real CMOS reading code
[ HAL
Push "R3,sb,R12"
Push "R3,R4,sb,R12"
MOV R4, R0 ; save address
AddressHAL
CallHAL HAL_NVMemoryType
......@@ -573,7 +573,7 @@ Read
TEQ R0, #NVMemoryFlag_None
; If there's no NVmemory, pretend addresses contain 0
Pull "R3,sb,R12", EQ
Pull "R3,R4,sb,R12", EQ
MOVEQ R0, #0
Pull "R1,R2,PC", EQ
......@@ -587,11 +587,11 @@ Read
MOV R2, #1
CallHAL HAL_NVMemoryRead
LDRB R0, [sp], #4 ; read back from stack and restore
Pull "R3,sb,R12"
Pull "R3,R4,sb,R12"
Pull "R1,R2,PC"
20
Pull "R3, sb,R12"
Pull "R3,R4, sb,R12"
]
[ E2ROMSupport
......
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