several mode:

     1: default ticker based vsync generated whenever no device present to do so
     2: graphicsv handling and spec updated to use the hi 8 bits in the
        reason code (R4) to define the display number. Kernel only knows
        of display 0
Detail:
Admin:
     tested castle  castle added ip


Version 5.35, 4.79.2.81. Tagged as 'Kernel-5_35-4_79_2_81'

Docs/GraphicsV

 GraphicsV
 ---------
-R4 = reason code
-
+R4 = reason code .. Bits 31..24 = display number, default 0
 
 
 VSync interrupt occured (Driver -> Kernel)
@@ -67,6 +66,7 @@ out:
 		  (bit 1 => hardware pointer)
 		  (bit 2 => interlace with progressive framestore)
 		  (bit 3 => separate framestore)
+		  (bit 4 => no VSyncs generated)
   R1 = pixel formats (bits 0-5 => 2^n bpp supported)
   R2 = buffer alignment requirement in bytes (power of 2)
 

VersionASM

@@ -13,11 +13,11 @@
                         GBLS    Module_ComponentPath
 Module_MajorVersion     SETS    "5.35"
 Module_Version          SETA    535
-Module_MinorVersion     SETS    "4.79.2.80"
-Module_Date             SETS    "29 Oct 2004"
-Module_ApplicationDate  SETS    "29-Oct-04"
+Module_MinorVersion     SETS    "4.79.2.81"
+Module_Date             SETS    "02 Nov 2004"
+Module_ApplicationDate  SETS    "02-Nov-04"
 Module_ComponentName    SETS    "Kernel"
 Module_ComponentPath    SETS    "RiscOS/Sources/Kernel"
-Module_FullVersion      SETS    "5.35 (4.79.2.80)"
-Module_HelpVersion      SETS    "5.35 (29 Oct 2004) 4.79.2.80"
+Module_FullVersion      SETS    "5.35 (4.79.2.81)"
+Module_HelpVersion      SETS    "5.35 (02 Nov 2004) 4.79.2.81"
                         END

VersionNum

@@ -5,19 +5,19 @@
  *
  */
 #define Module_MajorVersion_CMHG        5.35
-#define Module_MinorVersion_CMHG        4.79.2.80
-#define Module_Date_CMHG                29 Oct 2004
+#define Module_MinorVersion_CMHG        4.79.2.81
+#define Module_Date_CMHG                02 Nov 2004
 
 #define Module_MajorVersion             "5.35"
 #define Module_Version                  535
-#define Module_MinorVersion             "4.79.2.80"
-#define Module_Date                     "29 Oct 2004"
+#define Module_MinorVersion             "4.79.2.81"
+#define Module_Date                     "02 Nov 2004"
 
-#define Module_ApplicationDate          "29-Oct-04"
+#define Module_ApplicationDate          "02-Nov-04"
 
 #define Module_ComponentName            "Kernel"
 #define Module_ComponentPath            "RiscOS/Sources/Kernel"
 
-#define Module_FullVersion              "5.35 (4.79.2.80)"
-#define Module_HelpVersion              "5.35 (29 Oct 2004) 4.79.2.80"
+#define Module_FullVersion              "5.35 (4.79.2.81)"
+#define Module_HelpVersion              "5.35 (02 Nov 2004) 4.79.2.81"
 #define Module_LibraryVersionInfo       "5:35"

s/NewIRQs

@@ -798,7 +798,14 @@ FillInDefaultIRQ1VDevices
         ADDNE   a1, a1, a1, LSL #1
         ADDNE   a1, v1, a1, LSL #2
         STMNEIB a1, {a2, a3}
-
+;        BNE     %ft1
+;        ; here if no vsync handler .. fudge it from tickerv
+;        MOV     a1, #TickerV
+;        LDR     a2, =FalseVsyncIRQ
+;        LDR     a3, =OsbyteVars
+;        SWI     XOS_Claim
+
+1
  [ CDVPoduleIRQs
 ; Now Podule bits
         MOV     a1, #IRQDesp_Link_Unshared
@@ -1492,6 +1499,13 @@ TickOne ROUT
 ; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 
         ALIGN 32
+FalseVsyncIRQ ROUT
+        MOV     R1, #0
+        LDR     R0, [R1, #MetroGnome]
+        TST     R0, #1
+        MOVEQ   pc, lr
+        Push    "lr"
+        B       VsyncIRQ_ExtEntry
 
 VsyncIRQ ROUT
 

s/PMF/osinit

@@ -144,16 +144,17 @@ BuffPtrInitLoop
         MOV     R0, #0
         CallHAL HAL_TimerDevice
         MOV     R4, R0
+        CallHAL HAL_IRQClear            ; clear timer 0 IRQ
+        MOV     R0, R4
+        CallHAL HAL_IRQEnable           ; enable timer 0 IRQ
+
         CallHAL HAL_VideoFlybackDevice
         CMP     R0, #-1
         MOVNE   R5, R0
         CallHAL HAL_IRQClear, NE        ; clear vsync IRQ
-        MOV     R0, R4
-        CallHAL HAL_IRQClear            ; clear timer 0 IRQ
-        MOV     R0, R5
-        CallHAL HAL_IRQEnable           ; enable vsync IRQ
-        MOV     R0, R4
-        CallHAL HAL_IRQEnable           ; enable timer 0 IRQ
+        CMP     R5, #-1
+        MOVNE   R0, R5
+        CallHAL HAL_IRQEnable, NE       ; enable vsync IRQ
         Pull    "r9,r12"
  |
         MOV     R1, #IOC

s/vdu/vdudriver

@@ -1290,8 +1290,20 @@ PushModeInfoCommonNoService
         Push    "r0-r2,r4"
         MOV     r4, #GraphicsV_DisplayFeatures
         BL      CallGraphicsV
-        TEQ     r4, #0
-        TSTEQ   r0, #1                          ; bit 0 is h/w scroll support
+  ; claim or release falsevsync vector if vsyncs supported/not supported
+        Push    "r0"
+        TST     r0, #1<<4                       ; NE = VSyncs not generated?
+        MOV     a1, #TickerV
+        LDR     a2, =FalseVsyncIRQ
+        LDR     a3, =OsbyteVars
+        BEQ     %ft2
+        SWI     XOS_Claim
+        B       %ft1
+2       SWI     XOS_Release
+1
+        Pull    "r0"
+
+        TST     r0, #1                          ; bit 0 is h/w scroll support
         Pull    "r0-r2,r4"
  |
         LDR     r14, [WsPtr, #HALVideoFeatures]

s/vdu/vdugrafv

@@ -38,9 +38,11 @@
         ASSERT  GraphicsV_Render = 13
         ASSERT  GraphicsV_IICOp = 14
 
+
 MOSGraphicsV ROUT
-        CMP     r4, #13
+        CMP     r4, #(MOSGraphicsV_TableEnd - MOSGraphicsV_Table) / 4
         ADDLS   pc, pc, r4, LSL #2
+MOSGraphicsV_Table
         MOV     pc, lr                  ; reason code not known, so pass it on
         MOV     pc, lr                  ; 0
         B       GV_VSync                ; 1
@@ -57,6 +59,7 @@ MOSGraphicsV ROUT
         MOV     pc, lr                  ; 12
         B       GV_Render               ; 13
         B       GV_IICOp                ; 14
+MOSGraphicsV_TableEnd
 
 GV_VSync        ROUT
  [ {FALSE}