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; Copyright 2000 Pace Micro Technology plc
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;

; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; essential global variables
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

                GET   Version
                GBLS  VersionNo
VersionNo       SETS  "$VString ($Date)"

MosVer          *       6               ; As returned by OS_Byte 0

; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; now the conditional flags for the version we want
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

AssemblingArthur SETL  {TRUE}
; defined in hdr.system to allow conditionals in macros

                GBLL    CacheOff
CacheOff        SETL    {FALSE}

                GBLL    ShowWS
ShowWS          SETL    {TRUE}          ; Make KernelWS be verbose

                GBLL    Module
Module          SETL    {FALSE}

                GBLL    SqueezeMods     ; whether squeezed modules are allowed
SqueezeMods     SETL    {TRUE}

                GBLL    International   ; whether text and error messages come from  messages file.
International   SETL    {TRUE}

                GBLL    CacheCommonErrors       ; whether common internationalised errors are cached in sysheap
CacheCommonErrors       SETL    International :LAND: {TRUE}

                GBLL    CacheCMOSRAM            ; Whether to keep a RAM copy of CMOS RAM for faster access
CacheCMOSRAM    SETL    {TRUE}

                GBLL    ProtectStationID        ; Disallow writes to NetStnCMOS (via OS_Byte & OS_NVMemory)
ProtectStationID        SETL {TRUE}

                GBLL    ValidateCMOS            ; Apply special CMOS-corruption detection code,
ValidateCMOS    SETL    {TRUE}                  ; and do minimal default settings.

                GBLL    ChecksumCMOS            ; Inspect the CMOS checksum byte, and act like a CMOS reset if it's
ChecksumCMOS    SETL    {TRUE}                  ; invalid. Also, calculate CMOS checksum and write it when needed.

                GBLL    ShrinkableDAs           ; if true, support Shrinkable Dynamic Areas (eg. CacheFS)
ShrinkableDAs   SETL    {TRUE}

                GBLL    DA_Batman               ; Holey dynamic areas Batman!
DA_Batman       SETL    {TRUE}                  ; concept of sparsely mapped dynamic areas introduced for Ursula

LongCLISize          * 1024                     ; buffer size for long commands

                GBLL    SASTMhatbroken          ; whether ROM must support SA110's with broken STM^ (revision 3 should fix this)
SASTMhatbroken  SETL    SupportARMv4 :LAND: NoARMv5

                GBLL    CacheCleanerHack        ; Cache clean hack in ClearPhysRAM for platforms that use DCacheCleanAddress. Does not work with all CPUs!
                GBLL    InterruptDelay          ; True if we might be running on a CPU with CPUFlag_InterruptDelay set (e.g. StrongARM)
CacheCleanerHack   SETL {TRUE}
InterruptDelay     SETL SupportARMv4 :LAND: NoARMv5

                GBLL    ARM6support
                GBLL    XScaleMiniCache         ; is the XScale mini data-cache used (at all)
                GBLL    XScaleJTAGDebug
ARM6support        SETL (MEMM_Type = "ARM600") :LAND: NoARMv4
XScaleMiniCache    SETL {FALSE}
XScaleJTAGDebug    SETL {TRUE}

                ;mjs
                ;Chocolate flavours implemented for Ursula, but they are generally useful performance enhancements
                ;(not all Ursula performance improvements are flagged with Chocolate - eg. simple changes such as slicker SWI
                ;despatch and wider SWI hashing)
                ;
                ;any ARM
                ;
                GBLL    ChocolateSysHeap        ;whether to save cost of SysHeap block claim/release for common cases (eg. callback blocks)
                                                ;also reduces SysHeap stress by using fewer blocks in total
                GBLL    ChocolateOSMod          ;whether to reduce SysHeap stress in module handling
                GBLL    ChocolateSysVars        ;whether to do performance improvements in system variable handling
                GBLL    ChocolateOscli          ;whether to do performance improvements in Oscli command stuff
                GBLL    ChocolateService        ;whether to implement fast module service call distribution (uses table introduced
                                                ;into module format by Ursula API)
                GBLL    ChocolateAMB            ;whether to compile support for Lazy task swapping
                                                ;possibly enabled at run time for some ARMs only
ChocolateSysHeap       SETL {TRUE}
ChocolateOSMod         SETL {TRUE}
ChocolateSysVars       SETL {TRUE}
ChocolateOscli         SETL {TRUE}
ChocolateService       SETL {TRUE}
ChocolateAMB           SETL {TRUE}
  [ ChocolateSysHeap
                       GBLA  MaxChocolateCBBlocks  ;max quick CallBack blocks available at any one time (else ordinary heap nodes used)
                       GBLA  MaxChocolateSVBlocks  ;max quick Software Vector blocks available at any one time (else ordinary heap nodes used)
                       GBLA  MaxChocolateTKBlocks  ;max quick Ticker blocks available at any one time (else ordinary heap nodes used)
                       GBLA  MaxChocolateMRBlocks  ;max module ROM blocks before ordinary heap nodes are used (reduces total no. nodes in SysHeap)
                       GBLA  MaxChocolateMABlocks  ;max module Active blocks before ordinary heap nodes are used
                       GBLA  MaxChocolateMSBlocks  ;max module SWI Hash blocks before ordinary heap nodes are used
MaxChocolateCBBlocks   SETA   32
MaxChocolateSVBlocks   SETA  128
MaxChocolateTKBlocks   SETA   32
MaxChocolateMRBlocks   SETA  150
MaxChocolateMABlocks   SETA  150
MaxChocolateMSBlocks   SETA  150
  ]

                          GBLL    Oscli_QuickAliases
                          GBLL    Oscli_HashedCommands
Oscli_QuickAliases        SETL    {TRUE} :LAND: ChocolateOscli   ;try to do a better job of checking for aliases
Oscli_HashedCommands      SETL    {TRUE} :LAND: ChocolateOscli   ;try to do a better job of finding commands

                     GBLL    mjsServiceTrace          ;for statistics gathering on service calls only
mjsServiceTrace      SETL    {FALSE}
                     GBLL    mjsSysHeapNodesTrace     ;for statistics gathering on some SysHeap nodes only
mjsSysHeapNodesTrace SETL    {FALSE}

                GBLL    DebugROMInit
                GBLL    DebugHALTX

              [ FreezeDevRel
DebugROMInit    SETL    {FALSE}
DebugHALTX      SETL    {FALSE}
              |
DebugROMInit    SETL    (Version :AND: 1) = 1   ; Yes for odd numbered development
DebugHALTX      SETL    (Version :AND: 1) = 1   ; Yes for odd numbered development
              ]

                GBLL    DebugROMPostInit ; Displays when the PostInit service call is sent to each ROM module (currently works on vanilla service call handling only)
DebugROMPostInit SETL   (:LNOT: ChocolateService) :LAND: {FALSE}

                GBLL    DebugTerminal           ; default WRCH and RDCH through HAL
DebugTerminal   SETL    {FALSE}

                GBLL    DebugHeaps              ; initialise claimed and freed blocks
DebugHeaps      SETL    {FALSE}                 ; (may slow things down unacceptably)

                GBLL    DebugCDA2       ; ChangeDynamicArea and related options
DebugCDA2       SETL    {FALSE}

              [ DebugHeaps :LOR: DebugROMInit :LOR: DebugROMPostInit :LOR: DebugCDA2
                ! 0, "*** WARNING *** Debugging assembled in"
              ]

  [ :LNOT: :DEF: HiProcVecs
                GBLL    HiProcVecs              ; Relocate processor vectors and first 16K of workspace to &FFFF0000
HiProcVecs      SETL    "$Machine"="Tungsten" :LOR: :LNOT: NoARMv6
  ]

                GBLL    CompatibilityPage       ; Add a read-only page at &0 for compatibility with buggy zero page reading software
CompatibilityPage SETL  HiProcVecs

                GBLA    FirstUnpluggableModule
FirstUnpluggableModule  SETA 8                  ; Podule, FileSwitch, ResourceFS, Messages, MessageTrans,
                                                ; TerritoryManager, UK. Moot now the keyboard and mouse aren't
                                                ; in the kernel - unplug those and you're stuffed.

                GBLL  PMPDebug
PMPDebug        SETL  {FALSE}                   ; Physical memory pool debugging

                GBLL  PMPParanoid
PMPParanoid     SETL  {FALSE}                   ; Validate PMPs after most ops

                GBLL  PMPRAMFS
PMPRAMFS        SETL  {TRUE}                    ; Whether RAMFS DA is a PMP (requires compatible RAMFS module)
PMPRAMFS_Size   * 256                           ; Number of logical pages (physical size is unlimited)

  [ :LNOT: :DEF: LongDesc
                GBLL    LongDesc
LongDesc        SETL    {FALSE} :LAND: MEMM_Type = "VMSAv6" ; Support long descriptor page table format?
  ]

  [ :LNOT: :DEF: ShortDesc
                GBLL    ShortDesc
ShortDesc       SETL    {TRUE}                  ; Support short descriptor page table format?
  ]

                ASSERT  LongDesc :LOR: ShortDesc ; Must support at least one!

                GBLL    CacheablePageTables
CacheablePageTables SETL {TRUE}                 ; Use cacheable page tables where possible

                GBLL    SyncPageTables
SyncPageTables  SETL    (MEMM_Type = "VMSAv6") :LOR: CacheablePageTables ; Any page table modification (specifically, overwriting faulting entries) requires synchronisation

                ; Control over behaviour of memory access privilege 1 when
                ; using long descriptor page tables:
                ; Traditional permissions are user RX + privileged RWX
                ; EmulateAP1 {TRUE} will provide user R + privileged RWX, by using AbortTrap to implement user read support
                ; EmulateAP1 {FALSE} will provide user RWX + privileged RWX (weaker security since user code can now write to the memory)
                GBLL    EmulateAP1
EmulateAP1      SETL    LongDesc :LAND: {TRUE}

  [ :LNOT: :DEF: SMP
                GBLL    SMP
SMP             SETL    (MEMM_Type = "VMSAv6") :LAND: {TRUE} ; Enable SMP-related changes
  ]

                    GBLL  UseNewFX0Error
UseNewFX0Error      SETL  ((Version :AND: 1) = 1) ; Whether *FX 0 should show the ROM link date instead of the UtilityModule date

                    GBLL  CheckErrorBlocks
CheckErrorBlocks    SETL  {FALSE}               ; Attempt to check whether error blocks are valid (in addition to the error pointer checks)

                    GBLS  GetMessages
 [ International
GetMessages         SETS  "GET s.MsgCode"
 |
GetMessages         SETS  ""
 ]
                    GBLS  GetUnsqueeze
 [ SqueezeMods
GetUnsqueeze        SETS  "GET s.Unsqueeze"
 |
GetUnsqueeze        SETS  ""
 ]
                    GBLS  GetKernelMEMC
GetKernelMEMC       SETS  "GET s." :CC: MEMM_Type

; control switches for med_00001 (the flood fill routines 1024 line limit).
; Switches have the following effects:
;
; _userma     Will use rma if >48K is free, up to a maximum of 128K. It will
;             try to acheive the latter by growing the rma if possible.
; _twowords   Use two word entries in the queue. This overcomes the limitation
;             of the original packed word format.

                    GBLL  med_00001_userma
                    GBLL  med_00001_twowords
med_00001_userma    SETL  {TRUE}
med_00001_twowords  SETL  {TRUE}

 [ med_00001_userma
smallest_rma_size   * (48*1024)                  ; define the low threshold for rma use
largest_rma_size    * (128*1024)                 ; and the ceiling for rma use
 ]

; Ickle macros. We want to be able to turn IRQs on and off fast in the
; code in various places. To do this easily, have a name for the
; SVC26/32 mode we run in.

USR2632 * USR32_mode
SVC2632 * SVC32_mode

        END