Skip to content

GitLab

Commit e5188347 authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Adopt some switches from Hdr:Machine/Machine 

SystemName, ROMSizeOffset, HAL32, HAL26 only used here, moved here.
Remove uses of "M_" booleans, apparently that's bad form.
Fix SWIDespatch_Size for the non thumb capable case (was ASSERTing).
Swapped UserMemStart for AppSpaceStart.
Removed last use of OldComboSupport (pre Medusa!).
Removed switch 'CDVPoduleIRQs', a correction to the machine definitions mean this can now simply be switched on NumberOfPodules (previously, IOMD couldn't chain podule interrupts).
Take out disabled sub interrupt support - it's in CVS if you want to try to get it working.
Moved ConfiguredLang to 11 for everyone, it only matters if !Boot fails, and no harm in making it common for 5.xx onwards.

Version 5.35, 4.79.2.183. Tagged as 'Kernel-5_35-4_79_2_183'
parent 96e77d80
Hide whitespace changes
Inline Side-by-side
Showing with 61 additions and 212 deletions
TestSrc/ROMCard
View file @ e5188347
......@@ -33,6 +33,10 @@
; Can't have CanLiveOnROMCard TRUE without ROMCardSupport
ASSERT ROMCardSupport
; Offset from start of ROM to word containing ROM size.
GBLA ROMSizeOffset
ROMSizeOffset SETA &60
GBLL DebugROMCard
DebugROMCard SETL {FALSE}
......
Version
View file @ e5188347
......@@ -4,6 +4,7 @@
GBLA Version
GBLS VString
GBLS SystemName
GBLS Date
GBLA OSVersionID
......@@ -12,10 +13,12 @@ OSVersionID SETA &AA
[ Embedded_UI
Version SETA Module_Version
VString SETS Module_MajorVersion
SystemName SETS "NC OS"
Date SETS Module_Date ; version for STB/NC OS
|
Version SETA 519
VString SETS "5.19"
SystemName SETS "RISC OS"
[ (Version :AND: 1) = 1
Date SETS Module_Date ; Odd-numbered (i.e. development) build, use
; date of last source check in
......
VersionASM
View file @ e5188347
......@@ -13,11 +13,11 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.182"
Module_Date SETS "22 Jan 2013"
Module_ApplicationDate SETS "22-Jan-13"
Module_MinorVersion SETS "4.79.2.183"
Module_Date SETS "27 Jan 2013"
Module_ApplicationDate SETS "27-Jan-13"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.35 (4.79.2.182)"
Module_HelpVersion SETS "5.35 (22 Jan 2013) 4.79.2.182"
Module_FullVersion SETS "5.35 (4.79.2.183)"
Module_HelpVersion SETS "5.35 (27 Jan 2013) 4.79.2.183"
END
VersionNum
View file @ e5188347
......@@ -5,19 +5,19 @@
*
*/
#define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.182
#define Module_Date_CMHG 22 Jan 2013
#define Module_MinorVersion_CMHG 4.79.2.183
#define Module_Date_CMHG 27 Jan 2013
#define Module_MajorVersion "5.35"
#define Module_Version 535
#define Module_MinorVersion "4.79.2.182"
#define Module_Date "22 Jan 2013"
#define Module_MinorVersion "4.79.2.183"
#define Module_Date "27 Jan 2013"
#define Module_ApplicationDate "22-Jan-13"
#define Module_ApplicationDate "27-Jan-13"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
#define Module_FullVersion "5.35 (4.79.2.182)"
#define Module_HelpVersion "5.35 (22 Jan 2013) 4.79.2.182"
#define Module_FullVersion "5.35 (4.79.2.183)"
#define Module_HelpVersion "5.35 (27 Jan 2013) 4.79.2.183"
#define Module_LibraryVersionInfo "5:35"
hdr/KernelWS
View file @ e5188347
......@@ -1828,14 +1828,14 @@ SvcTable |#| &400
[ :LNOT: HAL32
ASSERT SvcTable = &01F033FC ; Required for SVC table pokers, 1.20 compatible
]
[ No26bitCode
[ SupportARMT
[ ZeroPage = 0
SWIDespatch_Size * 32*4
|
SWIDespatch_Size * 33*4
]
|
SWIDespatch_Size * 30*4 ; can save 2 instructions if 26-bit (no Thumb)
SWIDespatch_Size * 30*4 ; can save 2 instructions if no Thumb
]
SWIDespatch |#| SWIDespatch_Size
......
hdr/Options
View file @ e5188347
......@@ -13,13 +13,6 @@
; limitations under the License.
;
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; now the conditional flags for the version we want
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
GBLL CacheOff
CacheOff SETL {FALSE}
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; essential global variables
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
......@@ -34,6 +27,10 @@ VersionNo SETS "$VString ($Date) $Module_MinorVersion"
MosVer * 6 ; As returned by OS_Byte 0
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; now the conditional flags for the version we want
; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
GBLL AddTubeBashers
AddTubeBashers SETL {FALSE}
......@@ -43,11 +40,15 @@ Tube_Simulator * 2
GBLA TubeType
TubeType SETA Tube_Simulator
UserMemStart * &8000
AssemblingArthur SETL {TRUE}
; defined in hdr.system to allow conditionals in macros
GBLL CanLiveOnROMCard
CanLiveOnROMCard SETL ROMCardSupport
GBLL CacheOff
CacheOff SETL {FALSE}
GBLL ShowWS
ShowWS SETL {TRUE} ; Make KernelWS be verbose
......@@ -60,6 +61,11 @@ Module SETL {FALSE}
GBLL IncludeTestSrc ; whether test code is included
IncludeTestSrc SETL :LNOT: HAL
GBLL HAL26
GBLL HAL32 ; HAL32 indicates the new 32-bit memory map in use.
HAL32 SETL HAL :LAND: No26bitCode
HAL26 SETL HAL :LAND: :LNOT: No26bitCode
;RISC OS 3.71 onwards assumed bus timings - if true, then ROM speeds atc are assumed according to IOMD ID regs. as follows:
; if IOMD (Risc PC) ROM ticks 5-3 (assumed bus 32 MHz)
; if 7500 (A7000) ROM ticks 5-3 (assumed bus 32 MHz), all clocks divide-by-1
......@@ -315,18 +321,11 @@ InterlacedPointer SETL {TRUE} :LAND: STB ; enable code to do proper inter
GBLL HiProcVecs ; Relocate processor vectors and first 16K of workspace to &FFFF0000
HiProcVecs SETL {FALSE} ; Leave off for now
; In an ideal world, we'd use something like this:
; HiProcVecs SETL M_Tungsten :LOR: :LNOT: NoARMv6
; HiProcVecs SETL "$Machine"="Tungsten" :LOR: :LNOT: NoARMv6
GBLL DebugForcedReset ; debug forced hard resets
DebugForcedReset SETL {FALSE}
GBLA ConfiguredLang ; default configured language
[ M_Tungsten
ConfiguredLang SETA 11
|
ConfiguredLang SETA 10
]
GBLA FirstUnpluggableModule
FirstUnpluggableModule SETA 8 ; Podule, FileSwitch, ResourceFS, Messages, MessageTrans,
; TerritoryManager, UK. Moot now the keyboard and mouse aren't
......
s/ARMops
View file @ e5188347
......@@ -626,7 +626,7 @@ Analyse_WB_CR7_Lx
; of stuff breaking
BL Cache_CleanInvalidateAll_WB_CR7_Lx ; Ensure L2 cache is clean
[ M_CortexA9
[ "$Machine"="CortexA9"
; write access to ACTLR is only permitted in Secure Mode
; so we must use smc API calls
STMFD sp!, {a2-a4,v3-v4,ip}
......
s/ArthurSWIs
View file @ e5188347
......@@ -705,7 +705,7 @@ Application_Delink ROUT
02 LDR R12, [R10, #Address]
CMP R12, R4
BGT %BT04
CMP R12, #UserMemStart
CMP R12, #AppSpaceStart
BLT %BT04
; appl entry found: put in buffer, free it
......
s/GetAll
View file @ e5188347
......@@ -72,7 +72,7 @@
GET Hdr:Wimp
GET Hdr:ColourTran
GET Hdr:Debug
GET Hdr:nvram
GET Hdr:NVRAM
GET Hdr:PortMan
GET Hdr:SerialOp
GET Hdr:Keyboard
......@@ -168,11 +168,6 @@ EndOfPMF
! 0, "PMF section size = &" :CC: :STR: (EndOfPMF - StartOfPMF)
[ {FALSE}
StartOfAMB_beforealign
ALIGN 4096 ;align to 4k page boundary, for easy ROMpatch
]
StartOfAMB
GET s.AMBControl.AMB
EndOfAMB
......
s/NewIRQs
View file @ e5188347
......@@ -224,7 +224,7 @@ FillInDefaultIRQ1VDevices
STMNEIB a1, {a2, a3}
1
[ CDVPoduleIRQs
[ NumberOfPodules > 0
; Now Podule bits
MOV a1, #IRQDesp_Link_Unshared
LDR a2, =ZeroPage+PFIQasIRQ_Chain - (PodDesp_Link-PodDesp_R12Val)
......@@ -274,41 +274,6 @@ PodDesp_CallAddr # 4 ; address to call if (?Address EOR (Mask>>8)) AND Mas
PodDesp_Link # 4 ; next node
PodDesp_NodeSize # 0
[ HAL:LAND:{FALSE}
ROUT
; In r1 -> top level node
; r12 = sub chain
01 LDR r12, [r12, #PodDesp_Link-PodDesp_R12Val]
SubInterrupt_Despatch
LDMIA r12!, {r2, r3} ; address and mask
CMP r3, #&10000
LDRLOB r2, [r2]
BHS %FT02
EOR r2, r2, r3, LSR #8 ; polarity inversion
TST r2, r3 ; check against mask
BEQ %BT01
LDMIA r12, {r12, pc}
02
Push "r0,r1,r12,lr"
MOV r0, r3
MOV r12, r3
[ NoARMv5
MOV lr, pc
MOV pc, r2
|
BLX r2
]
TEQ r0, #0
Pull "r0,r1,r12,lr"
BEQ %BT01
LDMIA r12, {r12, pc}
NotSubInterrupt
LDR r1, [r1, #8] ; call next (full) handler
LDMIA r1, {r12, pc}
|
; In r12 = PFIQasIRQ_Chain - (PodDesp_Link-PodDesp_R12Val)
; or PIRQ_Chain - (PodDesp_Link-PodDesp_R12Val) from despatcher
......@@ -324,19 +289,13 @@ PIRQ_Despatch ; All the same thing now
ANDS r1, r1, r2
BEQ %BT01
LDMIA r12, {r12, pc}
]
Default_SubInterruptHandler_Node
Default_PIRQHandler_Node
Default_PFIQasIRQHandler_Node
& .+4 ; address we know has non-zero value!
& -1 ; mask
& 0 ; handler r12
[ HAL:LAND:{FALSE}
& NotSubInterrupt ; handler code
|
& IRQ ; handler code
]
& 0 ; null link for naff release checking
; +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
......@@ -345,15 +304,8 @@ Default_PFIQasIRQHandler_Node
; r0 = Device number
; r1 = call address
; r2 = r12 value
[ HAL
; r3 = interrupt location or r3 = 0 or (if r4 > 64K) r3 = routine
; r4 = interrupt mask/polarity r4 = workspace
|
[ CDVPoduleIRQs
; r0 = PFIQ|PIRQ devno -> r3 = interrupt location
; r4 = interrupt mask
]
]
; r3 = interrupt location } when podules are
; r4 = interrupt mask/polarity } supported and r0 = podule device number
CDV_Flags * &FF000000
CDV_Shared * 1:SHL:31
......@@ -374,17 +326,12 @@ DeviceVector_Claim ROUT
CMP r0, lr
BHS DV_Fail_NaffDevNo
[ HAL:LAND:{FALSE}
; TEQ r3, #0
; BNE SubInterruptClaim
|
[ CDVPoduleIRQs
[ NumberOfPodules > 0
! 0, "ClaimDeviceVector has podule IRQ/FIQs assembled in"
CMP r0, #Podule_DevNo
CMPNE r0, #PFIQasIRQ_DevNo
BEQ PoduleChainClaim
]
]
MOV r3, #12
BL ClaimSysHeapNode
BVS DV_Exit
......@@ -426,51 +373,7 @@ DV_Fail_NaffDevNo
MakeErrorBlock NaffDevNo
[ HAL:LAND:{FALSE}
SubInterruptClaim
Push "r5"
ADD r0, r0, r0, LSL #1 ; *3
LDR r5, =DefaultIRQ1V-DefaultIRQ1Vcode+Devices
ADD r5, r5, r0, LSL #2
LDR r2, [r5, #IRQDesp_CallAddr]
ADR r3, SubInterrupt_Despatch
TEQ r2, r3
BEQ AlreadySubbed
; Need to claim the top-level interrupt.
MOV r3, #12
BL ClaimSysHeapNode
Pull "r5",VS
BVS DV_Exit
WritePSRc SVC_mode+I_bit, r10 ; IRQs off for update (on again on SWI exit)
LDMIA r5, {r0, r3, r10}
STMIA r2, {r0, r3, r10} ; copy current head into node
ADR r0, Default_SubInterruptHandler_Node
ADR r3, SubInterrupt_Despatch
STR r0, [r5, #IRQDesp_R12Val]
STR r3, [r5, #IRQDesp_CallAddr]
STR r2, [r5, #IRQDesp_Link]
AlreadySubbed
; r1 -> top level interrupt entry
MOV r3, #PodDesp_NodeSize
BL ClaimSysHeapNode
Pull "r5",VS
BVS DV_Exit
MOV r10, r2
ADD r1, sp, #8
LDMFD r1, {r1-r3}
STR r1, [r10, #PodDesp_CallAddr]
STR r2, [r10, #PodDesp_R12Val]
STR r3, [r10, #PodDesp_Address]
STR r4, [r10, #PodDesp_Mask]
WritePSRc SVC_mode+I_bit, r2 ; IRQs off for update
LDR r0, [r5, #IRQDesp_R12Val]
STR r0, [r10, #PodDesp_Link]
STR r10, [r5, #IRQDesp_R12Val]
Pull "r5"
B DV_Exit
]
[ CDVPoduleIRQs
[ NumberOfPodules > 0
PoduleChainClaim
MOV r3, #PodDesp_NodeSize
BL ClaimSysHeapNode
......@@ -512,7 +415,8 @@ DeviceVector_Release ROUT
BHS DV_Fail_NaffDevNo
WritePSRc SVC_mode + I_bit, r12 ; IRQs off while holding context
[ CDVPoduleIRQs
[ NumberOfPodules > 0
! 0, "ReleaseDeviceVector has podule IRQ/FIQs assembled in"
CMP r0, #Podule_DevNo
CMPNE r0, #PFIQasIRQ_DevNo
BEQ PoduleChainRelease
......@@ -523,11 +427,6 @@ DeviceVector_Release ROUT
ADD r12, r12, r0, LSL #2 ; address of node
MOV r11, #-1 ; "fudge" predecessor node
[ HAL
; TEQ r3, #0
; BNE SubInterruptRelease
]
[ HAL
01 LDMIB r12, {r3, r10}
|
......@@ -580,50 +479,7 @@ DeviceVector_Release ROUT
BL FreeSysHeapNode ; free block
B DV_Exit
[ HAL:LAND:{FALSE}
SubInterruptRelease
ADR r10, SubInterrupt_Despatch
10 LDR r0, [r12, #IRQDesp_CallAddr]
TEQ r0, r10
BEQ %FT15
13 MOV r11, r12
LDR r12, [r12, #IRQDesp_Link]
TEQ r12, #0
BEQ %BT11
B %BT10
15 SUB r0, r12, #PodDesp_Link
17 LDR r14, [r0, #PodDesp_Link]
TEQ r14, #0
BEQ %BT13
LDR r10, [r14, #PodDesp_Address]
CMP r10, r3
LDREQ r10, [r14, #PodDesp_Mask]
CMPEQ r10, r4
LDREQ r10, [r14, #PodDesp_CallAddr]
CMPEQ r10, r1
LDREQ r10, [r14, #PodDesp_R12Val]
CMPEQ r10, r2
MOVNE r0, r14
BNE %BT17
LDR r10, [r14, #PodDesp_Link]
STR r10, [r0, #PodDesp_Link]!
LDR r0, [r12, #IRQDesp_R12Val]
MOV r2, r14
ADR r14, Default_SubInterruptHandler_Node
TEQ r0, r14 ; last sub-interrupt gone?
BNE %BT04
BL FreeSysHeapNode ; free sub-interrupt
BVS DV_Exit
B %BT02 ; then go back to delink top level
]
[ CDVPoduleIRQs
[ NumberOfPodules > 0
PoduleChainRelease
CMP r0, #Podule_DevNo
LDREQ r0, =ZeroPage+PIRQ_Chain-PodDesp_Link
......@@ -918,18 +774,11 @@ FalseVsyncIRQ ROUT
VsyncIRQ ROUT
[ HAL
; Don't push r14 - we're using new interface, and claim the vector
Push "r9,r12"
AddressHAL
CallHAL HAL_IRQClear
CallHAL HAL_IRQClear ; Clear the vsync interrupt
Pull "r9,r12"
|
Push r14
MOV R0, #vsync_bit
STRB R0, [R3, #IOCIRQCLRA] ; Clear the vsync interrupt
]
VsyncIRQ_ExtEntry
LDRB R0, CFStime ; decrement 'CFS' timer !
......
s/PMF/i2cutils
View file @ e5188347
......@@ -2058,7 +2058,7 @@ NVMemory_ResetValue ROUT
TEQ R1, #PrintSoundCMOS
BEQ %FT30 ; code driven
[ STB :LAND: IOMD_C_PALNTSCType <> 0
[ STB :LAND: :DEF: IOMD_C_PALNTSCType
TEQ R1, #TerritoryCMOS
BEQ %FT40 ; code driven
TEQ R1, #CountryCMOS
......@@ -2082,7 +2082,7 @@ NVMemory_ResetValue ROUT
B %BT10
20
[ HAL
[ M_32 ; M_32 used for IOMD based machines, select quadrature or PS2 as appropriate
[ "$Machine"="IOMD"
Push "R0-R1,R9,R12"
AddressHAL
MOV R0, #0
......@@ -2092,7 +2092,7 @@ NVMemory_ResetValue ROUT
LDRB R0, [R0, #IOMD_ID0]
ORR R0, R0, R1, LSL #8
LDR R1, =IOMD_Original
TEQ R0, R1
TEQ R0, R1 ; Select quadrature or PS2 as appropriate
MOVEQ R2, #PointerDevice_QuadMouse ; Risc PC
MOVNE R2, #PointerDevice_PS2Mouse ; A7000 et al
Pull "R0-R1,R9,R12"
......@@ -2148,7 +2148,7 @@ NVMemory_ResetValue ROUT
Pull "R0-R1"
]
EXIT
[ STB :LAND: IOMD_C_PALNTSCType <> 0
[ STB :LAND: :DEF: IOMD_C_PALNTSCType
40
MOV R2, #0 ; PAL = territory UK
MOV R3, #49 ; NTSC = territory USA
......@@ -2201,10 +2201,10 @@ DefaultCMOSTable
DefaultCMOSTable
; Normal table
DCB KeyDelCMOS, 32
[ M_CortexA8 :LOR: M_CortexA9
[ "$Machine"="CortexA8" :LOR: "$Machine"="CortexA9"
DCB FileLangCMOS, fsnumber_SCSIFS ; SCSIFS for OMAP3, etc.
|
[ M_ARM11ZF
[ "$Machine"="ARM11ZF"
DCB FileLangCMOS, fsnumber_SDFS ; SDFS for Pi, etc.
|
DCB FileLangCMOS, fsnumber_adfs ; ADFS
......@@ -2238,7 +2238,7 @@ DefaultCMOSTable
DCB SoundCMOS, &F0 ; speaker on, volume 7, channel 1
DCB LanguageCMOS, ConfiguredLang
DCB LanguageCMOS, 11 ; typically module number of 'Desktop'
DCB YearCMOS+0, 00
DCB YearCMOS+1, 20
DCB NetFilerCMOS, (0:SHL:0) :OR: (1:SHL:1) :OR: (0:SHL:2)
......@@ -2299,7 +2299,7 @@ DefaultCMOSTable
DCB SparrowMarker, FreewayNoAutoAddress ; Stop Freeway assigning addresses to interfaces
DCB NetworkFlags, LanManFStransport ; LMTransport is NetBIOS over IP
DCB WimpDragMoveLimitCMOS, (1:SHL:7) ; WimpIconiseButton
[ M_CortexA8 :LOR: M_CortexA9 :LOR: M_ARM11ZF
[ "$Machine"="CortexA8" :LOR: "$Machine"="CortexA9" :LOR: "$Machine"="ARM11ZF"
DCB CDROMFSCMOS, &C0 ; drives = 0, buffer size = 256K
|
DCB CDROMFSCMOS, &C1 ; drives = 1, buffer size = 256K
......
s/PMF/osinit
View file @ e5188347
......@@ -942,8 +942,7 @@ UMC_data * &0109 * 4 ; Configuration Access Port (data)
;
; Configure SMC 37C665/669 or UMC8669 combo chip
; Note that older devices (eg 82C710, 82C711, SMC651) are no longer supported
ASSERT :LNOT: OldComboSupport
;
ConfigureCombo Entry "r0-r2"
WritePSRc SVC_mode + I_bit + F_bit, R0 ; Disable FIQ and IRQ
......
s/SysComms
View file @ e5188347
......@@ -628,11 +628,11 @@ GO_Code ROUT
BL SPACES
CMP R5, #13
TEQNE R5, #";"
MOVLS R7, #UserMemStart
MOVLS R7, #AppSpaceStart
BCC GOEX
BEQ GOEX0
BL ReadHex
MOVVS R7, #UserMemStart
MOVVS R7, #AppSpaceStart
BL SPACES
GOEX0 TEQ R5, #";"
BLEQ SPACES
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment