Neil Turton
authored
ROM speed not taken from the Machine header file. POST can now exist in a softloaded OS, since it searches for a zero word in the ROM instead of using one within the POST when trying to communicate with the POST adapter (the zero word must be in ROM). Fixed to build on non-chrontel STB/NC products. Lots of duplicate code merged in MemSize. MemSize copes better with the softload case, and is less willing to use the region the OS occupies as video memory, or page tables. POST is now ON (memory tests disabled). OS_ReadSysInfo 4 now uses the NVRAM module to access the ethernet address in NVRAM/CMOS, so that the availability/location of the MAC address can be changed. CMOS location 0 is now unprotected on STB/NC products to try to stop people poking the hardware directly. Fixed a CMOS resetting problem on STBs where the value expected in a location was different from the value written on a CMOS reset, so the CMOS would be reset every time... Version 4.69. Tagged as 'Kernel-4_69'