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TestSrc/InitModule

+; > InitModule
+; Source for Pre_InitModule, PostInitModule im_InitModules & im_Pre_InitPodMod functions
+;
+; ***********************************
+; ***    C h a n g e   L i s t    ***
+; ***********************************
+;
+; Date       Who  Version       Description
+; ----       ---  -------       -----------
+; 13-Jun-96  BAR  0.01		Started
+; 27-Jun-96  BAR  0.02		Added code to check the type of reset we
+;				just had. If power-on then we can display
+;				messages, else exit back.
+;
+;
+; Provides functions to display messages for when we initiliseing the
+; modules. Messages are only sent to the display adapator, if the Reset Type
+; is Power On Reset. The code uses the constant ResetType, defined in
+; kernel.hdr.KernelWS. This is the address of a memory location, where the
+; type of reset is stored. ResetType is a sigle bit flag, in bit 0 of the
+; memory location. The constant PowerOnReset is used, which is defined in
+; Kernel.s.newReset. This defines the value that a power-on reset should be.
+; The value of PowerOnReset should always be 1. (This corresponds to the
+; value of the bit 4 of IOMD's IRQA Status register, where the Power-on
+; reset status is initially stored.) The value of ResetType can vary between
+; different versions of the operating system.
+;
+;
+; im_Pre_InitModule  is called before a module is started
+; im_Post_InitModule is called after a module is started, only if there was
+;		     an error
+; im_InitModules     is called at the start of initiliseing the modules.
+; im_Pre_InitPodMod  is called when we start the podule manager.
+;
+; All the functions will push registers r0-r12 to the stack, check the
+; poweron reset status, if power on reset, then send a message to the
+; display adaptor and then pull them off at the end.
+;
+;
+im_Pre_InitModule	ROUT
+	Push	"r0-r12"			; Put r0->r12 on to stack
+; Get the type of reset we had, if power-on - can use display adaptor
+	LDR	r1,=ResetType		; Load r1 with address of ResetType
+	LDR	r0,[r1]				; Get contents of ResetType = what type of reset
+	CMPS	r0,#PowerOnReset		; Compare with PowerOnReset (1)
+;if equel send message
+	LDREQ	r4,[r11,#ROMModule_Name]	; Put ptr to mod name in r4
+	BLEQ	ts_SendText			; Send the txt to disp adaptor
+;restore the reg's.
+	Pull	"r0-r12"			; Get r0->r12 from the stack
+
+	MOV	pc,r14				; Return to caller
+
+im_Post_InitModule	ROUT
+
+1
+	= "Module Bad",0
+
+	Push	"r0-r12"			; Put r0->r12 on to stack
+; Get the type of reset we had, if power-on - can use display adaptor
+	LDR	r1,=ResetType		; Load r1 with address of ResetType
+	LDR	r0,[r1]				; Get contents of ResetType = what type of reset
+	CMPS	r0,#PowerOnReset		; Compare with PowerOnReset (1)
+	BNE	%FT2				; IF not equal jump to 2 AKA don't send msg.
+
+	Push	"r0"				; Put r0 in stack again
+	ADR	r4, %BT1			; r4 = bad module msg
+	BL	ts_SendText			; Send the txt to disp adaptor
+	Pull	"r0"				; Get r0 from the stack
+	ADDVC	r4,r0,#4			; If V Clr add 4 to r0 - point to err txt
+	BLVC	ts_SendText			; Send the txt to disp adaptor
+2
+	Pull	"r0-r12"			; Get r0->r12 from the stack
+
+	MOV	pc,r14				; Return to caller
+
+im_InitModules	ROUT
+
+1
+	= "Init Modules :",0
+
+	Push	"r0-r12"			; Put r0->r12 on to stack
+; Get the type of reset we had, if power-on - can use display adaptor
+	LDR	r1,=ResetType		; Load r1 with address of ResetType
+	LDR	r0,[r1]				; Get contents of ResetType = what type of reset
+	CMPS	r0,#PowerOnReset		; Compare with PowerOnReset (1)
+;if equel send message
+	ADREQ	r4, %BT1			; r4 = init msg
+	BLEQ	ts_SendText			; Send the txt to disp adaptor
+;restore the reg's.
+	Pull	"r0-r12"			; Get r0->r12 from the stack
+
+	MOV	pc,r14				; Return to caller
+
+im_Pre_InitPodMod	ROUT
+
+1
+	= "Podule",0
+
+	Push	"r0-r12"			; Put r0->r12 on to stack
+; Get the type of reset we had, if power-on - can use display adaptor
+	LDR	r1,=ResetType		; Load r1 with address of ResetType
+	LDR	r0,[r1]				; Get contents of ResetType = what type of reset
+	CMPS	r0,#PowerOnReset		; Compare with PowerOnReset (1)
+;if equel send message
+	ADREQ	r4, %BT1			; r4 = init msg
+	BLEQ	ts_SendText			; Send the txt to disp adaptor
+;restore the reg's.
+	Pull	"r0-r12"			; Get r0->r12 from the stack
+
+	MOV	pc,r14				; Return to caller
+
+
+	END

TestSrc/LEDDelay

+; > LEDDelay
+; Source for LEDDelay function
+;
+; ***********************************
+; ***    C h a n g e   L i s t    ***
+; ***********************************
+;
+; Date       Who  Version       Description
+; ----       ---  -------       -----------
+; 30-May-96  BAR  0.01		Started
+;
+; Will provide a 1/4 second delay for flashing the LED's
+
+
+
+ld_quarter_sec		*	(35000*8)	; 1/4 Second delay !
+
+ld_LED_Delay	ROUT
+; Generate the required delay between changing the LED status
+; On entry ....
+;	r4 = required delay time
+; Register usage ....
+; 	r0, general scratch pad
+;
+01	LDR     r0,=ld_quarter_sec		; Load r0 with 1/4 seconds delay
+02	SUBS    r0,r0,#1                	; subtract one
+        BNE     %02	                   	; back we go .... pause for a 1/4 second
+	SUBS	r4,r4,#1			; subtract one
+	BNE	%01				; repeat the pause for the flash duration
+
+	MOV	pc,r14				; Return to caller
+
+        END

TestSrc/ROMCard

+; > TestSrc.ROMCard
+
+	TTL NCOS Support for ROM Cards
+;
+; Tests for presence of a 2,4 or 8MB OS image in 2nd ROM bank and jumps to it.
+;
+; This doesn't really belong in the POST sources, but lives here because it
+; needs to happen soon after boot. This file is included inline by Begin before
+; it starts calculating the ROM checksum
+;
+; Relies on width of the 2nd ROM bank already being set to 32bit.
+; If 16bit extension ROM support is required then s.ARM600 must set ROMCR1 back
+; to 16bit-wide.
+;
+; No registers are preserved and, unlike some other parts of the POST code, it
+; assumes it is running on a fully-functional ARM & IOMD.
+;
+;------------------------------------------------------------------------
+; History
+;
+; Date		Name	Comment
+; ----		----	-------
+; 16-Aug-96	JRH	First release
+; 05-Sep-96	BAR	Add code to switch out the progress colour screens.
+;			See begin (2.17 for details).
+
+
+;	Can't have CanLiveOnROMCard TRUE without ROMCardSupport
+	ASSERT	ROMCardSupport
+
+	GBLL	DebugROMCard
+DebugROMCard	SETL	{FALSE}
+
+ts_RC_MinOSsize	*	(2*1024*1024)
+ts_RC_MaxOSsize	*	(8*1024*1024)
+ts_RC_2ndbank	*	(16*1024*1024)
+ts_RC_idoffset	*	-16			; offset from end of image
+
+
+ROMCardTest	ROUT
+
+; DEBUG: set up VIDC for VGA, assuming 32M clock
+  [ DebugROMCard
+        MOV     r1, #ts_VIDCPhys
+        LDR     r0, =&40ffffff			; White
+        STR     r0, [r1]
+  ]
+
+  [ CanLiveOnROMCard
+	TST	pc, #ts_RC_2ndbank		; running out of 2nd ROM bank?
+	BNE	%FT99				; skip all this if so
+  ]
+
+  [ DebugROMCard
+        LDR     r0, =&4000ffff			; Yellow
+        STR     r0, [r1]
+  ]
+
+	MOV	r12, #ts_RC_MinOSsize		; start with this size image
+	B	%FT00
+
+ts_RC_idword	=	"NCOS"			; id string
+ts_RC_LDRPCInst	&	&E59FF
+
+00
+	ADD	r2, r12, #ts_RC_2ndbank		; end of image
+	LDR	r1, ts_RC_idword		; id word to look for
+	LDR	r0, [r2, #ts_RC_idoffset]
+	CMP	r0, r1
+	BNE	%FT90				; try next size if no match
+
+; Found the id string, now see if it checksums to 0.
+; Following code ripped off from Mem3.
+;
+; r0 IS A POINTER TO THE LOCATIONS IN MEMORY.
+; r1 HAS THE CALCULATED CHECKSUM.
+; r2 HOLDS A COUNTER INDICATION HOW MANY WORDS ARE LEFT TO GET
+; r3 is a temporary variable (no it isn't)
+; r4 TO r11 ARE USED TO LOAD THE CONTENTS OF 8 LOCATIONS FROM THE ROM.
+;
+  [ DebugROMCard
+        MOV     r1,#ts_VIDCPhys
+        LDR     r0, =&407f7fff			; Fetching Pink
+        STR     r0, [r1]
+  ]
+	MOV	r1, #&00			; initialise accumulator
+	MOV	r0, #ts_RC_2ndbank 		; initialise pointer
+	ADD	r2, r0, r12			; initialise endstop, >= 8 words
+	SUB	r2, r2, #(8 * 4)		;  below the real endpoint
+
+RC_loop1
+	LDMIA	r0!, {r4 - r11}			; get 8 words & post-inc
+01
+	ADD	r1, r1,	r4
+	ADD	r1, r1,	r5
+	ADD	r1, r1,	r6
+	ADD	r1, r1,	r7
+	ADD	r1, r1,	r8
+	ADD	r1, r1,	r9
+	ADD	r1, r1,	r10
+	ADD	r1, r1,	r11
+02
+	ASSERT ((%02 - %01) = 32)	; else r2 won't count down correctly
+
+	CMP	r0, r2
+	BNE	RC_loop1		; loop until pointer reaches endstop
+
+	LDMIA	r0, {r4 - r9}		; get last 6 words (miss last 2 in ROM)
+03
+	ADD	r1, r1,	r4
+	ADD	r1, r1,	r5
+	ADD	r1, r1,	r6
+	ADD	r1, r1,	r7
+	ADD	r1, r1,	r8
+	ADDS	r1, r1,	r9			; NOTE: Z set => checksum OK
+04
+	ASSERT	(((%04 - %03) + (2*4)) = 32)
+
+	BNE	%FT90				; Skip if checksum not zero
+
+; We have a valid image. Now work out where to jump to in it.
+; Can't just jump to the start because 1st instruction is an LDR PC.
+; Code ripped off from Tim's Softloader (thanks Tim)
+
+  	[ DontShowProgressColours
+  	; Display "Jumping to 2nd ROM bank" colour
+
+        MOV_fiq r0,r12_fiq              	; restore the faultcode bits
+        ANDS    r0,r0,#(R_EXTERN :OR: R_TESTED)	; If test adapter present,
+			                   	; NE : Adaptor fitted, show progress.
+ 	           				; EQ : No Adaptor fitted, don't show progress
+	BEQ	%FT10				; EQ : Don't show colours
+	]
+        MOV	r1, #ts_VIDCPhys
+        LDR	r0, =C_2NDBANK
+        STR	r0, [r1]
+10
+
+  [ DebugROMCard
+; Delay
+	MOV	r0, #0
+	MOV	r1, #(2*1024*1024)
+15
+	LDMIA	r0!, {r2}
+	CMP	r0, r1
+	BNE	%BT15
+  ]
+	MOV	r0, #ts_RC_2ndbank		; start of 2nd ROM image
+	LDR	r3, [r0]			; load 1st instruction of ROM image
+	AND	r2, r3, #&FF000000
+	TEQ	r2, #&EA000000			; is it a branch
+	BNE	%FT20				; [no, so try something else]
+
+	MOV	r3, r3, LSL #(32-21)		; extract offset within ROM
+	ADD	r0, r0, r3, LSR #(32-21-2)	; convert to byte offset
+	ADD     pc, r0, #8			; allow for pre-fetch
+
+; check for LDR PC, [PC, +/-#x]
+20	MOV     r4, r3, LSR #12
+	LDR     r5, ts_RC_LDRPCInst
+	ORR	r4, r4, #1 << (23-12)
+	TEQ	r4, r5
+30	; endlessloop
+	BNE	%BT30				; not either, so stuck
+
+	EOR	r3, r3, r4, LSL #12		; extract offset, and up/down bit
+	TST	r3, #1 << 23			; NE => bit was 0, so -ve
+	RSBNE	r3, r3, #1 << 23		; get rid of bit 23 and negate
+	ADD	r3, r3, #8			; offset in ROM we're reading
+	LDR	r3, [r0, r3]			; address to jump to
+	ADD	pc, r0, r3			; jump to it
+
+; Try next image size up
+90	MOV	r12, r12, LSL #1		; double the size
+	CMP	r12, #ts_RC_MaxOSsize
+	BLE	%BT00
+
+  [ DebugROMCard
+        MOV	r1, #ts_VIDCPhys
+        LDR	r0, =&407fff7f			; Pale Green
+        STR	r0, [r1]
+; Delay
+	MOV	r0, #0
+	MOV	r1, #(2*1024*1024)
+95
+	LDMIA	r0!, {r2}
+	CMP	r0, r1
+	BNE	%BT95
+
+	B	%FT99				; No image found
+
+	LTORG
+  ]
+
+; Fall through to POST code
+99
+	END

TestSrc/ShowIOMDRs

+; > ShowIOMDRs
+; Source for ShowIOMDRegisters functions
+;
+; ***********************************
+; ***    C h a n g e   L i s t    ***
+; ***********************************
+;
+; Date       Who  Version       Description
+; ----       ---  -------       -----------
+; 24-Jun-96  BAR  0.01          Started.
+; 05-Jul-96  BAR  0.02          Fix all sorts of bugs ... !
+; 08-Jul-96  BAR  0.03          Fixed some more bugs ... hopfully !
+; 25-Jul-96  BAR  0.04          Fixed some more bugs ... hopfuly !
+; 29-Jul-96  BAR  0.05          Changed not to show skipped.
+;                               Basically working now.
+;
+; Will show the contents of selected IOMD registers via the display adaptor.
+;
+; Show contents of IOMD Regs via display adaptor
+; Note : Contents of the registers are not checked, therefore this code will
+;        not thus won't cause a failure. Contents can't be relied upon,
+;        because of changes to H/W OS etc..
+;
+ALIGN
+sir_IgnoreTable &       &88888888       ;+00C,+008,+004,+000
+                &       &88888888       ;+01C,+018,+014,+010
+                &       &88888888       ;+02C,+028,+024,+020
+                &       &88888888       ;+03C,+038,+034,+030
+                &       &88888888       ;+04C,+048,+044,+040
+                &       &88888888       ;+05C,+058,+054,+050
+                &       &88888888       ;+06C,+068,+064,+060
+                &       &00888888       ;+07C,+078,+074,+070
+                &       &88008888       ;+08C,+088,+084,+080
+                &       &88888800       ;+09C,+098,+094,+090
+                &       &88880000       ;+0AC,+0A8,+0A4,+0A0
+                &       &00000000       ;+0BC,+0B8,+0B4,+0B0
+                &       &88888800       ;+0CC,+0C8,+0C4,+0C0
+                &       &00008888       ;+0DC,+0D8,+0D4,+0D0
+                &       &90888888       ;+0EC,+0E8,+0E4,+0E0
+                &       &00909090       ;+0FC,+0F8,+0F4,+0F0
+                &       &00000000       ;+10C,+108,+104,+100
+                &       &00000000       ;+11C,+118,+114,+110
+                &       &00000000       ;+12C,+128,+124,+120
+                &       &00000000       ;+13C,+138,+134,+130
+                &       &00000000       ;+14C,+148,+144,+140
+                &       &00000000       ;+15C,+158,+154,+150
+                &       &00000000       ;+16C,+168,+164,+160
+                &       &00000000       ;+17C,+178,+174,+170
+                &       &A0A0A0A0       ;+18C,+188,+184,+180
+                &       &00008888       ;+19C,+198,+194,+190
+                &       &00000000       ;+1AC,+1A8,+1A4,+1A0
+                &       &00000000       ;+1BC,+1B8,+1B4,+1B0
+                &       &00A0A0A0       ;+1CC,+1C8,+1C4,+1C0
+                &       &A0A0A0A0       ;+1DC,+1D8,+1D4,+1D0
+                &       &00A00088       ;+1EC,+1E8,+1E4,+1E0
+                &       &00888888       ;+1FC,+1F8,+1F4,+1F0
+;
+; The above is the Show Register Ignore table. It defines if a register is ;
+; to be shown and if it is what size the register is. Registers are ;
+; expressed as an offset from the base address of IOMD. The registers are ;
+; word aligned. To reduce size this table uses one byte per register. The
+; table is arranged so that each word repesents 4 registers. The size of the
+; register is either 8, 16 or 32 bits, which can be repesented in hex as
+; &08, &10 and &20. Threrefore the maximum bit in any byte needed for size
+; is bit 5. Therefore bit 8 is used as the flag to indicate if the register
+; is to be used, whilst the remaining 7 bits are used for the size. A size
+; of 0 is not allowed, therfore the following values for each byte can be
+; expected :-
+;   <= &80 Register will be skipped
+;   =  &88 Show the register and its 8 bits wide
+;   =  &90 Show the register and its 16 bits wide
+;   =  &A0 Show the register and its 32 bits wide
+; Any other value is liable to cause havoc !
+
+sir_ShowIOMDRegs        ROUT
+;
+; Read the IOMD Register.
+;
+; Display Adaptor has a 16 char display.
+; 32bit no. is 8 chars long
+; Display Columns &80+  : 0123456789012345
+; Start message         : IOMD Regs:
+; Each location read    : +01FC 12345678
+; Each location skipped : +01FC Skipped
+;
+; Define the messages
+;"0123456789ABCDEF"
+        ALIGN
+1
+        =       "IOMD Regs:",0
+        ALIGN
+2
+        =       "+",&FF,&FF,&FF,&8B,&FF,&FF,&FF,&FF,&FF,0
+;"+123       12345"
+        ALIGN
+3
+        =       "+",&FF,&FF,&FF,&89,"Skipped",0
+;"+123     Skipped"
+        ALIGN
+4
+        =       "+",&FF,&FF,&FF,0
+;"+123"
+        ALIGN
+5
+        =       &88,&FF,&FF,&FF,&FF,&FF,&FF,&FF,&FF,0
+;"        12345678"
+        ALIGN
+;
+; Define some constants
+;
+sir_mask8       *       &FF             ; 8  bit register mask
+sir_mask16      *       &FFFF           ; 16 bit register mask
+sir_mask32      *       &FFFFFFFF       ; 32 bit register mask
+sir_MaxOffset   *       &1FC            ; Maximum register offset.
+;
+; ts_showtext I/f is :-
+; r4 = text string to leave
+; r8 = number to subsitute
+; r0 - r3, r5 - r7 corrupted
+;
+; r9 = table loop counter +1
+; r10 = iomd offset loop counter +4
+; r11 = iomd base
+;       tempory copy of r1, contents of IOMD - 32bit data
+; r12 = table address
+;
+        MOV     r13,r14                 ; Put r14 in r13 for later use.
+        MOV     r0,#0                   ; data read from the Ignore table
+        MOV     r1,#0                   ; data read from iomd
+        MOV     r4,#0                   ; Pointer to string for display adaptor
+        MOV     r8,#0                   ; Number to subsitue in display adaptor
+        MOV     r9,#0                   ; Ignore table counter (+1)
+        MOV     r10,#0                  ; IOMD Offset counter (+4)
+        MOV     r11,#0                  ; IOMD's base address.
+                                        ; Tempory copy of r1.
+        ADR     r12,sir_IgnoreTable     ; Get IOMD Ignore table address.
+;
+sir_loop
+; ok, lets do some work here guys
+        LDRB    r0,[r12,r9]             ; Get data from Ignore Table
+        CMPS    r0,#&80                 ; Check top bit set
+;        BLE     sir_DisplaySkip         ; Jump to display skip msg if skipped
+                                        ; Don't show skipped - makes post too long,
+                                        ; Remove comment to re-instate and comment line below
+        BLE     sir_LoopControl         ; Jump to loop control.
+
+        AND     r0,r0,#&7F              ; Mask off top bit to get reg size
+
+        CMPS    r0,#&08                 ; Is reg size = 8
+        LDREQ   r0,=sir_mask8           ; If yes : mask = &FF
+        BEQ     sir_cont                ; Jump on to continue
+
+        CMPS    r0,#&10                 ; Is reg size = 16
+        LDREQ   r0,=sir_mask16          ; If yes : mask = &FFFF
+        BEQ     sir_cont                ; Jump on to continue
+
+        CMPS    r0,#&20                 ; Is reg size = 32
+        LDREQ   r0,=sir_mask32          ; If yes : mask = &FFFFFFFF
+
+sir_cont
+; Ok, we've got the mask in r0, lets get the data from IOMD
+        LDR     r11,=IOMD_Base          ; Get IOMD's base address.
+                                        ; Need to 'cos r11 is also used as tmp store for r1
+        LDR     r1,[r11,r10]            ; Get data from IOMD (base [r11] + offsert [r10])
+        AND     r1,r1,r0                ; Mask off the reqd. data
+        MOV     r8,r10,LSL #20          ; Put offset that was read into r8 and
+                                        ; shifted left 20 to fill top 3 nibles
+        MOV     r2,#&10                 ; Put CMP data in r2, this will be shift left 12
+        CMPS    r0,r2,LSL #12           ; Is mask < &10000 ? (&10<<12)
+
+        BHI     sir_TwoLine             ; Mask > &10000 : jump to code to show
+                                        ; offset & data on two lines
+; The mask is less then &10000
+        ADD     r8,r8,r1                ; Add to r8 the masked data
+        ADR     r4,%BT2                 ; r4 -> result message #2
+
+        BL      ts_SendText             ; Anyway : Display the message :-
+                                        ; Mask < &10000 : +XXX    XXXXX
+        B       sir_LoopControl         ; Go to loop control
+
+sir_TwoLine
+; Code to disply the offset and data on two lines, because the data is 32
+; bits wide.
+; The mask is greater then &1000
+; r1 has the data read from IOMD in it.
+        ADR     r4,%BT4                 ; r4 -> result message #4
+        MOV     r11,r1                  ; Need to make a tempory copy of R1
+        BL      ts_SendText             ; Anyway : Display the message :-
+                                        ; Mask > &10000 : +XXX
+        MOV     r8,r11                  ; r8 = the masked data
+                                        ; r11 is the tempory copy of r1
+        ADR     r4,%BT5                 ; r4 -> result message #5
+        BL      ts_MoreText             ; Add the data to the line.
+        B       sir_LoopControl         ; Go to loop control
+
+sir_DisplaySkip
+; Ok, we don't want to display this register
+        MOV     r8,r10,LSL #20          ; Mask < &10000 : r8 = offset that was read
+                                        ; shifted left 20 to fill top 3 nibles
+                                        ; r8 = offset that was skipped
+        ADR     r4,%BT3                 ; R4 -> skipping message
+        BL      ts_SendText             ; Display the message
+
+sir_LoopControl
+; ok lets see if we need to do some more
+        ADD     r9,r9,#1                ; Increment table counter
+        ADD     r10,r10,#4              ; Increment IOMD offset counter
+        CMP     r10,#sir_MaxOffset      ; Have we reached the end ?
+        BLE     sir_loop                ; If <= end then loop back
+
+; Nop, that's it all done !
+        MOV     pc,r13                  ; Return to caller, r13 help retn addr.
+
+        END

TestSrc/ToggleLED

+; > ToggleLED
+; Source for ToggleLED function
+;
+; ***********************************
+; ***    C h a n g e   L i s t    ***
+; ***********************************
+;
+; Date       Who  Version       Description
+; ----       ---  -------       -----------
+; 29-May-96  BAR  0.01		Started
+;
+; This file will provide support to flash the standby/on LED's.
+;
+
+IOMD_IOLINES		*	(IOMD_Base+&0C)
+IOMD_IOLINES_INPUTS	*	&7B
+IOMD_STANDBY_LED_BIT	*	1<<7
+
+tl_Toggle_LEDs	ROUT
+; Toggle the standby/on LEDs
+; On entry ....
+;	Nothing.
+; Register usage ....
+; 	r0, general scratch pad
+; 	r1, addr of IOMD_IOLINES
+;
+	LDR	r1, =IOMD_IOLINES       	; r1 = addr of IOMD_IOLINES
+	LDRB	r0,[r1]				; load r0 with the byte pointed to by r1
+	EOR	r0,r0,#IOMD_STANDBY_LED_BIT     ; Toggle the LED bit; ExOR
+	ORR	r0,r0,#IOMD_IOLINES_INPUTS	; OR with the default I/O settings
+	STRB	r0,[r1]				; store a byte of r0 in to loc pointed to by r1
+
+	MOV	pc, r14				; Return to caller
+
+        END