GitLab

Detail:
  * Compute module support consists of eMMC support in the SDHCI driver. The
    eMMC chip on the Compute module only works reliably if under-clocked to
    25 MHz.
  * Pi 1 vs Pi 2 differences are selected at runtime by checking the CPU ID,
    so a single ROM image will work with both boards.
  * Added ARMv7 cache maintenance routine for use on Pi 2.
  * The physical address of the peripherals has moved in Pi 2 to make space
    for the 1 GB of RAM.
  * The ARM physical address space is mapped differently onto the GPU
    address space in Pi 2 because the ARM now uses the L2 cache that comes
    with the Cortex-A7 instead of the GPU's L2 cache.
  * Still waiting for confirmation on the board revision ID that will be
    used for Pi 2, so may require further tweaks for production releases.


Version 0.40. Tagged as 'BCM2835-0_40'

Version 0.39. Tagged as 'BCM2835-0_39'

As the flag bit in HAL_USBControllerInfo isn't set, no need to provide them.
Use symbols from Hdr:HALEntries when building the USB info.
Built, but not tested.


Version 0.38. Tagged as 'BCM2835-0_38'

There doesn't seem to be a pattern emerging for the allocation of board types, so it's likely that this table will need revisiting again in future as moving the catch all "-1" entry along was identifying a Compute module as a B+.
Submission from TankStage.

Version 0.37. Tagged as 'BCM2835-0_37'

Got the IIC transfer data offset wrong, harmless in this HAL since the stack already had to have space for 2 complete transfers.
Not tested.

Version 0.36. Tagged as 'BCM2835-0_36'

Detail:
  The activity GPIO pin has been reassigned and its sense is inverted,
  compared to earlier boards. More importantly, the SD card detect pin has
  been removed entirely, so we need to signal to the SD stack to use its
  new timeout-based state machine (rather than polling for card presence).
Admin:
  Already in use in RC12a.

Version 0.35. Tagged as 'BCM2835-0_35'

Detail:
  hdr/BCM2835, hdr/USB, s/USB - Update HAL_USBControllerInfo to return the MPHI address & IRQ number
  s/Interrupts - Add some missing memory barriers. Change FIQ enable/disable calls to not alter IRQ masking of the interrupt - simplifies the code and avoids any ordering issues with code that switches interrupts between IRQ & FIQ
  s/Timers - Add missing memory barrier
Admin:
  Tested on Raspberry Pi
  Requires Kernel-5_35-4_79_2_227 to build


Version 0.34. Tagged as 'BCM2835-0_34'

Detail:
  Given the complexity of the USB system on the BCM2835, it seems unlikely
  that the HAL keyboard scan will ever be implemented. Not only does this
  mean it doesn't honour any of the CMOS reset or monitor configuration keys,
  but it means the kernel will always attempt to boot the configured
  filing system and drive, irrespective of the *Configure [No]Boot setting,
  after printing "No keyboard present - autobooting". By changing the HAL
  to report a keyboard present but with no keys held down, we at least get
  the [No]Boot option honoured again (even if the Shift key can't be used
  to invert its sense), and have the message suppressed.
Admin:
  Tested on a Raspberry Pi.

Version 0.33. Tagged as 'BCM2835-0_33'

Mark HAL_IICDevice as a null entry, since bit 4 of the flags says we don't support that mode of operation anyway.

Version 0.32. Tagged as 'BCM2835-0_32'

Detail:
  CJE's RTC module uses a DS1307-compatible RTC chip similar to the one used in the Iyonix. Previously the kernel handled talking to it, but now that low-level RTC handling has been moved out of the kernel we need an RTC HAL device in the BCM2835 HAL instead.
  s/RTC - A copy of s.RTC from the Tungsten HAL, relicensed as BSD with permission from Rob Sprowson
  Makefile, hdr/StaticWS, s/Top - Additional changes needed to hook the code into the HAL
Admin:
  Tested on Raspberry Pi, but without an RTC module fitted
  However the similarity of the clock chip to the one in the Iyonix should mean there's little chance of this code failing to work correctly when an RTC is fitted


Version 0.31. Tagged as 'BCM2835-0_31'

Detail:
  s/Top, s/Video - Removed obsolete HAL video API implementation. A stub implementation is no longer required for systems that have a GraphicsV driver in a module, and can even cause problems if the OS decides to use the HAL implementation instead of the module one.
Admin:
  Tested in BCM2835 ROM
  Requires Kernel-5_35-4_79_2_203


Version 0.30. Tagged as 'BCM2835-0_30'

Detail:
  hdr/BCM2835 - Add definition for highest IRQ number
  s/Boot, s/Interrupts - Added HAL_IRQMax implementation, to ensure correct functionality with latest Kernel
Admin:
  Tested on 256MB Pi model B
  Requires Kernel-5_35-4_79_2_182


Version 0.29. Tagged as 'BCM2835-0_29'

Flag not previously inspected by DMA-0_19, but is in DMA-0_20. API cleanup for API version 1.0 since this is the only list type NoInitIRQ HAL in existance.

Version 0.28. Tagged as 'BCM2835-0_28'

Also, swap magic numbers for defines.

Version 0.27. Tagged as 'BCM2835-0_27'

Detail:
  s/Top, s/Video - Renamed HAL_Video entries to match naming convention used by latest kernel
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.26. Tagged as 'BCM2835-0_26'

Detail:
  hdr/StaticWS, s/Top, s/Video - Added a simple VDU HAL device that exposes a DMA channel to BCMVideo for use with GraphicsV_Render
  hdr/BCM2835 - Don't allow DMA channel 12 to be used; latest firmware seems to have a bug which claims its free when in reality it isn't.
  s/Messaging, s/DMA - Adjust DMA init to allow the video device to claim a DMA channel before the DMA devices are initialised
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.25. Tagged as 'BCM2835-0_25'

Detail:
  hdr/BCM2835, hdr/StaticWS, s/IIC - On rev 2 boards the usage of BSC0 and BSC1 have been swapped, such that BSC1 is now sent to the expansion header instead of BSC0.
  To allow RISC OS to continue to work with clock chips and other hardware fitted to the header, expose BSC1 to RISC OS if on a rev 2 board, or BSC0 if on a rev 1.
Admin:
  Changes received from Dave Higton
  Tested by Dave on rev 1 & rev 2 boards, with IIC devices
  Tested by me on rev 1 board (with no IIC devices fitted)


Version 0.24. Tagged as 'BCM2835-0_24'

Detail:
  s/Top - Added HAL_PhysInfo implementation. Tweaked HAL_Reset to reduce chances of failure.
  s/Stubs - Removed obsolete, unused UART stubs. Use KbdFlag_Done instead of magic number.
Admin:
  Tested on Raspberry Pi


Version 0.23. Tagged as 'BCM2835-0_23'

Read board model, revision, and available DMA channels from messaging channel. Report board revision via GPIO HAL device. Recover lost ROM relocation code.

Detail:
  hdr/StaticWS, s/Messaging, s/Top - Now reads board model, revision and available DMA channels from messaging channel
  hdr/StaticWS, s/GPIO - Updated GPIO HAL device to report board revision instead of a generic response of 'unknown'
  s/Top - Recovered ROM relocation code that got lost during a merge. End of ROM image no longer being corrupted, and RISC OS now sees correct amount of RAM.
  s/DMA - Ditch old code to read available DMA channels and use value read by HAL_QueryPlatform instead.
Admin:
  Tested on Raspberry Pi (B rev 1) with various start.elf sizes & versions
  DMA channel reporting only available with latest firmware (i.e. 8th Sep)
  Board revision number read by messaging channel seems to match that returned by /proc/cpuinfo on Linux


Version 0.22. Tagged as 'BCM2835-0_22'

Detail:
  Makefile, s/Display - Deleted on-screen debug code
  hdr/BCM2835, hdr/StaticWS, s/IIC, s/Messaging, s/Stubs, s/Top, s/UART - Strip out calls to on-screen debug code, and a few bits of video code
  s/Video - Video code removed and replaced with stub functions similar to other HALs. Only remaining useful code is HAL_Video_StartupMode, which in time should probably be moved to BCMVideo as well.
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.21. Tagged as 'BCM2835-0_21'

Detail:
  Implementation of the high-level HAL IIC interface provided by Dave Higton.
Admin:
  Checked it builds and runs at ROOL.

Version 0.20. Tagged as 'BCM2835-0_20'

	HAL_MachineID and fetches the MAC address correctly

Admin:


Version 0.19. Tagged as 'BCM2835-0_19'

Detail:
  s/Top - Fix HAL_PlatformInfo to not claim that we support soft-off
Admin:
  Tested in Pi ROM
  Fixes machine restarting after shutdown


Version 0.18. Tagged as 'BCM2835-0_18'

Add GPIO & VCHIQ HAL devices. Fix FlushDataCache macro to perform a clean & invalidate instead of just an invalidate.

Detail:
  s/GPIO - Basic implementation of the GPIO HAL device to allow the GPIO module to detect the board type
  s/VCHIQ, hdr/StaticWS - New VCHIQ HAL device which exposes the functionality required by the work-in-progress VCHIQ driver.
  Makefile, s/Top - Hook up the new files/devices
  hdr/BCM2835 - Make the FlushDataCache macro perform a clean & invalidate, to match the behaviour of FlushDataCacheRange
Admin:
  Tested on Raspberry Pi with high processor vectors


Version 0.17. Tagged as 'BCM2835-0_17'

	Now expects a start.elf released 24/7/2012 or later for correct
	display initialisation
Admin:


Version 0.16. Tagged as 'BCM2835-0_16'

        HAL_MachineID functioning correctly
Admin:


Version 0.15. Tagged as 'BCM2835-0_15'

Detail:
	HAL_Reset now causes a complete reboot of the machiine. It isnt yet properly called from
	the kernel.. I've not investigated why yet. Behaviour tested using OS_Hardware call

	HAL_MachineID, with the github start.elf from 18 July 2012 will provide a valid MAC address ..
	i.e. that specific to this machine. The a1 value in HAL_ExtendedID needs to be set 0 for this to be reported
	by OS_ReadSysInfo .. unfortunately, again at this stage, it stalls the boot when set 0, so just for now
	the committed value for a1 in HAL_ExtendedID is not 0 .

	centralised messaging routine added. This is used a fair bit in acquiring the operating environment
	Not yet used in the DMA stuff. probably ought to be. At present the messaging channel this mainly
	handles is not complete, so information from this code is still WIP

Admin:
  (highlight level of testing that has taken place)
  (bugfix number if appropriate)


Version 0.14. Tagged as 'BCM2835-0_14'

Detail:
  s/Top - Improved RAM detection/setup to not assume that the OS image is at &0000 (current start.elf seems to place it at &8000). New code correctly supports compressed ROMs, and has some basic code implemented to read the RAM setup from the mailbox property interface (currently disabled, pending official firmware rollout + final testing)
  s/DMA - Updated mailbox property interface code to adhere to the current spec. Still needs testing with release firmware (the start.elf I'm using seems to report no DMA channels as being available)
Admin:
  Tested with a release start.elf (July 9th, or thereabouts) as well as a more recent test version containing initial mailbox property interface implementation
  Fixes issue with last 32K of ROM being wiped on startup


Version 0.13. Tagged as 'BCM2835-0_13'

Detail:
  * Moved the NVMemory entries out of s.Stubs into s.CMOS.
  * Removed default list of CMOS contents and replaced with a block of zeros.
    It was never in physical address order and wasn't being used anyway.
    Default CMOS belongs in the kernel in any case.
  * Reports NVMemory type 3 (HAL calls) rather than 0 (no CMOS).
  * No longer reports a Delete power-on (CMOS reset) on every boot.
Admin:
  Tested on Raspberry Pi

Version 0.12. Tagged as 'BCM2835-0_12'

Detail:
  s/DMA, hdr/DMA, Makefile - DMA driver, as an implementation of the DMA controller and list type DMA channel HAL devices
  hdr/StaticWS - Added DMA workspace definition
  hdr/BCM2835 - Removed DMA control block definition (now in hdr/DMA). Add definitions for the mailbox property interface, which should be supported by the GPU firmware sometime soon.
  s/Top - Export a couple of the debug functions. Store logical & physical address of NCNB workspace instead of hackily getting phys addr of the (cacheable) HAL workspace. Call DMA_InitDevices in HAL_InitDevices.
Admin:
  Tested in BCM2835 ROM
  DMA driver hasn't received large amounts of testing, lacks support for finite-length circular transfers, and currently only has one DMA channel enabled
  More DMA channels should be available once the mailbox property interface is functional and we know which channels the GPU does and doesn't use.


Version 0.11. Tagged as 'BCM2835-0_11'

Detail:
  * Engage the GPIO controller's pull-up resistors on SDCLK, CMD and DAT0-DAT3.
    In tests, this seems to address the worst of the unreliability we have
    seen previously.
  * Remove the entry to change the bus between push-pull and open-drain modes.
    The BCM2835 simply doesn't seem to be able to do this. Fortunately, all
    the cards I have tested seem to be OK with the GPIO controller's pull-up
    on the CMD line (however strong that is - it's undocumented) engaged at
    all times.
  * Time a dummy command in order to calculate the speed of the input clock
    to the SD controller block (there doesn't appear to be any way to read
    its speed directly!) This is necessary because recent versions of the
    firmware have not only changed the default clock speed, but even made it
    a user-configurable option in config.txt. It's very important that we
    know how fast it is - if we set the dividers so SDCLK is too slow, then
    the workaround for the register write bug won't work, too fast and we
    overclock the cards, potentially damaging them.
  * Re-enable high speed mode. As long as we don't use the High Speed Enable
    bit in Host Control 1 (see change in SDIODriver 0.03) this seems to work
    for me.
Admin:
  Tested against my collection of test cards on a Raspberry Pi with the
  firmware from the 2012-06-22 commit on github, and with
  init_emmc_clock=100000000 in config.txt (though other values, or the
  absence of that line, or the entire file, should also work). The only
  issues I had appeared to be due to mechanical problems with the SD socket,
  and went away after the card was reseated one or more times.

Version 0.10. Tagged as 'BCM2835-0_10'

Detail:
  * Bugfix to HAL_FIQDisableAll - it wasn't clearing the FIQ register (would
    only have caused trouble in practice if the same device was subsequently
    enabled as an IRQ).
  * Added a load of memory barriers to s.Interrupts and s.Timers to conform
    to the requirement stated in 1.3 of the datasheet.
  * Added a HAL device for the Arasan SDHCI controller. Note that this does
    not currently work reliably, and results vary from card to card. High
    speed support is currently disabled until we are able to verify that it
    works reliably.
  * Added a sprinkling of "GET Hdr:ListOpts" because the space reserved for
    the SDHCI HAL device in hdr.StaticWS is determined by including
    Hdr:HALDevice and Hdr:SDHCIDevice, which need it.
  * When support for saving "CMOS" to the SD card is added, the ROM image
    file (kernel.img) is the only one we can count on the bootloader
    installing in memory, so I think we're going to have to work using the
    table in s.CMOS. Broadcom seems to like messing around with the space
    just after the processor vector table, so rather than adding a pointer
    to the table there, I've opted to mark it using a magic word.
Admin:
  Tested on a Raspberry Pi - as noted above, there are reliability issues.

Version 0.09. Tagged as 'BCM2835-0_09'

Detail:
  s/USB - For valid controllers, HAL_USBControllerInfo now always returns the correct USB struct size and fills in the controller type. The rest of the buffer is filled in only if the supplied size is large enough. This allows for proper probing of controllers without knowing the required buffer sizes beforehand.
Admin:
  Tested in BCM2835 ROM


Version 0.08. Tagged as 'BCM2835-0_08'

Detail:
  hdr/USB - New header with definition of usbinfo struct that's used by HAL_USBControllerInfo
  hdr/BCM2835 - Add note clarifying how mailboxes are used
  s/Top - Enable power to USB on startup
  s/USB - Implement HAL_USBControllerInfo to expose Synopsys USB controller details to RISC OS
Admin:
  Tested in BCM2835 ROM with Apr 19th start.elf


Version 0.07. Tagged as 'BCM2835-0_07'

Detail:
  Substituted remaining hard spaces with normal ones and expanded tabs.
  This now matches the de facto standard for other components, and also looks
  better in the CVS web viewer.
Admin:
  No code changes

Version 0.06. Tagged as 'BCM2835-0_06'

Detail:
   s.Top
Admin:
  tested locally JB
  (highlight level of testing that has taken place)
  (bugfix number if appropriate)


Version 0.05. Tagged as 'BCM2835-0_05'

Detail:
 * Moved interrupt and timer code out of s.Stubs - they're not stubs any more.
 * Rewrote timer and counter code to use GPU system timer 1 for our Timer0
   rather than the ARM timer. This is recommended in the Broadcom datasheet
   because it's driven from the APB clock and so its speed will vary in
   reduced or low power mode.
 * HAL_CounterDelay now, well, does a delay!
 * Added a Timer1, driven from GPU system timer 3 - common code with Timer0.
 * Reshuffled device numbers so the GPU interrupts are at the bottom. This
   works better for FIQs and makes Timer0 the lowest priority interrupt.
 * Higher device numbers are now consistently treated as higher priority.
 * Stopped using bits 8-31 of the basic interrupt registers. These can't be
   masked, so they cause the kernel to lock up if generated, which happens
   if the GPU interrupt which they alias is generated (which appears to
   include the timers even though this is not documented).
 * Added definitions for all the interrupts, including those redacted from the
   datasheet - we need them at least for timers, USB and SD.
 * Stopped HAL_IRQClear from doing anything - this interrupt controller
   doesn't do latching. To acknowledge timer interrupts, you should use
   HAL_TimerIRQClear (and HAL_IRQClear too for compatibility with other ports).
 * Implemented HAL_IRQStatus and all the FIQ control routines.
 * Offsets to interrupt controller registers now use symbolic names.
 * Replaced some hard spaces in sources with normal ones.
Admin:
  Tested on a beta Raspberry Pi. Confirmed that interrupt handlers for both
  ARM and GPU sources can both be operational simultaneuosly. However, the FIQ
  code has not been tested. Timer0 is verified as running at the correct
  speed and reporting a count *down* in the correct range (not a count up as
  some previous versions did). HAL_CounterDelay appears correct also.

Version 0.04. Tagged as 'BCM2835-0_04'

Detail:
   Recent changes in the broadcom startup code now accomodated. frame buffer
   will now determine whether it is L2 cached or not, and be set up accordingly.
   ATAGs not currently read, so ram size defaulted.
  ** note that there will be further updates to this over the following days
  ** trackikng startup code changes.
   added HAL_TimerIRQClear entry
Admin:
  (highlight level of testing that has taken place)
  (bugfix number if appropriate)


Version 0.03. Tagged as 'BCM2835-0_03'

  Will now compile against initial developemnt start.elf, and against the
  start.elf in general release at this date. (compile switch UseALBlob in
  hdr.BCM2835). Extended header defs, Updated IRQ stuff, HAL_FramebufferAddress
  Reworked Timers, + a number of other bits. Still work in progress.
Detail:
  (list files and functions that have changed)
Admin:
  Compiled and working - as far as it goes -. Will enable use with the current
  start.elf, and is (subject to any minor changes introduced) ready for use with the
  version due for release shortly which will provide the correct transparency operation,
  and a better aligned frame buffer

Version 0.02. Tagged as 'BCM2835-0_02'