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Add aligned RMA claim subreason
Robert Sprowson authored 
OS_Module
=> R0=24
   R3=size in bytes
   R4=alignment in bytes (must be a power of 2)
<= R2=base of request
   or error
Tested with a handful of valid and invalid alignments, and with one grossly larger than the free RMA to trigger an RMA extend to occur.

Version 6.35. Tagged as 'Kernel-6_35'
fd81a66c
Name Last commit Last update
..
ExportVals 32-bit Kernel.
ARMops Support for ARMv8
Copro15ops Add new ARMops. Add macros which map the ARMv7/v8 cache/TLB maintenance mnemonics (as featured in recent ARM ARMs) to MCR ops.
DBellDevice Initial SMP changes
EnvNumbers Import from cleaned 360 CD
HALDevice Add GENET to the list of HAL devices
HALEntries Assign a USB flag
KernelWS Be more forgiving of GraphicsV init failures
KeyWS Delete STB code
ModHand Add aligned RMA claim subreason
OSEntries Support permanent mapping of IO above 4GB using supersections
OSMem Record various numbers used in other strands of RISC OS and compatible systems
OSMisc Expose CLREX via OS_PlatformFeatures
OSRSI6 Add initial support for "physical memory pools"
Options Allow SMP build switch to be overridden by components file
PL310 Add ARMops for PL310 L2 cache controller
PublicWS Fix HiProcVecs build. Remove old-style PublicWS definitions.
RISCOS Increase number of vectors supported by the kernel to 96.
VIDCList Move former ControlList_Interlaced item into SyncPol flags
Variables Import from cleaned 360 CD
VduExt Update mode variable definitions
VideoDevice Update VDU HAL device for new OMAPVideo driver, fix MVA-based cache/TLB maintenance ops aborting on ARMv7, add warning to VDU driver about inconsistent state variables during screen mode changes