Jeffrey Lee
authored
Detail: s/ARMops - Fix pre-rev T StrongARMs using the wrong XCBTable, causing invalid page flags to be used for the write-through cache policy Docs/HAL/Serial - Update HAL UART API docs. Mostly filling in some blanks, but also correcting a couple of things, and documenting new Features bit 4, LineStatus bit 8, and the effect on InterruptID. Admin: Tested on pre-rev T StrongARM RiscPC Version 5.61. Tagged as 'Kernel-5_61'