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ExportVals 32-bit Kernel.
ARMops Support for ARMv8
Copro15ops Add new ARMops. Add macros which map the ARMv7/v8 cache/TLB maintenance mnemonics (as featured in recent ARM ARMs) to MCR ops.
DBellDevice Initial SMP changes
EnvNumbers Import from cleaned 360 CD
HALDevice Add GENET to the list of HAL devices
HALEntries Assign a USB flag
KernelWS Add MaxCamEntry32 & CPUFlag_HighRAM
KeyWS Add scroll mouse support
ModHand Add aligned RMA claim subreason
OSEntries Initial large phys addr support for RISCOS_AddRAM
OSMem Record various numbers used in other strands of RISC OS and compatible systems
OSMisc Add MaxCamEntry32 & CPUFlag_HighRAM
OSRSI6 Support RAM banks with high physical addresses
Options Initial long descriptor support
PL310 Add ARMops for PL310 L2 cache controller
PublicWS Fix HiProcVecs build. Remove old-style PublicWS definitions.
RISCOS Resync with allocations database
VIDCList Move former ControlList_Interlaced item into SyncPol flags
Variables Import from cleaned 360 CD
VduExt Update mode variable definitions
VideoDevice Update VDU HAL device for new OMAPVideo driver, fix MVA-based cache/TLB maintenance ops aborting on ARMv7, add warning to VDU driver about inconsistent state variables during screen mode changes