Jeffrey Lee
authored
Detail: - s/HAL - Fix ADD v. SUB muddle that could prevent addresses from being rounded down correctly. Fix incorrect logical address being returned to caller on pre-ARMv6 machines due to PageTableSync corrupting a1. - s/NewReset - Initialising the CMOS RAM cache while in the middle of setting up the processor vectors feels a bit silly. Move the code to just afterwards so that it feels a bit safer, and so that early crashes are easier to debug (processor vectors in stable state) Admin: Tested on Iyonix. Fixes ROM softload failure reported on forums: https://www.riscosopen.org/forum/forums/11/topics/14749 Version 6.23. Tagged as 'Kernel-6_23'