ARMops

; Copyright 2000 Pace Micro Technology plc
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;

ARMv3    *       0
ARMv4    *       1
ARMv4T   *       2
ARMv5    *       3
ARMv5T   *       4
ARMv5TE  *       5
ARMv5TEJ *       6
ARMv6    *       7
ARMvF		*	&F ; 'Fancy' ARM that describes its features in the feature registers.
; Generally this implies ARMv7+, but there are also a few ARMv6 CPUs with this value
; (e.g. ARM1176JZF-S)

                ^       0
ARM600          #       1
ARM610          #       1
ARM700          #       1
ARM710          #       1
ARM710a         #       1
SA110_preRevT   #       1
SA110           #       1
ARM7500         #       1
ARM7500FE       #       1
SA1100          #       1
SA1110          #       1
ARM720T         #       1
ARM920T         #       1
ARM922T         #       1
X80200          #       1
X80321          #       1
ARM1176JZF_S    #       1
Cortex_A5       #       1
Cortex_A7       #       1
Cortex_A8       #       1
Cortex_A9       #       1
Cortex_A12      #       1
Cortex_A15      #       1
Cortex_A17      #       1
Cortex_A53      #       1
Cortex_A57      #       1
Cortex_A72      #       1
ARMunk          *       255

; The macro to do an ARM operation. All ARM operations are expected
; to corrupt a1 only
; This macro corrupts ip unless $zeropage reg is supplied

        MACRO
        ARMop   $op, $cond, $tailcall, $zeropage
 [ "$zeropage" = ""
        LDR$cond ip, =ZeroPage
 ]
 [ "$tailcall" = ""
        MOV$cond lr, pc
 ]
 [ "$zeropage" = ""
        LDR$cond pc, [ip, #Proc_$op]
 |
        LDR$cond pc, [$zeropage, #Proc_$op]
 ]
        MEND

        MACRO
        ChangedProcVecs $tmp
 [ XScaleJTAGDebug
        LDR     $tmp, =ZeroPage
        LDR     $tmp, [$tmp, #ProcessorFlags]
        TST     $tmp, #CPUFlag_XScaleJTAGconnected
        BEQ     %FT01
        BKPT    &2000
01
 ]
        MEND

; Call pagetable operation routine
        GBLS    pt
        MACRO
        PTOp$cc $op
 [ "$pt" <> ""                          ; Scoped to just one type?
        BL$cc   $op._$pt
 ELIF LongDesc :LAND: ShortDesc
   [ "$cc"<>"" :LAND: "$cc"<>"AL"
        LCLS    rcc
rcc     SETS    :REVERSE_CC:"$cc"
        B$rcc   %FT90
   ]
        MRC     p15, 0, lr, c2, c0, 2   ; Read TTBCR (yuck)
        TST     lr, #&80000000          ; Long descriptors enabled?
        ADR     lr, %FT90
        BNE     $op._LongDesc
        B       $op._ShortDesc
90
 ELIF LongDesc
        BL$cc   $op._LongDesc
 |
        BL$cc   $op._ShortDesc
 ]
        MEND

 [ LongDesc :LAND: ShortDesc
        ; NE if LongDesc, EQ if ShortDesc
        MACRO
        PTWhich $temp
        MRC     p15, 0, $temp, c2, c0, 2
        TST     $temp, #&80000000
        MEND
 ]

        END