Tweak definition of `${MAKE}` when cross-compiling

When executing the makefile from within the `objs` directory, this now
includes an implicit `-C..` option. This makes it simpler to write agnostic
makefiles. For example,

	${MAKE} -f other${EXT}mk other_target

rather than

ifeq (,${MAKE_VERSION})
	${MAKE} -f other/mk other_target
else
	${MAKE} -f ../other.mk other_target
endif

GNUmakefiles/StdTools

@@ -72,7 +72,11 @@ HDR2H           = perl ${TOOLSDIR}/Build/Hdr2H,102
 INSERTVERSION   = awk -f ${TOOLSDIR}/Build/AwkVers
 INSTRES         = perl ${TOOLSDIR}/Build/InstRes,102
 INSTVIARG       = perl ${TOOLSDIR}/Build/InstViaRG,102
+ifeq (objs,$(notdir ${CURDIR}))
+MAKE            = make -C..
+else
 MAKE            = make
+endif
 MODGEN          = modgen
 MODSQZ          = modsqz
 NOP             = #