Commit d8fd9f7b authored by Robert Sprowson's avatar Robert Sprowson

Update ROM patcher to understand Ursula kernels

The ROM patcher relied on lots of grubby internal knowledge of kernel addresses, some of which moved for Ursula
* L1PT now discovered with OS_ReadSysInfo 6
* CAM now discovered with OS_ReadSysInfo 6
* The StrongARM cleaner flipflop now discovered with OS_ReadSysInfo 6
* Option to ignore the ROM checksum where it is known to be duff (eg. personalised copies of RISC OS 4)

Also
* Remove RO430Hook from the output pending more testing
* Readd SoundDMA for RISC OS 3.60


Version 1.18. Tagged as 'Boot-1_18'
parent d7abf630
......@@ -80,6 +80,7 @@ FILES400 = \
RO400Hook \
RO400Hook.Boot.PreDesk.Configure.BandLimit \
RO400Hook.Boot.Tasks.~CDReinit \
RO400Hook.Boot.PreDesk.ROMPatch \
# Files required by a 4.3x machine
FILES430 = \
......@@ -143,10 +144,10 @@ install_BootUNIVERSAL: install_Configure ${FILESUNIVERSAL} install_AppFiles
${CHMOD} -R 444 ${INSTAPP}.Utils
${CHMOD} -R 444 ${INSTAPP}.Library
@Echo Deleting superfluous files ...
${XWIPE} ${INSTAPP}.RO350Hook.Boot.Tasks.!ROMPatch ${WFLAGS}
${XWIPE} ${INSTAPP}.RO360Hook.Boot.PreDesk.SoundDMA ${WFLAGS}
${XWIPE} ${INSTAPP}.Utils.NetBye ${WFLAGS}
${XWIPE} ${INSTAPP}.Library.Repeat ${WFLAGS}
${XWIPE} ${INSTAPP}.RO350Hook.Boot.Tasks.!ROMPatch ${WFLAGS} # Now in PreDesk
${XWIPE} ${INSTAPP}.RO430Hook ${WFLAGS} # Needs more testing really
${XWIPE} ${INSTAPP}.Utils.NetBye ${WFLAGS} # Unreferenced
${XWIPE} ${INSTAPP}.Library.Repeat ${WFLAGS} # Now in BootCommands
# Make me a network fileserver remote !Boot
install_ShareBootUNIVERSAL: install_Configure ${FILESUNIVERSAL} install_AppFiles
......@@ -159,10 +160,10 @@ install_ShareBootUNIVERSAL: install_Configure ${FILESUNIVERSAL} install_AppFiles
${CHMOD} -R 444 ${INSTAPP}.Utils
${CHMOD} -R 444 ${INSTAPP}.Library
@Echo Deleting superfluous files ...
${XWIPE} ${INSTAPP}.RO350Hook.Boot.Tasks.!ROMPatch ${WFLAGS}
${XWIPE} ${INSTAPP}.RO360Hook.Boot.PreDesk.SoundDMA ${WFLAGS}
${XWIPE} ${INSTAPP}.Utils.NetBye ${WFLAGS}
${XWIPE} ${INSTAPP}.Library.Repeat ${WFLAGS}
${XWIPE} ${INSTAPP}.RO350Hook.Boot.Tasks.!ROMPatch ${WFLAGS} # Now in PreDesk
${XWIPE} ${INSTAPP}.RO430Hook ${WFLAGS} # Needs more testing really
${XWIPE} ${INSTAPP}.Utils.NetBye ${WFLAGS} # Unreferenced
${XWIPE} ${INSTAPP}.Library.Repeat ${WFLAGS} # Now in BootCommands
# Make me a !ResetBoot app
install_ResetBoot:
......@@ -225,6 +226,7 @@ clean:
${XWIPE} RO350Hook.Boot.PreDesk.*ROMPatch ${WFLAGS}
${XWIPE} RO360Hook.Boot.PreDesk.*ROMPatch ${WFLAGS}
${XWIPE} RO370Hook.Boot.PreDesk.*ROMPatch ${WFLAGS}
${XWIPE} RO400Hook.Boot.PreDesk.*ROMPatch ${WFLAGS}
${XWIPE} Source.ROMPatch.o ${WFLAGS}
${XWIPE} Source.ROMPatch.Install.ROMPatch.!RunImage ${WFLAGS}
${XWIPE} RO370Hook.Boot.PreDesk.Configure.BandLimit ${WFLAGS}
......@@ -306,7 +308,7 @@ RO350Hook.Boot.PreDesk.MemFix: Source.MemFix.Source.MemFix
${LD} ${LDFLAGS} -bin -o $@ Source.MemFix.o.MemFix
${SETTYPE} $@ Utility
RO350Hook.Boot.PreDesk.ROMPatch RO360Hook.Boot.PreDesk.ROMPatch RO370Hook.Boot.PreDesk.ROMPatch:
RO350Hook.Boot.PreDesk.ROMPatch RO360Hook.Boot.PreDesk.ROMPatch RO370Hook.Boot.PreDesk.ROMPatch RO400Hook.Boot.PreDesk.ROMPatch:
${MKDIR} Source.ROMPatch.o
${CC} ${CFLAGS} -ISource.ROMPatch -o Source.ROMPatch.o.rompatch Source.ROMPatch.c.rompatch
${AS} ${ASFLAGS} -o Source.ROMPatch.o.asmutils Source.ROMPatch.s.asmutils
......
......@@ -19,6 +19,7 @@
#define M_name360 "ROM patches 3.60/2"
#define M_name370 "ROM patches 3.70/3"
#define M_name371 "ROM patches 3.71/1"
#define M_name402 "ROM patches 4.02/5"
#define E_ROMunknown "No patches for this ROM\n"
#define E_malloc "Not enough memory (malloc)\n"
......
......@@ -23,6 +23,7 @@
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include "Global/OSRSI6.h"
/* ------------------------------------------------------------------------ */
......@@ -59,7 +60,20 @@ void dbtrace_patchhits(int *romsection,int *romlpage,int *rompage)
void dbtrace_DApages(int DAN, uint32 DAbase, int DAsize)
{
uint32 a,pa,pn,ppl;
camentry_t *cam = (camentry_t *)CAMstart;
uint32 *camptr = NULL;
camentry_t *cam;
_swix(OS_ReadSysInfo, _INR(0,2) | _OUT(2),
6, 0, OSRSI6_CamEntriesPointer,
&camptr);
if (camptr == NULL)
{
cam = (camentry_t *)CAMstart; /* Pre Ursula hardwired number */
}
else
{
cam = (camentry_t *)*camptr;
}
fprintf(stderr,"patchDA num=%8.8x size=%8.8x base=%8.8x\n",DAN,DAsize,DAbase);
......
......@@ -39,19 +39,20 @@
#include "kernel.h"
#include "swis.h"
#include "Global/OSRSI6.h"
#include "defs.h"
#include "debug.h"
#include "UK/messages.h"
/* implemented in assembler */
extern uint32 module,moduleend;
extern uint32 module,moduleend,myflush;
extern uint32 modDAhandler,moddata;
extern uint32 svcarmid(void);
extern void svccopy(uint32 *src, uint32 *dest, int bytes);
extern uint32 svcpeek(uint32 *addr);
extern void svcpoke(uint32 *addr, uint32 val);
extern void svcsetROML1PT(uint32 *L1PTaddr, uint32 *L1PTvals, int count);
extern void svcsetROML1PT(uint32 *L1PTaddr, uint32 *L1PTvals, int count, void *flushfn);
/* currently considered ROM size in bytes */
uint32 ROMsize;
......@@ -61,18 +62,6 @@ uint32 ROMsize;
/* ------------------------------------------------------------------------ */
static int match_romcrc(uint32 *romcrc)
{
int i, match;
uint32 *this_romcrc = (uint32 *)(ROMstart+ROMsize-12);
for (match=1,i=0; i<3; i++) match &= (this_romcrc[i] == romcrc[i]);
return match;
}
/* ------------------------------------------------------------------------ */
uint32 logtophys(uint32 log)
{
osmemoryblock_t block;
......@@ -100,6 +89,20 @@ static uint32 phystopagenum(uint32 phys)
return block.pagenumber;
}
/* ------------------------------------------------------------------------ */
static int match_romcrc(ROMentry_t *definition)
{
int i, match, limit;
const uint32 *this_romcrc = (const uint32 *)(ROMstart+ROMsize-12);
const uint32 *romcrc = definition->romcrc;
match = 1;
limit = definition->trustsum ? 3 : 2;
for (i=0; i<limit; i++) match &= (this_romcrc[i] == romcrc[i]);
return match;
}
/* ------------------------------------------------------------------------ */
......@@ -160,6 +163,26 @@ static int scan_patches(patchlist_proc patchlist[],
/* ------------------------------------------------------------------------ */
static uint32 find_ARMA_flipflop(void)
{
uint32 sandals = 0;
_swix(OS_ReadSysInfo, _INR(0,2) | _OUT(2), 6, 0, OSRSI6_ARMA_Cleaner_flipflop, &sandals);
return sandals ? sandals : ARMA_Cleaner_flipflop;
}
/* ------------------------------------------------------------------------ */
static uint32 find_L1PT(void)
{
uint32 table = 0;
_swix(OS_ReadSysInfo, _INR(0,2) | _OUT(2), 6, 0, OSRSI6_L1PT, &table);
return table ? table : L1PT;
}
/* ------------------------------------------------------------------------ */
#define pagetype(pap,table) ((pap)&1) ? (table[(pap)>>1] >> 4) : (table[(pap)>>1] & 15)
#define pt_availableDRAM 1
......@@ -194,7 +217,7 @@ static int find_DA_first_pagenum(int pagesneeded, uint32 *first_pagenum)
/* RAM used for start of L1PT is good start point for scan of table;
mainly, avoids DRAM that could be used for screen in no-VRAM
system */
L1PTphys = logtophys(L1PT);
L1PTphys = logtophys(find_L1PT());
L1PTpap = L1PTphys >> 12; /* physical arrangement (4k) page index, into table */
#if DEBUG
......@@ -240,7 +263,7 @@ static int find_DA_first_pagenum(int pagesneeded, uint32 *first_pagenum)
/* ------------------------------------------------------------------------ */
static void create_patchDA(uint32 RMAaddr, int DAsize, uint32 DAhandler_addr,
char *patchname,
const char *patchname,
int *patchDAN, uint32 *patchDAbase)
{
/* create dynamic area for patches (plus 1 page - the first - for
......@@ -264,7 +287,7 @@ static void create_patchDA(uint32 RMAaddr, int DAsize, uint32 DAhandler_addr,
ok = find_DA_first_pagenum(DAsize>>12,&first_pagenum);
if (ok)
{
/* set values reguired by pregrow handler, in module in RMA */
/* set values required by pregrow handler, in module in RMA */
md = (moduledata_t *)((uint32)(&moddata)-(uint32)(&module)+RMAaddr);
md->nextpageneeded = first_pagenum;
md->firstpagenotneeded = first_pagenum + (DAsize >> 12);
......@@ -454,21 +477,27 @@ static void set_ROM_L1PT(uint32 RMAaddr, int patchDAN, uint32 patchDAbase,
int i;
uint32 ROM_L1PTvalues[ROMsections(ROMsize)];
uint32 L1PTlog = find_L1PT();
moduledata_t *md;
void *flushfn;
#define MMU_L1PR 0x11 /* flag L1 descriptor as page reference */
/* current L1PT settings */
for (i=0; i<ROMsections(ROMsize); i++)
ROM_L1PTvalues[i] = svcpeek((uint32 *)(L1PT + (ROMstart >> 18) + (i<<2)));
ROM_L1PTvalues[i] = svcpeek((uint32 *)(L1PTlog + (ROMstart >> 18) + (i<<2)));
/* now poke all required values into module data space, in RMA */
md = (moduledata_t *)((uint32)(&moddata)-(uint32)(&module)+RMAaddr);
md->DAN = patchDAN;
md->flipflop = find_ARMA_flipflop();
md->sections = ROMsections(ROMsize);
md->kernL1PT = L1PT + (ROMstart >> 18);
md->kernL1PT = L1PTlog + (ROMstart >> 18);
for (i=0; i<ROMsections(ROMsize); i++) md->L1PTentries[i] = ROM_L1PTvalues[i];
/* work out where 'myflush' is (so relative addressing on md->flipflop works */
flushfn = (void *)((uint32)(&myflush)-(uint32)(&module)+RMAaddr);
/* new settings, for any sections hit by patches */
for (i=0; i<ROMsections(ROMsize); i++)
{
......@@ -483,7 +512,7 @@ static void set_ROM_L1PT(uint32 RMAaddr, int patchDAN, uint32 patchDAbase,
#endif
#if REALLY_DO_REMAP
svcsetROML1PT((uint32 *)(L1PT + (ROMstart >> 18)),ROM_L1PTvalues,ROMsections(ROMsize));
svcsetROML1PT((uint32 *)(L1PTlog + (ROMstart >> 18)),ROM_L1PTvalues,ROMsections(ROMsize),flushfn);
#else
fprintf(stderr,"** svcsetROML1PT skipped **\n");
#endif
......@@ -503,7 +532,7 @@ static ROMentry_t *identify_ROM(void)
fprintf(stderr,"check %s\n",rom->patchname);
#endif
ROMsize = rom->romsize << 20;
if (match_romcrc(rom->romcrc)) break;
if (match_romcrc(rom)) break;
}
#if DEBUG
......@@ -540,7 +569,6 @@ int main(int argc, char *argv[])
/* sets hit tables, calculates number of pages required for patches */
Npatchpages = scan_patches(rom->patchlist,romsection,romlpage,rompage);
if (Npatchpages == 0) exit(0); /* not classed as error */
#if DEBUG
......
......@@ -24,14 +24,15 @@
/* exit code on error */
#define ErrorReturnCode 257
/* Caution! these defs are valid for RISC OS 3.50, 3.60, 3.70, 3.71. Make
sure valid for all ROM versions supported by given release of ROMPatch.
/* Caution! these defs are valid for RISC OS 3.50, 3.60, 3.70, 3.71.
Where possible, OS_ReadSysInfo 6 is used in preference to this pixie dust.
Make sure valid for all ROM versions supported by given release of ROMPatch!
*/
#define CAMstart 0x1e02000 /* soft CAM */
#define PageFlags_Unavailable 0x2000 /* flag bit in CAM PPL word */
#define ARMA_Cleaner_flipflop 0x178 /* StrongARM cache maintenance */
#define L1PT 0x2c0c000 /* MMU level 1 page table */
#define ROMstart 0x3800000
#define ROMphysstart 0x0
#define ROMlimit 0x400000 /* Largest ROM patchable */
......@@ -72,6 +73,7 @@ typedef struct
uint32 nextpageneeded; /* next page number needed to grow area */
uint32 firstpagenotneeded; /* first page number not needed (determines fully grown) */
uint32 DAN; /* dynamic area number */
uint32 flipflop; /* StrongARM cache maintenance */
uint32 sections; /* used entries in L1PTentries */
uint32 kernL1PT; /* address of kernel L1PT entries for ROM */
uint32 L1PTentries[4]; /* 'unpatch' values of the sections */
......@@ -87,9 +89,10 @@ typedef patchentry_t * (*patchlist_proc)(void *handle);
/* one entry of list of recognised ROMs */
typedef struct
{
uint32 *romcrc; /* ROM checksum and CRC's */
uint16 writeprotect; /* whether ROM supports ROM-space write protection */
const uint32 *romcrc; /* ROM checksum and CRC's */
uint8 writeprotect; /* whether ROM supports ROM-space write protection */
uint8 trustsum; /* whether ROM checksum is correct or not */
uint16 romsize; /* the ROM size in MB */
char *patchname; /* for dynamic Area */
const char *patchname; /* for dynamic Area */
patchlist_proc *patchlist; /* list of patch applier procs, terminated by NULL */
} ROMentry_t;
......@@ -42,6 +42,7 @@ static ROMentry_t ROMentry350 =
{
romcrc350,
0, /* 3.50 does not support ROM-space write protect */
1, /* 3.50 checksum can be believed */
2, /* 3.50 comes on 2MB of ROM */
M_name350,
patchlist350
......
......@@ -36,6 +36,7 @@ static ROMentry_t ROMentry360 =
{
romcrc360,
0, /* 3.60 does not support ROM-space write protect */
1, /* 3.60 checksum can be believed */
4, /* 3.60 comes on 4MB of ROM */
M_name360,
patchlist360
......
......@@ -40,6 +40,7 @@ static ROMentry_t ROMentry370 =
{
romcrc370,
1, /* 3.70 supports ROM-space write protect */
1, /* 3.70 checksum can be believed */
4, /* 3.70 comes on 4MB of ROM */
M_name370,
patchlist370
......
......@@ -30,7 +30,8 @@ static ROMentry_t ROMentry371 =
{
romcrc371,
1, /* 3.71 supports ROM-space write protect */
4, /* 3.70 comes on 4MB of ROM */
1, /* 3.71 checksum can be believed */
4, /* 3.71 comes on 4MB of ROM */
M_name371,
patchlist371
};
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/CDSFTpatch.h */
/*
CDFSSoftATAPI sense status fix.
CDFSSoftSCSI2 play track to disc end fix.
*/
static patchentry_t *CDSFTpatches402_proc(void *handle)
{
static patchentry_t CDSFTpatches402[] =
{
/* addr old new */
{(uint32 *)0x03BE087C, 0xE2060001, 0xEA0036E4}, /* CDFSSoftATAPI B -> 03BEE414 */
{(uint32 *)0x03BE5B4C, 0xB35600FF, 0xB35100FF}, /* CDFSSoftSCSI2 */
{(uint32 *)0x03BEE400, 0xFFFFFFFF, 0x72617453}, /* "Start of patch:" */
{(uint32 *)0x03BEE404, 0xFFFFFFFF, 0x666F2074},
{(uint32 *)0x03BEE408, 0xFFFFFFFF, 0x4D4F5220},
{(uint32 *)0x03BEE40C, 0xFFFFFFFF, 0x74615020},
{(uint32 *)0x03BEE410, 0xFFFFFFFF, 0x203A6863},
{(uint32 *)0x03BEE414, 0xFFFFFFFF, 0xE59D701C},
{(uint32 *)0x03BEE418, 0xFFFFFFFF, 0xEBFFC9F8},
{(uint32 *)0x03BEE41C, 0xFFFFFFFF, 0xEAFFC917},
{(uint32 *)0x03B02128, 0x41525421, 0x6C6C754E},
{(uint32 *)0x03B0212C, 0x00004543, 0x00004A3A},
{(uint32 *)0,0,0}
};
return CDSFTpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/CLIBpatch.h */
/*
Fix for crashy strcoll and qsort
*/
static patchentry_t *CLIBpatches402_proc(void *handle)
{
static patchentry_t CLIBpatches402[] =
{
/*           addr old new */
{(uint32 *)0x03A812B8, 0xE1A05000, 0xE1B05000},
{(uint32 *)0x03A812BC, 0xE1A08001, 0x11B08001},
{(uint32 *)0x03A812C0, 0xE1B04002, 0x11B04002},
{(uint32 *)0x03A834C8, 0x059D0004, 0x059D0000},
{(uint32 *)0,0,0}
};
return CLIBpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/DESKpatch.h */
static patchentry_t *DESKpatches402_proc(void *handle)
{
static patchentry_t DESKpatches402[] =
{
/*           addr old new */
{(uint32 *)0x0398552C, 0xE3320001, 0xE3A00007},
{(uint32 *)0x03985530, 0x13A00007, 0xEF02001E},
{(uint32 *)0,0,0}
};
return DESKpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/DMANpatch.h */
static patchentry_t *DMANpatches402_proc(void *handle)
{
static patchentry_t DMANpatches402[] =
{
/*           addr old new */
{(uint32 *)0x039F3EE0, 0xE92D43CF, 0xE1A0F00E},
{(uint32 *)0x039F3F58, 0xE92D43CF, 0xE1A0F00E},
{(uint32 *)0,0,0}
};
return DMANpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/DRWFpatch.h */
static patchentry_t *DRWFpatches402_proc(void *handle)
{
static patchentry_t DRWFpatches402[] =
{
/*           addr old new */
{(uint32 *)0x03ACF8E4, 0xE3802E15, 0xE3802E95},
{(uint32 *)0x03AD0320, 0xE3802E15, 0xE3802E95},
{(uint32 *)0x03AD176C, 0xE38020E0, 0xE3802E8E},
{(uint32 *)0,0,0}
};
return DRWFpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/MSGSpatch.h */
/*
Filer template, initial open position fix.
*/
static patchentry_t *MSGSpatches402_proc(void *handle)
{
static patchentry_t MSGSpatches402[] =
{
/*           addr old new */
{(uint32 *)0x03886DAC, 0x04D00D32, 0x00240D32},
{(uint32 *)0x03886DB0, 0x00020000, 0x01F20000},
{(uint32 *)0x03886DB4, 0x07D00000, 0x03280000},
{(uint32 *)0x03886DB8, 0x02FA0000, 0x04680000},
{(uint32 *)0x03920524, 0x00015555, 0x00015455},
{(uint32 *)0,0,0}
};
return MSGSpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/MTRANpatch.h */
static patchentry_t *MTRANpatches402_proc(void *handle)
{
static patchentry_t MTRANpatches402[] =
{
/* addr old new */
{(uint32 *)0x03BEE458, 0xFFFFFFFF, 0xE3550000},
{(uint32 *)0x03BEE45C, 0xFFFFFFFF, 0x1AF5E8A3},
{(uint32 *)0x03BEE460, 0xFFFFFFFF, 0xEAF5E848},
{(uint32 *)0x03968554, 0xEB000065, 0xEB0A17BF}, /* BL -> 03BEE458 */
{(uint32 *)0x03BEE464, 0xFFFFFFFF, 0xE2555001},
{(uint32 *)0x03BEE468, 0xFFFFFFFF, 0xC4C18001},
{(uint32 *)0x03BEE46C, 0xFFFFFFFF, 0xCAF5E872},
{(uint32 *)0x03BEE470, 0xFFFFFFFF, 0x04C15001},
{(uint32 *)0x03BEE474, 0xFFFFFFFF, 0xE3A05000},
{(uint32 *)0x03BEE478, 0xFFFFFFFF, 0xE8FD8001},
{(uint32 *)0x0396864C, 0x14C18001, 0x1A0A1784}, /* BNE -> 03BEE464 */
{(uint32 *)0,0,0}
};
return MTRANpatches402;
}
/* Copyright 2013 Castle Technology Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* patches/402/PINBpatch.h */
static patchentry_t *PINBpatches402_proc(void *handle)
{
static patchentry_t PINBpatches402[] =
{
/* addr old new */
{(uint32 *)0x03BEE42C, 0xFFFFFFFF, 0xE92D4003},
{(uint32 *)0x03BEE430, 0xFFFFFFFF, 0xE24DD014},
{(uint32 *)0x03BEE434, 0xFFFFFFFF, 0xE1A0100D},
{(uint32 *)0x03BEE438, 0xFFFFFFFF, 0xEF0600CF},
{(uint32 *)0x03BEE43C, 0xFFFFFFFF, 0x759D0010},
{(uint32 *)0x03BEE440, 0xFFFFFFFF, 0x63A00000},