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Commit 9f9f1bab authored by Jeffrey Lee's avatar Jeffrey Lee
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Merge with RPi branch 

Detail:
  Merge the RPi branch with the HAL branch, ending RPi branch development
  Brief summary of changes brought in:
  * Added HAL_VideoStartupMode to allow the HAL to specify a startup mode for the OS
  * Fixed addresses being sent to GraphicsV_SetDMAAddress being wrong for external framestores (addresses were given as if internal framestore was in use)
  * Add InverseTextTransparency option for limited compile-time support for targets where framebuffer alpha channel is important
  * Fix ConfiguredLanguage for non-Tungsten builds
  * Update ARMv6 CPU detection to read cache parameters from cache type register instead of using KnownCPUTable
  * Add HALDebugHexTX/TX2/TX4 debug routines for writing out numbers via HAL
  * Use HAL_TimerIRQClear when clearing timer 0 interrupt instead of just HAL_IRQClear
  * Initialise FileLangCMOS using defines from Hdr:FSNumbers instead of magic numbers. Use SDFS on M_ARM11ZF.
  * Improved software mouse pointer support; software pointer now removed & restored in some of the same places the text cursor is
  * Improve support for external framestores; driver is now able to grow/shrink/move the framestore on mode changes if bit 5 of GraphicsV_DisplayFeatures R0 is set
  * GraphicsV_FramestoreAddress now has a default claimant which calls HAL_VideoFramestoreAddress
Admin:
  Tested on Raspberry Pi, Iyonix, OMAP3, IOMD


Version 5.35, 4.79.2.165. Tagged as 'Kernel-5_35-4_79_2_165'
parents 3076256e 60741ecc
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VersionASM
View file @ 9f9f1bab
......@@ -13,11 +13,11 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "5.35"
Module_Version SETA 535
Module_MinorVersion SETS "4.79.2.164"
Module_Date SETS "20 Aug 2012"
Module_ApplicationDate SETS "20-Aug-12"
Module_MinorVersion SETS "4.79.2.165"
Module_Date SETS "18 Sep 2012"
Module_ApplicationDate SETS "18-Sep-12"
Module_ComponentName SETS "Kernel"
Module_ComponentPath SETS "castle/RiscOS/Sources/Kernel"
Module_FullVersion SETS "5.35 (4.79.2.164)"
Module_HelpVersion SETS "5.35 (20 Aug 2012) 4.79.2.164"
Module_FullVersion SETS "5.35 (4.79.2.165)"
Module_HelpVersion SETS "5.35 (18 Sep 2012) 4.79.2.165"
END
VersionNum
View file @ 9f9f1bab
......@@ -5,19 +5,19 @@
*
*/
#define Module_MajorVersion_CMHG 5.35
#define Module_MinorVersion_CMHG 4.79.2.164
#define Module_Date_CMHG 20 Aug 2012
#define Module_MinorVersion_CMHG 4.79.2.165
#define Module_Date_CMHG 18 Sep 2012
#define Module_MajorVersion "5.35"
#define Module_Version 535
#define Module_MinorVersion "4.79.2.164"
#define Module_Date "20 Aug 2012"
#define Module_MinorVersion "4.79.2.165"
#define Module_Date "18 Sep 2012"
#define Module_ApplicationDate "20-Aug-12"
#define Module_ApplicationDate "18-Sep-12"
#define Module_ComponentName "Kernel"
#define Module_ComponentPath "castle/RiscOS/Sources/Kernel"
#define Module_FullVersion "5.35 (4.79.2.164)"
#define Module_HelpVersion "5.35 (20 Aug 2012) 4.79.2.164"
#define Module_FullVersion "5.35 (4.79.2.165)"
#define Module_HelpVersion "5.35 (18 Sep 2012) 4.79.2.165"
#define Module_LibraryVersionInfo "5:35"
hdr/GPIODevice
View file @ 9f9f1bab
......@@ -65,6 +65,17 @@ GPIORevision_DevKit8000_Unknown # 1
GPIORevision_IGEPv2_BC # 1 ; Rev B or C (B-compatible)
GPIORevision_IGEPv2_C # 1 ; Rev C (not a B-compatible one)
; Type & revision values specific to HALDeviceID_GPIO_BCM2835:
^ 0
GPIOType_BCM2835_RaspberryPi # 1 ; It's a Raspberry Pi
; Raspberry Pi revision values:
^ 0
GPIORevision_RaspberryPi_B_1 # 1 ; Model B Rev 1.0
GPIORevision_RaspberryPi_B_2 # 1 ; Model B Rev 2.0
]
OPT OldOpt
......
hdr/HALDevice
View file @ 9f9f1bab
......@@ -146,6 +146,7 @@ HALDeviceID_VDU_OMAP3 # 1
HALDeviceID_VDU_OMAP4 # 1
HALDeviceID_VDU_Tungsten # 1
HALDeviceID_VDU_VIDC20 # 1
HALDeviceID_VDU_BCM2835 # 1
^ 0
HALDeviceID_EtherNIC_SMSC9221 # 1
......
hdr/HALEntries
View file @ 9f9f1bab
......@@ -174,6 +174,8 @@ EntryNo_HAL_VideoFramestoreAddress # 1 ; 116
EntryNo_HAL_UARTDefault # 1 ; 117
EntryNo_HAL_VideoStartupMode # 1 ; 118
KnownHALEntries # 0 ; Used inside Kernel
; Various flags and constants
......
hdr/KernelWS
View file @ 9f9f1bab
......@@ -785,12 +785,13 @@ PointerY # 4
]
HALVideoFeatures # 4 ; features word from HAL
TrueVideoPhysAddr # 4 ; VideoPhysAddr is a lie, use this instead
[ :LNOT: UseGraphicsV
HWPixelFormats # 4 ; pixel formats word from HAL
HWBufferAlign # 4 ; buffer alignment word from HAL
# 36*4 - 6*PointerBlkSize ; SPARE (avoiding changes of exported addresses for now)
# 35*4 - 6*PointerBlkSize ; SPARE (avoiding changes of exported addresses for now)
|
# 38*4 - 6*PointerBlkSize ; SPARE (avoiding changes of exported addresses for now)
# 37*4 - 6*PointerBlkSize ; SPARE (avoiding changes of exported addresses for now)
]
TextFgColour # 4 ; Fg/Bg colour stored as a colour number, computed on VDU 18 and re-poked!
......
hdr/Options
View file @ 9f9f1bab
......@@ -289,6 +289,9 @@ DebugTerminal SETL {FALSE}
GBLL DebugHALTX
DebugHALTX SETL (Version :AND: 1) = 1 ; Yes for odd numbered development
GBLL InverseTextTransparency
InverseTextTransparency SETL {FALSE}
GBLL DebugHeaps ; initialise claimed and freed blocks
DebugHeaps SETL {FALSE} ; (may slow things down unacceptably)
......@@ -319,8 +322,12 @@ HiProcVecs SETL {FALSE} ; Leave off for now
GBLL DebugForcedReset ; debug forced hard resets
DebugForcedReset SETL {FALSE}
GBLA ConfiguredLang
ConfiguredLang SETA 11 ; default configured language
GBLA ConfiguredLang ; default configured language
[ M_Tungsten
ConfiguredLang SETA 11
|
ConfiguredLang SETA 10
]
GBLA FirstUnpluggableModule
FirstUnpluggableModule SETA 8 ; Podule, FileSwitch, ResourceFS, Messages, MessageTrans,
......
s/ARMops
View file @ 9f9f1bab
......@@ -750,9 +750,9 @@ KnownCPUTable
; Simplified CPUDesc table for ARMvF
; The cache size data is ignored for ARMv7.
KnownCPUTable_Fancy
CPUDesc Cortex_A8, &00C080, &00FFF0, ARMvF, WB_CR7_Lx, 1, 16K, 32, 16, 16K, 32, 16
CPUDesc Cortex_A9, &00C090, &00FFF0, ARMvF, WB_CR7_Lx, 1, 32K, 32, 16, 32K, 32, 16
CPUDesc ARM1176JZF_S, &00B760, &00FFF0, ARMv6, WB_CR7_LDa, 1, 16K, 32, 16,16K, 32, 16
CPUDesc ARM1176JZF_S, &00B760, &00FFF0, ARMvF, WB_CR7_LDc, 1, 16K, 4, 8, 16K, 4, 8
CPUDesc Cortex_A8, &00C080, &00FFF0, ARMvF, WB_CR7_Lx, 1, 16K, 32,16, 16K, 32,16
CPUDesc Cortex_A9, &00C090, &00FFF0, ARMvF, WB_CR7_Lx, 1, 32K, 32,16, 32K, 32,16
DCD -1
; Peculiar characteristics of individual ARMs not deducable otherwise. First field is
......@@ -830,15 +830,22 @@ ARM_Analyse_Fancy
BNE %FT25
; ARMv6 format cache type register.
; TODO - Use the cache type register to deduce the cache info.
; For now, just fall back on the values in the CPU table.
ASSERT CT_Isize_pos = 0
MOV a1, v2
; CPUs like the ARM1176JZF-S are available with a range of cache sizes,
; so it's not safe to rely on the values in the CPU table. Fortunately
; all ARMv6 CPUs implement the register (by contrast, for the "plain"
; ARM case, no ARMv3 CPUs, some ARMv4 CPUs and all ARMv5 CPUs, so it
; needs to drop back to the table in some cases).
ARM_read_cachetype v2
MOV a1, v2, LSR #CT_Isize_pos
ADD a2, v6, #ICache_Info
BL EvaluateCache
MOV a1, v2, LSR #CT_Dsize_pos
ADD a2, v6, #DCache_Info
BL EvaluateCache
TST v2, #CT_S
ORRNE v5, v5, #CPUFlag_SynchroniseCodeAreas+CPUFlag_SplitCache
B %FT27
25
......@@ -917,17 +924,18 @@ ARM_Analyse_Fancy
TSTEQ v5, #CPUFlag_SplitCache
BEQ Analyse_WriteThroughUnified ; eg. ARM7TDMI derivative
TEQ a2, #CT_ctype_WB_CR7_LDa
BEQ Analyse_WB_CR7_LDa ; eg. ARM9
TEQ a2, #CT_ctype_WB_CR7_LDa ; eg. ARM9
TEQNE a2, #CT_ctype_WB_CR7_LDc ; eg. ARM1176JZF-S - differs only in cache lockdown
BEQ Analyse_WB_CR7_LDa
TEQ a2, #CT_ctype_WB_Crd
BEQ Analyse_WB_Crd ; eg. StrongARM
TEQ a2, #CT_ctype_WB_Cal_LD
TEQ a2, #CT_ctype_WB_Cal_LD ; warning, allocation clash with CT_ctype_WB_CR7_LDd
BEQ Analyse_WB_Cal_LD ; assume XScale
TEQ a2, #CT_ctype_WB_CR7_Lx
BEQ Analyse_WB_CR7_Lx
BEQ Analyse_WB_CR7_Lx ; eg. Cortex-A8, Cortex-A9
; others ...
......
s/HAL
View file @ 9f9f1bab
......@@ -2578,25 +2578,6 @@ DebugTerminal_Wrch
Pull "a1-a4,sb,ip,pc" ; don't claim it
]
[ DebugHALTX
DebugHALPrint
Push "a1-a4,v1,sb,ip"
AddressHAL
MOV v1, lr
10 LDRB a1, [v1], #1
TEQ a1, #0
BEQ %FT20
CallHAL HAL_DebugTX
B %BT10
20 MOV a1, #13
CallHAL HAL_DebugTX
MOV a1, #10
CallHAL HAL_DebugTX
ADD v1, v1, #3
BIC lr, v1, #3
Pull "a1-a4,v1,sb,ip"
MOV pc, lr
]
Reset_IRQ_Handler
SUB lr, lr, #4
......@@ -2639,5 +2620,67 @@ Reset_IRQ_Exit
MSR SPSR_cxsf, a1
Pull "a1-a4,v1-v2,sb,ip,pc",,^
[ DebugHALTX
DebugHALPrint
Push "a1-a4,v1,sb,ip"
AddressHAL
MOV v1, lr
10 LDRB a1, [v1], #1
TEQ a1, #0
BEQ %FT20
CallHAL HAL_DebugTX
B %BT10
20 MOV a1, #13
CallHAL HAL_DebugTX
MOV a1, #10
CallHAL HAL_DebugTX
ADD v1, v1, #3
BIC lr, v1, #3
Pull "a1-a4,v1,sb,ip"
MOV pc, lr
]
[ DebugHALTX
HALDebugHexTX
stmfd r13!, {r0-r3,sb,ip,lr}
AddressHAL
b jbdt1
HALDebugHexTX2
stmfd r13!, {r0-r3,sb,ip,lr}
AddressHAL
b jbdt2
HALDebugHexTX4
stmfd r13!, {r0-r3,sb,ip,lr}
AddressHAL
mov r0,r0,ror #24 ; hi byte
bl jbdtxh
mov r0,r0,ror #24
bl jbdtxh
jbdt2
mov r0,r0,ror #24
bl jbdtxh
mov r0,r0,ror #24
jbdt1
bl jbdtxh
mov r0,#' '
CallHAL HAL_DebugTX
ldmfd r13!, {r0-r3,sb,ip,pc}
jbdtxh stmfd r13!,{a1,v1,lr} ; print byte as hex. corrupts a2-a4, ip, assumes sb already AddressHAL'd
and v1,a1,#&f ; get low nibble
and a1,a1,#&f0 ; get hi nibble
mov a1,a1,lsr #4 ; shift to low nibble
cmp a1,#&9 ; 9?
addle a1,a1,#&30
addgt a1,a1,#&37 ; convert letter if needed
CallHAL HAL_DebugTX
cmp v1,#9
addle a1,v1,#&30
addgt a1,v1,#&37
CallHAL HAL_DebugTX
ldmfd r13!,{a1,v1,pc}
]
END
s/NewIRQs
View file @ 9f9f1bab
......@@ -1406,8 +1406,15 @@ TickOne ROUT
[ HAL
; Don't push r14 - we're using new interface, and claim the vector
Push "r9,r12"
Push "r0,r9,r12"
AddressHAL
; In some chips, Timer0 is latched in the timer block instead of,
; or as well as in the interrupt controller
MOV R0, #0 ; clear latch for Timer0
CallHAL HAL_TimerIRQClear
Pull "r0" ; get device number back
CallHAL HAL_IRQClear
Pull "r9,r12"
|
......
s/NewReset
View file @ 9f9f1bab
......@@ -1056,9 +1056,13 @@ DefaultCMOSTable ; list of non-zero options wanted :
; terminated by offset &FF
= KeyDelCMOS, 32
[ M_CortexA8 :LOR: M_CortexA9
= FileLangCMOS, 26 ; SCSIFS for OMAP3, etc.
= FileLangCMOS, fsnumber_SCSIFS ; SCSIFS for OMAP3, etc.
|
= FileLangCMOS, 8 ; ADFS
[ M_ARM11ZF
= FileLangCMOS, fsnumber_SDFS ; SDFS for Pi, etc.
|
= FileLangCMOS, fsnumber_adfs ; ADFS
]
]
= FontCMOS, 64 ; KJB 13-Dec-02: Changed to 256K from 64K
= PigCMOS, 10
......@@ -1553,6 +1557,7 @@ WallopDuffOnes
MOV r1, #AP_UndStackSoftCam
BL AddCamEntries
]
DebugTX "InitDynamicAreas"
; let's boogie with the CMOS for a bit
; read info and move as much memory as we can
......@@ -1700,6 +1705,7 @@ WallopDuffOnes
STR R1, [R0, #AplWorkSize]
STR R1, [R0, #MemLimit]
DebugTX "InitVectors"
BL InitVectors ; ready for OsByte to read mode
LDR R1, =ZeroPage+ModuleSWI_HashTab
......@@ -1764,6 +1770,7 @@ ResetPart1Done ; R0 is reset type
]
Push "R0, R1" ; save until after MOSInit
DebugTX "InitIRQ1"
BL InitialiseIRQ1Vtable
LDR R3, =ZeroPage
......@@ -1814,6 +1821,7 @@ ResetPart1Done ; R0 is reset type
MOV R4, #0
STMIA R2!, {R3,R4}
STMIA R2!, {R3,R4}
DebugTX "IMB_Full"
;we need to do an IMB type thing for modifying code in vector area,
;and for copying irq handler code
......
s/PMF/IIC
View file @ 9f9f1bab
......@@ -275,7 +275,7 @@ IICLoop
;
IICDoOp ROUT
MOV R1, R1, ROR #24 ; Move xfer count to low byte
MOV R1, R1, ROR #24 ; Move bus number to low byte
MOV R2, #0
iicPush "R1,R2,iiclr" ; two words on stack are RepeatedStart flag and transfers remaining
......
s/vdu/vducursoft
View file @ 9f9f1bab
......@@ -100,6 +100,12 @@ PreWrchCursor
; state in top bit
STR R0, [WsPtr, #CursorStack]
MOV R2,R14
LDR R14, [WsPtr, #HALVideoFeatures]
TST R14, #2
BLEQ RemovePointer
MOV R14,R2
[ No26bitCode
MSR CPSR_c, R3 ; restore old I bit
MOVCS PC, R14 ; already off, so exit
......@@ -271,7 +277,21 @@ Cursor32loop
; out: R6 = new CursorFlags, R5,R7 preserved, all others undefined
;
PostWrchCursor
PostWrchCursor ROUT
LDR R6,[WsPtr, #HALVideoFeatures]
TST R6,#2
BNE %FT10
MOV R6,R14
MRS R4,CPSR
ORR R3,R4,#I32_bit
MSR CPSR_c,R3
BL RestorePointer
MSR CPSR_c,R4
MOV R14,R6
10
LDR R6, [WsPtr, #CursorFlags]
LDR R0, [WsPtr, #CursorStack]
MOVS R0, R0, LSL #1
......
s/vdu/vdudriver
View file @ 9f9f1bab
......@@ -160,6 +160,7 @@ ArthurVduDriver
VduInit ROUT
Push R14
LDR R0, =ZeroPage
LDR R14, [R0, #VideoPhysAddr]
ASSERT (ZeroPage :AND: 255) = 0
STRB R0, [R0, #OsbyteVars + :INDEX: VDUqueueItems] ;purge queue
STRB R0, [WsPtr, #ScreenBlankFlag] ; not blanked
......@@ -175,6 +176,7 @@ VduInit ROUT
STR R0, [WsPtr, #VduSaveAreaPtr] ; indicate no save area yet
STR R0, [WsPtr, #ClipBoxEnable] ; no clip box calculating
STRB R0, [WsPtr, #ExternalFramestore]
STR R14, [WsPtr, #TrueVideoPhysAddr] ; init TrueVideoPhysAddr for internal RAM/VRAM framestore case
Push "r4, r9, r12"
AddressHAL
......@@ -353,7 +355,14 @@ InitialiseMode Entry
MOV r0, #1 ; no need to check for soft reset,
SWI XOS_ReadSysInfo ; always use configured value
]
; at this stage, r0 = current screen mode either mode number or mode specifier
; lets give the HAL a chance to be fussy.
AddressHAL
CallHAL HAL_VideoStartupMode
01
MOV r1, r0
MOV r0, #ScreenModeReason_SelectMode
SWI XOS_ScreenMode
EXIT VC
......@@ -365,6 +374,7 @@ InitialiseMode Entry
SWIVC XOS_WriteI+0 ; and if we can't get mode 0, we're really fooked!!!
EXIT
;
;
;------------------------------------------------------------------------------
;
......@@ -779,7 +789,6 @@ mchsub_3
IssueService
TEQ R1, #0 ; was service claimed ?
BNE %FT03 ; no, so continue
CMP R0, #0 ; service claimed; generate error ?
Pull PC, EQ ; no, just exit (V=0 from CMP)
B %FT07 ; yes, then generate error
......@@ -815,7 +824,18 @@ mchsub_3
[ UseGraphicsV
LDRB R0, [WsPtr, #ExternalFramestore]
TEQ R0, #0
BNE %FT06 ; can't grow an external framestore
BEQ %FT05
; External framestore in use; does driver support growing/reallocating it?
Push "r1-r2,r4"
MOV r4, #GraphicsV_DisplayFeatures
BL CallGraphicsV
Pull "r1-r2,r4"
TST r0, #1<<5
BNE %FT08 ; realloc supported, assume driver can allocate required memory since it OK'd the mode
B %FT06 ; not supported, complain
05
]
; try to extend the amount of screen memory
......@@ -913,11 +933,47 @@ TV_Mode_string
; ConvertBankToAddress (was a bug!)
[ UseGraphicsV
Push "r0-r4"
Push "r0-r6"
MOV r4, #GraphicsV_DisplayFeatures
BL CallGraphicsV
; If driver handles memory allocation, must change mode before asking for memory
TST r0, #1<<5
ADDNE R0, R13, #wkwordsize+7*4 ; R0 -> VIDCList3
BLNE HardwareModeChange
MOV r4, #GraphicsV_FramestoreAddress
BL CallGraphicsV
TEQ r4, #0
BNE %FT581
[ {TRUE}
; for mapping in, round start address down and size up to megabyte boundaries
; r0 = physical start, r1= size
; so frame buffer is wholly contained within the mapped in area
MOV r3, #1<<20 ; 1 Megabyte
SUB r3, r3, #1 ; convert to mask
MOV r4, r1 ; remember what was asked for
AND r5, r0, r3 ; and offset from megabyte base
TST r1, r3 ; non integer megabyte?
BIC r2, r1, r3 ; (clear the bits)
ADDNE r2, r2, #1<<20 ; yes.. up to next megabyte
BIC r1, r0, r3 ; ensure megabyte boundary at start
MOV r0, #13 ; map in permanently
ORR r0, r0, #1:SHL:8 ; buffered, uncached
ORR r0, r0, #1:SHL:16+1:SHL:17 ; doubly map, access permission specified
SWI XOS_Memory
BVS %FT581
ADD r0, r1, r5 ; reconstruct base phys address
STR r0, [WsPtr, #TrueVideoPhysAddr] ; and update our copy
STR r4, [WsPtr, #TotalScreenSize] ; what we asked for
ADD r3, r3, r4 ; compute end
ADD r3, r3, r5 ; and allow offset dfrom start
STR r3, [WsPtr, #ScreenEndAddr] ; actual screen end
MOV r14, #1
B %FT582
|
MOV r1, r1, LSR #20 ; round size down to 1MB
MOV r2, r1, LSL #20
ADD r0, r0, #1:SHL:20 ; round addr up to 1MB
......@@ -929,11 +985,15 @@ TV_Mode_string
ORR r0, r0, #1:SHL:16+1:SHL:17 ; doubly map, access permission specified
SWI XOS_Memory
BVS %FT581
ADD r0, r1, r5 ; reconstruct base phys address
STR r0, [WsPtr, #TrueVideoPhysAddr] ; and update our copy
STR r2, [WsPtr, #TotalScreenSize]
ADD r3, r3, r2
STR r3, [WsPtr, #ScreenEndAddr]
MOV r14, #1
B %FT582
]
581
MOV r0, #128+2
SWI XOS_ReadDynamicArea
......@@ -942,7 +1002,7 @@ TV_Mode_string
STRVC r0, [WsPtr, #ScreenEndAddr]
MOV r14, #0
582
Pull "r0-r4"
Pull "r0-r6"
STRB r14, [WsPtr, #ExternalFramestore]
]
......@@ -1019,12 +1079,73 @@ TV_Mode_string
; finished doing other variables
[ :LNOT:UseGraphicsV
Push "R0-R3, R9, R12" ; preserve registers ready to make HAL call later
ADD R0, R13, #wkwordsize+6*4 ; R0 -> VIDCList3 (we have just pushed 6 regs)
|
ADD R0, R13, #wkwordsize ; R0 -> VIDCList3
]
; tell hardware to change mode, unless already done
MOV r4, #GraphicsV_DisplayFeatures
BL CallGraphicsV
TST r0, #1<<5
ADDEQ R0, R13, #wkwordsize ; R0 -> VIDCList3
BLEQ HardwareModeChange
ADD R13, R13, #PushedInfoSize ; junk stacked data
; for backward compatibility, show that video DMA is enabled in
; MEMC soft copy (DON'T call OS_UpdateMEMC, which would also
; make redundant call to HAL)
;
SavePSR R2
LDR R0, =ZeroPage
WritePSRc SVC_mode+I_bit+F_bit, R14
LDR R1, [R0, #MEMC_CR_SoftCopy]
ORR R1, R1, #(1 :SHL: 10)
STR R1, [R0, #MEMC_CR_SoftCopy]
RestPSR R2
BL SetVendDefault
LDR R1, [WsPtr, #ScreenEndAddr] ; need to reload cos corrupt
LDR R2, [WsPtr, #TotalScreenSize]
SUB R0, R1, R2 ; R0 = Vstart
BL SetVstart
MOV R0, #0
STRB R0, [WsPtr, #PointerShapeNumber]
STR R0, [WsPtr, #TeletextOffset]
STR R0, [WsPtr, #CursorStack] ; restore cursor on a mode
BL PalInit ; set default palette
BL UnblankScreen
BL SetMouseRectangle
BL FF
[ {FALSE} ;;; LCDPowerCtrl :LAND: :LNOT: STB
;;; mjsHAL no LCD support
;Switch the LCD on if LCD mode
Push "r0"
MOV R1, #0
LDRB R1, [R1, #LCD_Active]
ANDS R1, R1, #&7F ;Check the LCD mode bits only, not the single/dual panel bit
LDRNE R0, =(PortableControl_LCDEnable :OR: PortableControl_BacklightEnable)
LDRNE R1, =:NOT:(PortableControl_LCDEnable :OR: PortableControl_BacklightEnable)
SWINE XPortable_Control
Pull "r0"
]
MOV R1, #Service_ModeChange
BL IssueModeService
CLRV ; indicate no error
Pull PC ; return to caller
; *****************************************************************************
;
; HardwareModeChange - Tell the video driver to change the mode
;
; in: R0 = VIDC list
;
; out: All regs preserved
;
HardwareModeChange
Push "R0-R4, LR"
;adjust vertical porch parameters in VIDCList3 for TVVertical (from *TV)
;
......@@ -1074,64 +1195,11 @@ TV_Mode_string
;kernel/HAL split - call the HAL to program video controller for mode,
;
[ UseGraphicsV
MOV R4, #GraphicsV_SetMode
BL CallGraphicsV
|
AddressHAL
CallHAL HAL_VideoSetMode
Pull "R0-R3, R9, R12" ; restore registers after HAL call
]
ADD R13, R13, #PushedInfoSize ; junk stacked data
; for backward compatibility, show that video DMA is enabled in
; MEMC soft copy (DON'T call OS_UpdateMEMC, which would also
; make redundant call to HAL)
;
SavePSR R2
LDR R0, =ZeroPage
WritePSRc SVC_mode+I_bit+F_bit, R14
LDR R1, [R0, #MEMC_CR_SoftCopy]
ORR R1, R1, #(1 :SHL: 10)
STR R1, [R0, #MEMC_CR_SoftCopy]
RestPSR R2
BL SetVendDefault
LDR R1, [WsPtr, #ScreenEndAddr] ; need to reload cos corrupt
LDR R2, [WsPtr, #TotalScreenSize]
SUB R0, R1, R2 ; R0 = Vstart
BL SetVstart
MOV R0, #0
STRB R0, [WsPtr, #PointerShapeNumber]
STR R0, [WsPtr, #TeletextOffset]
STR R0, [WsPtr, #CursorStack] ; restore cursor on a mode
Pull "R0-R4, PC"
BL PalInit ; set default palette
BL UnblankScreen
BL SetMouseRectangle
BL FF
[ {FALSE} ;;; LCDPowerCtrl :LAND: :LNOT: STB
;;; HAL no LCD support
;Switch the LCD on if LCD mode
Push "r0"
MOV R1, #0
LDRB R1, [R1, #LCD_Active]
ANDS R1, R1, #&7F ;Check the LCD mode bits only, not the single/dual panel bit
LDRNE R0, =(PortableControl_LCDEnable :OR: PortableControl_BacklightEnable)
LDRNE R1, =:NOT:(PortableControl_LCDEnable :OR: PortableControl_BacklightEnable)
SWINE XPortable_Control
Pull "r0"
]
MOV R1, #Service_ModeChange
BL IssueModeService
CLRV ; indicate no error
Pull PC ; return to caller
MakeErrorBlock BadMODE
......@@ -1278,7 +1346,6 @@ PushModeInfoCommonNoService
LDR r2, [r3, #0] ; is it type 3? (actually, it always should be now)
TEQ r2, #3
BNE %FT58
LDR r10, [r3, #VIDCList3_SyncPol]
TST r10, #SyncPol_InterlaceSpecified
BNE %FT56 ; Interlace already specified
......
s/vdu/vdugrafv
View file @ 9f9f1bab
......@@ -45,7 +45,7 @@ MOSGraphicsV_Table
GVEntry SetDMAAddress ; 6
GVEntry VetMode ; 7
GVEntry DisplayFeatures ; 8
MOV pc, lr ; 9
GVEntry FramestoreAddress ; 9
GVEntry WritePaletteEntry ; 10
GVEntry WritePaletteEntries ; 11
GVEntry ReadPaletteEntry ; 12
......@@ -136,6 +136,16 @@ GV_DisplayFeatures
MOV r2, r0
Pull "r0,r1,r3, r9, pc"
GV_FramestoreAddress
Push "r3, r9, lr"
AddressHAL WsPtr
MOV r0, #0
MOV r1, #0
CallHAL HAL_VideoFramestoreAddress
ORRS r2, r0, r1
MOVNE r4, #0
Pull "r3, r9, pc"
GV_WritePaletteEntry
Push "r0-r3, r9, lr"
AddressHAL WsPtr
......
s/vdu/vdupointer
View file @ 9f9f1bab
......@@ -604,4 +604,60 @@ FlushMouse ROUT
LTORG
; *****************************************************************************
;
; RemovePointer - Remove soft mouse pointer from screen
;
RemovePointer ROUT
STMFD R13!,{R0-R6,R14}
LDRB R3, [WsPtr, #PointerShapeNumber]
TST R3, #&7F
MOVNE R0, #0
MOVNE R4, #GraphicsV_UpdatePointer
BLNE CallGraphicsV
LDMFD R13!,{R0-R6,PC}
; *****************************************************************************
;
; RestorePointer - Restore soft mouse pointer to previous state
;
RestorePointer ROUT
STMFD R13!,{R0-R6,R14}
LDRB R6, [WsPtr, #PointerShapeNumber]
ANDS R6, R6, #&7F
BEQ %FT10
ADD R3, WsPtr, #PointerShapes-4
LDR R3, [R3, R6, LSL #2] ; R3 -> current shape block (R6 = shape 1..4)
MOV R0, #1 ; R0 = flags, set pointer on (bit 0 = 1)
LDR R1, [WsPtr, #PointerShapeLA] ; last shape buffer given to HAL
LDR R4, [R3, #PointerBuffLA] ; shape buffer we're about to give
TEQ R1, R4 ; same as last time?
STRNE R4, [WsPtr, #PointerShapeLA] ; update
ORRNE R0, R0, #2 ; flag new shape (bit 1 = 1)
LDR R1, [WsPtr, #PointerX]
LDR R4, [WsPtr, #PointerXEigFactor]
MOV R1, R1, ASR R4 ; R1 = pointer x, pixels
LDRB R4, [R3, #PointerActiveX]
SUB R1, R1, R4 ; R1 = pointer x, adjusted for active point
LDR R2, [WsPtr, #PointerY]
LDR R4, [WsPtr, #DisplayYEigFactor]
LDR R5, [WsPtr, #DisplayYWindLimit] ; R5 = display height -1
SUB R2, R5, R2, ASR R4 ; R2 = pointer y, pixels, inverted
LDRB R4, [R3, #PointerActiveY]
SUB R2, R2, R4 ; R2 = pointer y, adjusted for active point
; and it's up to the HAL to handle clipping according to h/w capabilities
MOV R4, #GraphicsV_UpdatePointer
BL CallGraphicsV
10
LDMFD R13!,{R0-R6,PC}
END
s/vdu/vduwrch
View file @ 9f9f1bab
......@@ -165,8 +165,13 @@ DefaultColours ROUT
[ {TRUE} ; TMD 25-Jun-93 - change default text colour in 16bpp to &7FFF, and 32bpp to &00FFFFFF
LDR r14, =&FFFF
CMP fore, r14
[ InverseTextTransparency ; test to invert text transparency when transparency channel inverted
ORREQ fore, fore, #&8000 ; &7FFF -> &FFFF
ORRHI fore, fore, #&FF000000 ; &00FFFFFF -> &FFFFFFFF
|
BICEQ fore, fore, #&8000 ; &FFFF -> &7FFF
BICHI fore, fore, #&FF000000 ; &FFFFFFFF -> &00FFFFFF
]
]
MOV back, #0
ADD R14, WsPtr, #TForeCol
......@@ -2186,15 +2191,13 @@ SetVstart
SUB r1, r0, r2
LDR r2, [WsPtr, #TotalScreenSize]
ADD r1, r1, r2 ; now we have offset of Vstart in video RAM
LDR r2, =ZeroPage
LDR r2, [r2, #VideoPhysAddr]
LDR r2, [WsPtr, #TrueVideoPhysAddr]
ADD r1, r1, r2 ; now we have physical address of Vstart
MOV r0, #HALDAG_VStart
B Do_HALDAG
SetVendDefault
LDR r2, =ZeroPage
LDR r2, [r2, #VideoPhysAddr]
LDR r2, [WsPtr, #TrueVideoPhysAddr]
LDR r1, [WsPtr, #TotalScreenSize]
ADD r1, r1, r2 ; physical address of Vend
MOV r0, #HALDAG_VEnd
......@@ -2215,8 +2218,7 @@ SetVrender
ADD r1, r1, r0 ; add on teletext bank offset
CMP r1, r2 ; if out of range
SUBCS r1, r1, r2 ; then subtract total size
LDR r2, =ZeroPage
LDR r2, [r2, #VideoPhysAddr] ; now we have physical address
LDR r2, [WsPtr, #TrueVideoPhysAddr] ; now we have physical address
ADD r1, r1, r2
MOV r0, #HALDAG_VRender
B Do_HALDAG
......@@ -2231,8 +2233,7 @@ SetVinit
ADD r1, r1, r0 ; add on teletext bank offset
CMP r1, r2 ; if out of range
SUBCS r1, r1, r2 ; then subtract total size
LDR r2, =ZeroPage
LDR r2, [r2, #VideoPhysAddr] ; now we have physical address
LDR r2, [WsPtr, #TrueVideoPhysAddr] ; now we have physical address
ADD r1, r1, r2
MOV r0, #HALDAG_VInit
Do_HALDAG
......
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