Commit cca9b9b6 authored by Kevin Bracey's avatar Kevin Bracey
Browse files

* RAM build of CLib now squeezed.

* First attempt at a working 32-bit overlay manager. Untested.

Version 5.19. Not tagged
parent e6f4dbc1
......@@ -58,6 +58,7 @@ CP = copy
LD = link
LIBFILE = libfile
MKDIR = cdir
MODSQZ = modsqz
OBJASM = objasm
RM = remove
WIPE = -wipe
......@@ -540,6 +541,7 @@ lib.romastubs: rlib.s.rl_stub_a
# Non-exported libraries:
lib.clib: ${CLIB_MOD_OBJS}
${LD} ${LDFLAGS} -o $@ -module ${CLIB_MOD_OBJS}
${MODSQZ} $@
# Derived headers:
derived.swis: s.makehswis h.swisheader s.swioptions
......
......@@ -12,9 +12,9 @@
Module_MajorVersion SETS "5.19"
Module_Version SETA 519
Module_MinorVersion SETS ""
Module_Date SETS "16 Oct 2000"
Module_ApplicationDate2 SETS "16-Oct-00"
Module_ApplicationDate4 SETS "16-Oct-2000"
Module_Date SETS "17 Oct 2000"
Module_ApplicationDate2 SETS "17-Oct-00"
Module_ApplicationDate4 SETS "17-Oct-2000"
Module_FullVersion SETS "5.19"
Module_HelpVersion SETS "5.19 (16 Oct 2000)"
Module_HelpVersion SETS "5.19 (17 Oct 2000)"
END
......@@ -5,15 +5,15 @@
*/
#define Module_MajorVersion_CMHG 5.19
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 16 Oct 2000
#define Module_Date_CMHG 17 Oct 2000
#define Module_MajorVersion "5.19"
#define Module_Version 519
#define Module_MinorVersion ""
#define Module_Date "16 Oct 2000"
#define Module_Date "17 Oct 2000"
#define Module_ApplicationDate2 "16-Oct-00"
#define Module_ApplicationDate4 "16-Oct-2000"
#define Module_ApplicationDate2 "17-Oct-00"
#define Module_ApplicationDate4 "17-Oct-2000"
#define Module_FullVersion "5.19"
#define Module_HelpVersion "5.19 (16 Oct 2000)"
#define Module_HelpVersion "5.19 (17 Oct 2000)"
......@@ -158,6 +158,9 @@ WorkSpaceEnd DCD |Overlay$$Data$$Limit|
LDR IP, WorkSpace
ADD IP, IP, #Work_RSave
STMIA IP, {R0-R8,LR}
SUB LR, LR, PC ; remove PSR bits from LR (if there)
ADD LR, PC, LR ; (LR left +4)
; 1. Check workspace is big enough for me. Only check if debugging
; LDR R1, WorkSpace
; LDR R2, WorkSpaceEnd
......@@ -183,7 +186,7 @@ strip_tail1
MOV R0, #0
STRB R0, [R1, R2]
ADDS PC, LR, #ZeroInitCodeOffset
ADD PC, LR, #ZeroInitCodeOffset-4
;NoMem DCD TopBit:OR:Error_OutOfMemory
; = "Overlay$$Data area too small", 0
......@@ -228,7 +231,15 @@ InitDoneFlag DCD 0
InitDone
LDR R3, WorkSpace
[ {CONFIG}=26
MOV R4, #0
MRS R4, CPSR
TST R4, #2_11100
MOVNE R8, LR
BICEQ R8, LR, #PSRmask ; Clear psr
|
BIC R8, LR, #PSRmask ; Clear psr
]
LDR R0, [R8, #-8] ; saved R14... (is end of PCIT)
STR R0, [R3, #Work_LRSave] ; ...save it here ready for retry
LDR R0, STRLR ; look for this...
......@@ -237,9 +248,16 @@ InitDone
CMP R2, R0 ; must stop on guard word...
BNE %B01
ADD R1, R1, #4 ; gone one too far...
[ {CONFIG}=26
AND R0, LR, #PSRmask ; psr at point of call...
ORR R1, R1, R0 ; combine with address branched via
|
TST R4, #2_11100
ANDEQ R0, LR, #PSRmask ; psr at point of call...
ORREQ R1, R1, R0 ; combine with address branched via
]
STR R1, [R3, #Work_PCSave] ; where to resume at
load_segment
; IP -> the register save area; R8 -> the PCIT section of the segment to load.
; First re-initialise the PCIT section (if any) which clashes with this one...
......
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