Commit dc7c6198 authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Refactor IIC calls to use RISCOS_IICOpV

- Comments and symbolic names for RTC register bits copied over from OMAP4 sources.
- Delete dead function ReadTimeForNVRAM.
- Use RTCFormatFlags_BCD_NeedsYearHelp flag for year 2070 compatibility.
- Moved CallOS macro into a header.
Tested on a Beagleboard xM, clock still worked over a power cycle.

Version 0.90. Tagged as 'OMAP3-0_90'
parent 8bddba4a
;
; This file is automatically maintained by srccommit, do not edit manually.
; Last processed by srccommit version: 1.1.
;
GBLS Module_MajorVersion
GBLA Module_Version
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
GBLS Module_ApplicationDate
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.89"
Module_Version SETA 89
Module_MinorVersion SETS ""
Module_Date SETS "28 Sep 2013"
Module_ApplicationDate SETS "28-Sep-13"
Module_ComponentName SETS "OMAP3"
Module_ComponentPath SETS "castle/RiscOS/Sources/HAL/OMAP3"
Module_FullVersion SETS "0.89"
Module_HelpVersion SETS "0.89 (28 Sep 2013)"
END
/* (0.89)
/* (0.90)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.89
#define Module_MajorVersion_CMHG 0.90
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 28 Sep 2013
#define Module_Date_CMHG 01 Nov 2013
#define Module_MajorVersion "0.89"
#define Module_Version 89
#define Module_MajorVersion "0.90"
#define Module_Version 90
#define Module_MinorVersion ""
#define Module_Date "28 Sep 2013"
#define Module_Date "01 Nov 2013"
#define Module_ApplicationDate "28-Sep-13"
#define Module_ApplicationDate "01-Nov-13"
#define Module_ComponentName "OMAP3"
#define Module_ComponentPath "castle/RiscOS/Sources/HAL/OMAP3"
#define Module_FullVersion "0.89"
#define Module_HelpVersion "0.89 (28 Sep 2013)"
#define Module_LibraryVersionInfo "0:89"
#define Module_FullVersion "0.90"
#define Module_HelpVersion "0.90 (01 Nov 2013)"
#define Module_LibraryVersionInfo "0:90"
......@@ -24,9 +24,23 @@
GET Hdr:GPIODevice
GET Hdr:SDHCIDevice
GET Hdr:BMUDevice
GET Hdr:RTCDevice
sb RN 9
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
; Per-SDHCI workspace
^ 0
......@@ -45,6 +59,13 @@ BMUWS # 4 ; pointer to HAL workspace
BMUParams # 4 ; Per-device params
BMUSize * :INDEX:@
; Per-RTC workspace
^ 0
RTCDevice # HALDevice_RTC_Size ; see Hdr:RTCDevice
RTCDeviceHAL_SB # 4 ; pointer to HAL workspace for HAL calls
RTCSize * :INDEX:@
^ 0,sb
BoardConfig # BoardConfig_Size ; NOTE: Almost all code assumes the board config is at the start. You have been warned!
OSheader # 4
......@@ -111,6 +132,7 @@ NICWS # NIC_DeviceSize
CPUClkWS # CPUClk_WorkspaceSize
GPIOWS # HALDevice_GPIO_Size
NVRAMWS # HALDeviceSize
RTCWS # RTCSize
SDIOWS # SDHCISize * MaxSDControllers
BMUWS1 # BMUSize
......
......@@ -44,13 +44,6 @@
IMPORT HAL_IRQClear
IMPORT HAL_CounterDelay
MACRO
CallOS $entry
ASSERT $entry <= HighestOSEntry
MOV lr, pc
LDR pc, OSentries + 4*$entry
MEND
; A brief rundown of OMAP HAL audio support:
; Audio in/out is typically provided via the TWL/TPS companion chip, using "port 2" of the TWL/TPS audio subsystem. "port 2" provides a I2S/TDM-compatible interface, capable of operating at a variety of sample rates.
; Two interfaces are used to link the audio subsystem to the OMAP: I2C is used to program the audio subsystem, and I2S is used to transmit & receive data (using the McBSP module on the OMAP side).
......
......@@ -45,19 +45,6 @@
IMPORT IIC_DoOp_Poll
IMPORT HAL_CounterDelay
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
; TPS module IIC addresses (some of them, at least)
MADC_IIC * &4a
BCI_IIC * &4a
......
......@@ -72,19 +72,6 @@ MoreDebug SETL Debug :LAND: {FALSE}
ADD pc, v8, ip
MEND
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
rom_checkedout_ok
; On entry, v8 -> OS entry table, sb -> board config
; Register the attached RAM
......
......@@ -41,14 +41,6 @@
IMPORT memcpy
IMPORT GPIOx_SetAndEnableIRQ
; This macro should really go in a header somewhere!
MACRO
CallOS $entry
ASSERT $entry <= HighestOSEntry
MOV lr, pc
LDR pc, OSentries + 4*$entry
MEND
NIC_Init
; a1 = GPMC CS
; a2 = GPMC configuration
......
......@@ -45,13 +45,6 @@
IMPORT HAL_IRQClear
IMPORT HAL_CounterDelay
MACRO
CallOS $entry
ASSERT $entry <= HighestOSEntry
MOV lr, pc
LDR pc, OSentries + 4*$entry
MEND
; Pandora audio driver
;
; The Pandora is different to the other OMAP boards. Instead of having the TPS connected to McBSP2 and using it for both input and output, things are set up as follows:
......
......@@ -35,12 +35,7 @@
EXPORT RTC_Init
IMPORT TPSRead
IMPORT TPSWrite
; Note - debug stuff won't work since we don't get passed a HAL workspace pointer!
; IMPORT DebugHALPrint
; IMPORT DebugHALPrintReg
; IMPORT DebugMemDump
; IMPORT DebugHALPrintByte
IMPORT memcpy
; TWL/TPS RTC IIC address
TPSRTC_IIC * &4b
......@@ -50,27 +45,39 @@ SECONDS_REG * &1C
RTC_CTRL_REG * &29
RTC_STATUS_REG * &2a
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
; RTC_CTRL_REG bitfields
RTC_CTRL_STOP_RTC_M * (1 << 0)
RTC_CTRL_ROUND_30S_M * (1 << 1)
RTC_CTRL_AUTO_COMP_M * (1 << 2)
RTC_CTRL_MODE_12_24_M * (1 << 3)
RTC_CTRL_TEST_MODE_M * (1 << 4)
RTC_CTRL_SET_32_COUNTER_M * (1 << 5)
RTC_CTRL_GET_TIME_M * (1 << 6)
; RTC_STATUS_REG bitfields
RTC_STATUS_RUN_M * (1 << 1)
RTC_STATUS_1S_EVENT_M * (1 << 2)
RTC_STATUS_1M_EVENT_M * (1 << 3)
RTC_STATUS_1H_EVENT_M * (1 << 4)
RTC_STATUS_1D_EVENT_M * (1 << 5)
RTC_STATUS_ALARM_M * (1 << 6)
RTC_STATUS_POWER_UP_M * (1 << 7)
RTC_Init
; Just register our HAL Device with the OS
ADRL a1, RTCWS
ADR a2, RTCDeviceTemplate
MOV a3, #RTCSize
Push "lr"
BL memcpy
Pull "lr"
STR sb, [a1, #RTCDeviceHAL_SB]
MOV a1, #0
ADR a2, RTCDevice
CallOS OS_AddDevice, tailcall
RTCDevice
RTCDeviceTemplate
DCW HALDeviceType_SysPeri + HALDeviceSysPeri_RTC
DCW HALDeviceID_RTC_TPS65950
DCD HALDeviceBus_Ser + HALDeviceSerBus_IIC
......@@ -86,7 +93,10 @@ RTCDevice
DCD 0
% 8
DCB RTCTimeFormat_BCD
DCB RTCFormatFlags_BCD_1BasedDay+RTCFormatFlags_BCD_1BasedMonth+RTCFormatFlags_BCD_YearLOIsGood ; todo - add RTCFormatFlags_BCD_NeedsYearHelp once NVRAM is implemented
DCB RTCFormatFlags_BCD_1BasedDay + \
RTCFormatFlags_BCD_1BasedMonth + \
RTCFormatFlags_BCD_YearLOIsGood + \
RTCFormatFlags_BCD_NeedsYearHelp
% 2
DCD RTCReadTime
DCD RTCWriteTime
......@@ -110,18 +120,19 @@ RTCReadTime
; In:
; a1 = HALDevice ptr
; a2 = RTCTimeStruct ptr
; a3 = IICOp func ptr
; a4 = kernel workspace ptr
; Out:
; a1 = return code
; RTCTimeStruct updated
Push "v1-v3,lr"
MOV v1, a3
MOV v2, a4
Push "v1,v3,sb,lr"
LDR sb, [a1, #RTCDeviceHAL_SB]
LDR v1, OSentries+4*OS_IICOpV ; for TPSRead/TPSWrite
MOV v3, a2
; Reading the time safely involves several transfers:
; 1. Read RTC_STATUS_REG. If bit 1 is clear, the RTC is stopped and we can just assume its contents are invalid.
; 2. Set RTC_CTRL_REG=&41 (RTC running, GET_TIME set, 24hr mode). GET_TIME will read the time from the RTC circuitry and latch it into the time registers (the regular time registers, NOT the alarm ones as stated by the manual!)
; 1. Read RTC_STATUS_REG. If bit 1 is clear, the RTC is stopped and we can just
; assume its contents are invalid.
; 2. Set RTC_CTRL_REG=&41 (RTC running, GET_TIME set, 24hr mode). GET_TIME will read
; the time from the RTC circuitry and latch it into the time registers (the regular
; time registers, NOT the alarm ones as stated by the manual!)
; 3. Read the time regs to read latched time.
; There's no need to clear GET_TIME either, as it is cleared automatically by the HW.
MOV a1, #TPSRTC_IIC*2
......@@ -134,11 +145,11 @@ RTCReadTime
LDRB ip, [a2]
MOV a1, #RTCRetCode_InvalidTime
MOVNE a1, #RTCRetCode_Error
EOR ip, ip, #2
TSTEQ ip, #2
EOR ip, ip, #RTC_STATUS_RUN_M
TSTEQ ip, #RTC_STATUS_RUN_M
ADDNE sp, sp, #4
Pull "v1-v3,pc", NE
MOV ip, #&41
Pull "v1,v3,sb,pc", NE
MOV ip, #(RTC_CTRL_GET_TIME_M + RTC_CTRL_STOP_RTC_M)
STR ip, [a2]
MOV a1, #TPSRTC_IIC*2
MOV a4, #RTC_CTRL_REG
......@@ -146,7 +157,7 @@ RTCReadTime
CMP a1, #IICStatus_Completed
MOVNE a1, #RTCRetCode_Error
ADD sp, sp, #4
Pull "v1-v3,pc", NE
Pull "v1,v3,sb,pc", NE
MOV a1, #TPSRTC_IIC*2
; We can read the time directly into the RTCTimeStruct buffer
ASSERT RTCTimeStruct_BCD_Minutes=RTCTimeStruct_BCD_Seconds+1
......@@ -160,34 +171,25 @@ RTCReadTime
BL TPSRead
CMP a1, #IICStatus_Completed
MOVNE a1, #RTCRetCode_Error
Pull "v1-v3,pc", NE
ASSERT IICStatus_Completed = 0
STRB a1, [v3, #RTCTimeStruct_BCD_Centiseconds] ; No centisecond time
; Construct a fakey YearHI by looking at YearLO
; Anything 70 or above is considered 1970+, else 2000+
; This should work OK, since RISC OS clamps the time to 1970 for unix compatability (or it does on boot, at least)
LDRB a2, [v3, #RTCTimeStruct_BCD_YearLO]
CMP a2, #&70
MOVGE a3, #&19
MOVLT a3, #&20
STRB a3, [v3, #RTCTimeStruct_BCD_YearHI]
STREQB a1, [v3, #RTCTimeStruct_BCD_Centiseconds] ; No centisecond time
STREQB a1, [v3, #RTCTimeStruct_BCD_YearHI] ; Kernel gives year help
ASSERT RTCRetCode_OK = 0
Pull "v1-v3,pc"
Pull "v1,v3,sb,pc"
RTCWriteTime
; In:
; a1 = HALDevice ptr
; a2 = RTCTimeStruct ptr
; a3 = IICOp func ptr
; a4 = kernel workspace ptr
; Out:
; a1 = return code
Push "v1-v3,lr"
MOV v1, a3
MOV v2, a4
Push "v1,v3,sb,lr"
LDR sb, [a1, #RTCDeviceHAL_SB]
LDR v1, OSentries+4*OS_IICOpV ; for TPSRead/TPSWrite
MOV v3, a2
; Writing the time safely involves several transfers:
; 1. Write 0 to RTC_CTRL_REG to stop the clock (just in case there are any issues with the clock updating while it's being written to)
; 1. Write 0 to RTC_CTRL_REG to stop the clock (just in case there are any issues with
; the clock updating while it's being written to)
; 2. Write the new time values
; 3. Write 1 to RTC_CTRL_REG to start the clock
MOV a1, #TPSRTC_IIC*2
......@@ -200,7 +202,7 @@ RTCWriteTime
CMP a1, #IICStatus_Completed
MOVNE a1, #RTCRetCode_Error
ADDNE sp, sp, #4
Pull "v1-v3,pc", NE
Pull "v1,v3,sb,pc", NE
MOV a1, #TPSRTC_IIC*2
; We can write the time directly from the RTCTimeStruct buffer
ASSERT RTCTimeStruct_BCD_Minutes=RTCTimeStruct_BCD_Seconds+1
......@@ -226,9 +228,9 @@ RTCWriteTime
CMP a1, #IICStatus_Completed
MOVNE a1, #RTCRetCode_Error
ADDNE sp, sp, #4
Pull "v1-v3,pc", NE
Pull "v1,v3,sb,pc", NE
01
MOV a3, #1
MOV a3, #RTC_CTRL_STOP_RTC_M
STR a3, [sp]
MOV a2, sp
MOV a4, #RTC_CTRL_REG
......@@ -238,21 +240,6 @@ RTCWriteTime
ASSERT RTCRetCode_OK = IICStatus_Completed
MOVNE a1, #RTCRetCode_Error
ADD sp, sp, #4
Pull "v1-v3,pc"
EXPORT ReadTimeForNVRAM
IMPORT IIC_DoOp_Poll
; int ReadTimeForNVRAM (struct rtctime*)
; Reads BCD time into given rtctime struct
; Returns zero on success, non-zero on failure
ReadTimeForNVRAM
MOV a2, a1
ADRL a1, RTCDevice
LDR a3, HALInitialised
CMP a3, #0
ADREQL a3, IIC_DoOp_Poll
LDRNE a3, OSentries + 4 * OS_IICOpV
B RTCReadTime
Pull "v1,v3,sb,pc"
END
......@@ -42,13 +42,6 @@
IMPORT HAL_FIQClear
IMPORT HAL_CounterDelay
MACRO
CallOS $entry
ASSERT $entry <= HighestOSEntry
MOV lr, pc
LDR pc, OSentries + 4*$entry
MEND
; Flag to enable gobs of debug output
GBLL SDMADebug
SDMADebug SETL {FALSE}
......
......@@ -62,13 +62,6 @@
IMPORT GPIOx_SetOutput
IMPORT HAL_CounterDelay
MACRO
CallOS $entry
ASSERT $entry <= HighestOSEntry
MOV lr, pc
LDR pc, OSentries + 4*$entry
MEND
Video_Init
; Configure GPIO pins so we can turn the DVI framer on/off
LDRB a1, [sb, #BoardConfig_VideoGPIO]
......
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