Commit 7c84c62b authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Modification to RISCOS_IICOpV

Now assumes an IICStatus return, per Kernel-5_35-4_79_2_196.
I2C sources lined up to column 17.
Built, but not tested.

Version 0.89. Tagged as 'OMAP3-0_89'
parent 976d3bf5
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.88"
Module_Version SETA 88
Module_MajorVersion SETS "0.89"
Module_Version SETA 89
Module_MinorVersion SETS ""
Module_Date SETS "17 Aug 2013"
Module_ApplicationDate SETS "17-Aug-13"
Module_Date SETS "28 Sep 2013"
Module_ApplicationDate SETS "28-Sep-13"
Module_ComponentName SETS "OMAP3"
Module_ComponentPath SETS "castle/RiscOS/Sources/HAL/OMAP3"
Module_FullVersion SETS "0.88"
Module_HelpVersion SETS "0.88 (17 Aug 2013)"
Module_FullVersion SETS "0.89"
Module_HelpVersion SETS "0.89 (28 Sep 2013)"
END
/* (0.88)
/* (0.89)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.88
#define Module_MajorVersion_CMHG 0.89
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 17 Aug 2013
#define Module_Date_CMHG 28 Sep 2013
#define Module_MajorVersion "0.88"
#define Module_Version 88
#define Module_MajorVersion "0.89"
#define Module_Version 89
#define Module_MinorVersion ""
#define Module_Date "17 Aug 2013"
#define Module_Date "28 Sep 2013"
#define Module_ApplicationDate "17-Aug-13"
#define Module_ApplicationDate "28-Sep-13"
#define Module_ComponentName "OMAP3"
#define Module_ComponentPath "castle/RiscOS/Sources/HAL/OMAP3"
#define Module_FullVersion "0.88"
#define Module_HelpVersion "0.88 (17 Aug 2013)"
#define Module_LibraryVersionInfo "0:88"
#define Module_FullVersion "0.89"
#define Module_HelpVersion "0.89 (28 Sep 2013)"
#define Module_LibraryVersionInfo "0:89"
......@@ -22,8 +22,6 @@
GET Hdr:OSEntries
GET Hdr:HALEntries
GET Hdr:FSNumbers
GET Hdr:NewErrors
GET hdr.omap3530
GET hdr.StaticWS
......@@ -746,20 +744,7 @@ HAL_VideoIICOp
BEQ %FT10
LDR a3, OSentries+4*OS_IICOpV
BLX a3
; Unmap RISC OS error numbers to IICStatus return codes
ASSERT IICStatus_Completed = 0
TEQ a1, #0
LDRNE a1, [a1]
LDRNE lr, =ErrorNumber_IIC_NoAcknowledge
SUBNE a1, a1, lr ; 0/1/2 = NoAck/Error/Busy
USATNE a1, #2, a1 ; 4+ => 3 = Error
ADRNE lr, %FT05
LDRNEB a1, [lr, a1]
B %FT20
05
ASSERT (ErrorNumber_IIC_Error - ErrorNumber_IIC_NoAcknowledge) = 1
ASSERT (ErrorNumber_IIC_Busy - ErrorNumber_IIC_NoAcknowledge) = 2
DCB IICStatus_NoACK, IICStatus_Error, IICStatus_Busy, IICStatus_Error
10
BL IIC_DoOp_Poll
20
......
......@@ -33,8 +33,8 @@
; For the majority of uses, v1 simply needs to be initialised as follows:
; LDR v1, OSentries+4*OS_IICOpV
; i.e. the IIC transfer will be performed on IIC bus 0, via RISCOS_IICOpV. This means that 0
; will be returned on success, or an OS error block pointer on failure!
; i.e. the IIC transfer will be performed on IIC bus 0, via RISCOS_IICOpV,
; returning an IICStatus.
; When using OS_IICOpV, v2 can be left uninitialised.
; TODO - Tidy this up - TPSRead/TPSWrite can simply choose for themselves whether to use OS_IICOpV or IIC_DoOp_Poll
......
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