Commit 12f9bc43 authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Fix hang on boot in OMAP3 HAL

Detail:
  PRCM.s - This file missed my checkin last night. Contains some rather important code that was moved there from USB.s, for initialising DPLL5.
Admin:
  Tested on rev C2 beagleboard. HAL code in CVS should now match what's on my machine!


Version 0.20. Tagged as 'OMAP3-0_20'
parent 17e509d7
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.19"
Module_Version SETA 19
Module_MajorVersion SETS "0.20"
Module_Version SETA 20
Module_MinorVersion SETS ""
Module_Date SETS "24 Jan 2010"
Module_ApplicationDate SETS "24-Jan-10"
Module_ComponentName SETS "OMAP3"
Module_ComponentPath SETS "castle/RiscOS/Sources/HAL/OMAP3"
Module_FullVersion SETS "0.19"
Module_HelpVersion SETS "0.19 (24 Jan 2010)"
Module_FullVersion SETS "0.20"
Module_HelpVersion SETS "0.20 (24 Jan 2010)"
END
/* (0.19)
/* (0.20)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.19
#define Module_MajorVersion_CMHG 0.20
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 24 Jan 2010
#define Module_MajorVersion "0.19"
#define Module_Version 19
#define Module_MajorVersion "0.20"
#define Module_Version 20
#define Module_MinorVersion ""
#define Module_Date "24 Jan 2010"
......@@ -18,6 +18,6 @@
#define Module_ComponentName "OMAP3"
#define Module_ComponentPath "castle/RiscOS/Sources/HAL/OMAP3"
#define Module_FullVersion "0.19"
#define Module_HelpVersion "0.19 (24 Jan 2010)"
#define Module_LibraryVersionInfo "0:19"
#define Module_FullVersion "0.20"
#define Module_HelpVersion "0.20 (24 Jan 2010)"
#define Module_LibraryVersionInfo "0:20"
......@@ -91,6 +91,29 @@ PRCM_SetClocks
MOVEQ v3, v3, LSR #1
STR a4, sys_clk
STR v3, Timer_DelayMul
; Use the sys_clk value to configure DPLL5 to generate a 120MHz clock
; sys_clk should be either 12MHz, 13MHz, or 19.2MHz
CMP v3, #130 ; DelayMul is an easy value to compare against
LDR a1, L4_ClockMan_Log
MOVNE a2, #11 ; 12MHz -> 1MHz, 19.2MHz -> 1.6MHz
MOVEQ a2, #12 ; 13MHz -> 1MHz
LDR a3, =CM_CLKSEL4_PLL
ORRLE a2, a2, #120:SHL:8 ; 1MHz -> 120MHz
ORRGT a2, a2, #75:SHL:8 ; 1.6MHz -> 120MHz
STR a2, [a1, a3]
LDR a3, =CM_CLKSEL5_PLL
MOV a2, #1 ; Divide by 1
STR a2, [a1, a3]
LDR a3, =CM_CLKEN2_PLL
MOVLE a2, #&37 ; Fint=1MHz, FREQSEL=3
MOVGT a2, #&67 ; Fint=1.6MHz, FREQSEL=6
STR a2, [a1, a3]
; Wait for lock
5
LDR a3, =CM_IDLEST2_CKGEN
LDR a2, [a1, a3]
TST a2, #1
BEQ %BT5
Pull "v1-v4,pc"
PRCM_GetFreqSel
......
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