GitLab

Detail:
  hdr/CPUClk, hdr/SR37x, s/Boot, s/CPUClk, s/SR37x - Modifed CPU clock drivers to allow the core speed & voltage to be reset to the power on defaults prior to reset/poweroff. This fixes an issue seen on Pandora where Linux will often fail to boot after RISC OS has been run, presumably due to VDD1 being too low for the initial clock speed Linux switches to.
  s/Boot - Place EHCI PHY in reset prior to reset/power off. May help with a reported issue of USB host being unreliable after RISC OS has been run (although reset/poweroff should reset the GPIO anyway)
Admin:
  Tested on Pandora & BB-xM


Version 0.82. Tagged as 'OMAP3-0_82'