GitLab

* Much of the SMHC driver code is moved out to a separate library, SMHCLib,
  to facilitate code re-use with the RK3399 port.
* Refactor most assembly parts of SD HAL device into C, adapting to support
  arbitrary controller parameters at runtime, rather than being hard-coded to
  controller 0.
* Add power and pin configuration and discovery of controller 1 (for WiFi) and
  2 (for eMMC).
* Redesign DMA algorithm to use relatively small, double-banked buffers of
  cached RAM. This reduces overall memory requirements from 16 MB to 528 K
  per controller (avoiding memory exhaustion in PCI Manager), allows the
  transfer length limit to be lifted to 32 MB (the maximum that can be
  generated by SDFS - DiscOps larger than that are split into 32 MB
  operations) and removes a speed bottleneck caused by the Cortex-A53's slow
  uncached memory accesses.
* All errors from the state machine were getting overwritten with
  "Command aborted", thereby preventing nuanced responses to expected errors.
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