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Commit bfa96cd9 authored by Ben Avison's avatar Ben Avison
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Initial import of BCM2835 (Raspberry Pi) HAL 

Detail:
  Covers the basic functionality, but does require a customised start.elf
  to function. The vast majority is an entirely new implementation and is
  BSD licenced, but 4% (the Makefile and a handful of simple macros) are
  copied from pre-existing Castle-licenced code, so it lives under the
  "mixed" hierarchy. If other HALs are anything to go by, we'll end up
  having to add more Castle code (at least some C runtime functions) so it's
  probably juast as well.
Admin:
  Code received from Adrian Lees
parents
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hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
s/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
LICENSE 0 → 100644
View file @ bfa96cd9
Most files are distributed under the New BSD License:
Copyright (c) 2012-2017, RISC OS Open Ltd
Copyright (c) 2012, Adrian Lees
Copyright (c) 2012, Dave Higton
Copyright (c) 2012, John Ballance
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
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* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of RISC OS Open Ltd nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
A few files are distributed under the Apache License:
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Makefile 0 → 100644
View file @ bfa96cd9
# Copyright 2012 Castle Technology Ltd
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# Makefile for BCM2835 HAL
#
COMPONENT = BCM2835 HAL
TARGET = BCM2835
OBJS = Top CMOS Debug Display Stubs UART USB Video
HDRS =
CMHGFILE =
CUSTOMRES = custom
CUSTOMROM = custom
ROM_TARGET = custom
LNK_TARGET = custom
AIFDBG = aif._BCM2835
#include StdRules
#include StdTools
include CModule
CCFLAGS += -ff -APCS 3/32bit/nofp/noswst
ASFLAGS += -APCS 3/nofp/noswst
AASMFLAGS += -APCS 3/nofp/noswst
resources:
@${ECHO} ${COMPONENT}: no resources
rom: aof.${TARGET}
@${ECHO} ${COMPONENT}: rom module built
_debug: ${GPADBG}
@echo ${COMPONENT}: debug image built
install_rom: linked.${TARGET}
${CP} linked.${TARGET} ${INSTDIR}.${TARGET} ${CPFLAGS}
@echo ${COMPONENT}: rom module installed
aof.${TARGET}: ${ROM_OBJS_} ${ROM_LIBS} ${DIRS} ${ROM_DEPEND}
${LD} -o $@ -aof ${ROM_OBJS_} ${ROM_LIBS}
linked.${TARGET}: aof.${TARGET}
${LD} ${LDFLAGS} ${LDLINKFLAGS} -o $@ -bin -base 0xFC000000 aof.${TARGET}
${AIFDBG}: ${ROM_OBJS_} ${ROM_LIBS}
${MKDIR} aif
${LD} -aif -bin -d -o ${AIFDBG} ${ROM_OBJS_} ${ROM_LIBS}
#${GPADBG}: ${AIFDBG}
# ToGPA -s ${AIFDBG} ${GPADBG}
# Dynamic dependencies:
MkClean,fd7 0 → 100644
View file @ bfa96cd9
Dir <Obey$Dir>
amu_machine clean
stripdepnd
MkRom,fd7 0 → 100644
View file @ bfa96cd9
Dir <Obey$Dir>
amu_machine rom _debug linked.BCM2835 THROWBACK=-throwback
hdr/BCM2835 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
; VideoCore sets up the following address windows for use by the ARM core:
; - &08000000 -> &7E000000 : 4MB window granting access to peripherals
; - &08800000 -> &7E800000 : 4MB window granting access to USB peripheral
[ :LNOT :DEF: BCM2835_Hdr
GBLL BCM2835_Hdr
GBLL HALDebug
HALDebug SETL {TRUE}
GBLL ExtFramestore
ExtFramestore SETL {TRUE}
; Peripheral address space
PERI_BASE * &08000000
;PERI2_BASE * &08800000
; Offsets from peripheral base address
ST_BASE * &3000 ;System Timer 0
DMA_BASE * &7000 ;DMA controller
PM_BASE * &100000 ;Power management
UART0_BASE * &201000 ;UART 0
UART1_BASE * &215000 ;UART 1
INTC_BASE * &B200 ;Interrupt controller
USB_BASE * &980000 ;USB controller
ISP_BASE * &A00000 ;ISP
; DMA registers
DMA0_CS * 0
DMA0_CONBLK_AD * 4
DMA0_DEBUG * &20
; DMA control block
^ 0
DMAcb_info # 4
DMAcb_src # 4
DMAcb_dst # 4
DMAcb_length # 4
DMAcb_stride # 4
DMAcb_next # 4
DMAcb_pad0 # 4
DMAcb_pad1 # 4
sizeof_DMAcb * @
]
END
hdr/CastleMacros 0 → 100644
View file @ bfa96cd9
; Copyright 2012 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
MACRO
HALEntry $name
ASSERT (. - HAL_EntryTable) / 4 = EntryNo_$name
DCD $name - HAL_EntryTable
MEND
MACRO
NullEntry
DCD HAL_Null - HAL_EntryTable
MEND
MACRO
CallOSM $entry, $reg
LDR ip, [v8, #$entry*4]
MOV lr, pc
ADD pc, v8, ip
MEND
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
END
hdr/StaticWS 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
GET Hdr:OSEntries
GET hdr.BCM2835
GBLL SCR32
SCR32 SETL {TRUE}
sb RN 9
^ 0,sb
PeriBase # 4
;Peri2Base # 4
UARTFCRSoftCopy # 4
DMAcb # sizeof_DMAcb
ScreenBase # 4
FTextPixel # 4
BTextPixel # 4
FTextPixRepl # 4
BTextPixRepl # 4
BitsPerPixel # 4
InvertFont # 4
InvertPixel # 4
Columns # 4
Rows # 4
OutputX # 4
OutputY # 4
BytesPerRow # 4
BytesPerChar # 4
LastInt # 4
KM_State # 4
KM_Num # 4
KM_NumY # 4
PixelTable # 256*4
CurAddr # 4
CurHeight # 4
CurPalette # 4*4
WSPhysAddr # 4 ;physical address of HAL workspace
OSheader # 4
OSentries # 4*(HighestOSEntry+1)
CurUnder # 32*4*32
CurShape # 32/4*32
HAL_WsSize * :INDEX:@
sizeof_workspace * :INDEX:@
END
hdr/UART 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
UART011_DR * 0
UART011_RSR * 4
UART011_ECR * 4
UART011_CR * &30
UART011_FR * &18
UART011_FBRD * &28
UART011_IBRD * &24
UART011_LCRH * &2C
END
s/CMOS 0 → 100644
View file @ bfa96cd9
;
;Copyright(c)2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
;Allrightsreserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |ARM$$data|, CODE, READONLY, PIC
EXPORT cmos
cmos
DCD &eb00fe00
DCD &00001a00
DCD &54100000
DCD &2c0a0820
DCD &00000290
DCD &00000000
DCD &00000000
DCD &00000703
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &01000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &0000140b
DCD &40ff7ca4
DCD &00c101ff
DCD &00000011
DCD &00400800
DCD &000000f0
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00010b00
DCD &00000030
DCD &50027600
DCD &00406f00
DCD &988c0040
DCD &00000707
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00800090
DCD &00000000
DCD &00000000
DCD &00000000
DCD &0aea0000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
END
s/Debug 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |ARM$$code|, CODE, READONLY, PIC
IMPORT HAL_UARTLineStatus
IMPORT HAL_UARTTransmitByte
EXPORT HAL_DebugTX
HAL_DebugTX STMFD sp!,{a1,lr}
busy MOV a1, #0
BL HAL_UARTLineStatus
TST a1, #&20
BEQ busy
LDMFD sp!, {a2,lr}
MOV a1, #0
B HAL_UARTTransmitByte
END
s/Display 0 → 100644
View file @ bfa96cd9
This diff is collapsed.
s/Stubs 0 → 100644
View file @ bfa96cd9
;
;Copyright(c)2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
;Allrightsreserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |ARM$$code|, CODE, READONLY, PIC
GET hdr.BCM2835
GET hdr.StaticWS
IMPORT cmos
IMPORT workspace
[ HALDebug
IMPORT output_hex8
IMPORT output_newline
IMPORT output_text
IMPORT output_text_at
]
EXPORT HAL_IRQEnable
EXPORT HAL_IRQDisable
EXPORT HAL_IRQClear
EXPORT HAL_IRQSource
EXPORT HAL_IRQStatus
EXPORT HAL_FIQEnable
EXPORT HAL_FIQDisable
EXPORT HAL_FIQDisableAll
EXPORT HAL_FIQClear
EXPORT HAL_FIQSource
EXPORT HAL_FIQStatus
EXPORT HAL_Timers
EXPORT HAL_TimerDevice
EXPORT HAL_TimerGranularity
EXPORT HAL_TimerMaxPeriod
EXPORT HAL_TimerSetPeriod
EXPORT HAL_TimerPeriod
EXPORT HAL_TimerReadCountdown
EXPORT HAL_CounterRate
EXPORT HAL_CounterPeriod
EXPORT HAL_CounterRead
EXPORT HAL_CounterDelay
EXPORT HAL_IICBuses
EXPORT HAL_IICType
EXPORT HAL_IICDevice
EXPORT HAL_IICTransfer
EXPORT HAL_IICMonitorTransfer
EXPORT HAL_NVMemoryType
EXPORT HAL_NVMemorySize
EXPORT HAL_NVMemoryPageSize
EXPORT HAL_NVMemoryProtectedSize
EXPORT HAL_NVMemoryProtection
EXPORT HAL_NVMemoryRead
EXPORT HAL_NVMemoryWrite
EXPORT HAL_DebugRX
EXPORT HAL_ATAControllerInfo
EXPORT HAL_KbdScanSetup
EXPORT HAL_KbdScan
EXPORT HAL_KbdScanFinish
EXPORT HAL_KbdScanInterrupt
MACRO
HALStub $str
[ HALDebug
STMFD sp!,{a1,lr}
ADR a1,%FT01
ADR lr,%FT02
B output_text
01 = "$str called from "
ALIGN
02 LDR a1,[sp,#4]
BL output_hex8
BL output_newline
LDMFD sp!,{a1,lr}
]
MEND
INTERRUPT_TIMER * 3
INTERRUPT_FLYBACK * -1
HAL_IRQEnable
CMN a1,#1
MOVEQ pc,lr
LDR ip, PeriBase
ADD ip, ip, #INTC_BASE
ADD ip, ip, #&10
MOV a2, #1
MOV a4, a1, LSR #5
AND a3, a1, #31
MOV a2, a2, LSL a3
STR a2, [ip, a4, LSL #2]
MOV a1, #0 ; how do we get the previous state without using a cache?
MOV pc, lr
HAL_IRQDisable
CMN a1,#1
MOVEQ pc,lr
LDR ip, PeriBase
ADD ip, ip, #INTC_BASE
ADD ip, ip, #&1C
MOV a2, #1
MOV a4, a1, LSR #5
AND a3, a1, #31
MOV a2, a2, LSL a3
STR a2, [ip, a4, LSL #2]
MOV a1, #1 ;!!! previous state
MOV pc,lr
HAL_IRQClear
CMP a1, #4
LDRLS a2, PeriBase
ADDLS a2, a2, #ST_BASE
MOVLS a3, #1
MOVLS a3, a3, LSL a1
STRLS a3, [a2]
MOVLS pc, lr
MOV pc,lr
HAL_IRQSource
; !!! single interrupt in use currently
MOV a1,#3
MOV pc,lr
; LDR a2, PeriBase
; ADD a2, a2, #ST_BASE
; ANDS a2, a2, #&F
; MOVEQ a1, #-1
; MOVNE a1, #0
; TST a2, #2
; MOVNE a1, #1
; TST a2, #4
; MOVNE a1, #2
; TST a2, #8
; MOVNE a1, #3
; MOV pc,lr
HAL_IRQStatus
; HALStub "HAL_IRQStatus"
MOV a1,#0
MOV pc,lr
HAL_FIQEnable
; HALStub "HAL_FIQEnable"
MOV pc,lr
HAL_FIQDisable
; HALStub "HAL_FIQDisable"
MOV a1,#0
MOV pc,lr
HAL_FIQDisableAll
; HALStub "HAL_FIQDisableAll"
MOV pc,lr
HAL_FIQClear
; HALStub "HAL_FIQClear"
MOV pc,lr
HAL_FIQSource
; HALStub "HAL_FIQSource"
MOV a1,#-1
MOV pc,lr
HAL_FIQStatus
; HALStub "HAL_FIQStatus"
MOV a1,#0
MOV pc,lr
HAL_Timers
; HALStub "HAL_Timers"
MOV a1,#1
MOV pc,lr
HAL_TimerDevice
; HALStub "HAL_TimerDevice"
MOV a1,#INTERRUPT_TIMER
MOV pc,lr
HAL_TimerGranularity
; HALStub "HAL_TimerGranularity"
LDR a1,=1000000
MOV pc,lr
HAL_TimerMaxPeriod
; HALStub "HAL_TimerMaxPeriod"
MOV a1,#&10000
MOV pc,lr
HAL_TimerSetPeriod
; HALStub "HAL_TimerSetPeriod"
MOV pc,lr
HAL_TimerPeriod
; HALStub "HAL_TimerPeriod"
MOV a1,#&10000
MOV pc,lr
HAL_TimerReadCountdown
; HALStub "HAL_TimerReadCountdown"
LDR a1,PeriBase
ADD a1,a1,#ST_BASE
LDR a1,[a1,#4]
MOV a2,#1
MVN a1,a1,LSL #16
ADD a1,a2,a1,LSR #16
MOV pc,lr
HAL_CounterRate
; HALStub "HAL_CounterRate"
LDR a1,=1000000
MOV pc,lr
HAL_CounterPeriod
; HALStub "HAL_CounterPeriod"
;!!! can we specify a period of 2^32?
MOV a1,#&10000
MOV pc,lr
HAL_CounterRead
; HALStub "HAL_CounterRead"
LDR a1,PeriBase
ADD a1,a1,#ST_BASE
LDR a1,[a1,#4]
MOV a1,a1,LSL #16
MOV a1,a1,LSR #16
MOV pc,lr
HAL_CounterDelay
; HALStub "HAL_CounterDelay"
LDR a4,PeriBase
ADD a4,a4,#ST_BASE
LDR a2,[a4,#4]
01 LDR a3,[a4,#4]
SUB a3,a3,a2
CMP a3,a1
;!!! removed - suspected of hanging?!
; BLS %BT01
; HALStub "HAL_CounterDelay_done"
MOV pc,lr
HAL_IICBuses
MOV a1,#0
MOV pc,lr
HAL_IICType
HALStub "HAL_IICType"
MOV pc,lr
HAL_IICDevice
HALStub "HAL_IICDevice"
MOV pc,lr
HAL_IICTransfer
HALStub "HAL_IICTransfer"
MOV pc,lr
HAL_IICMonitorTransfer
HALStub "HAL_IICMonitorTransfer"
MOV pc,lr
HAL_NVMemoryType
HALStub "HAL_NVMemoryType"
MOV a1,#0
MOV pc,lr
HAL_NVMemorySize
MOV a1,#2048
MOV pc,lr
HAL_NVMemoryPageSize
MOV a1,#2048
MOV pc,lr
HAL_NVMemoryProtectedSize
MOV a1,#0
MOV pc,lr
HAL_NVMemoryProtection
MOV a1,#0
MOV pc,lr
HAL_NVMemoryRead
ADRL ip,cmos
ADD ip,ip,a1
MOVS a1,a3
nvr_lp LDRNEB a4,[ip],#1
STRNEB a4,[a2],#1
SUBNES a3,a3,#1
BNE nvr_lp
MOV pc,lr
HAL_NVMemoryWrite
; HALStub "HAL_NVMemoryWrite"
MOV a1,a3
MOV pc,lr
HAL_UARTPorts
HALStub "HAL_UARTPorts"
MOV a1,#0
MOV pc,lr
HAL_UARTStartUp
HAL_UARTShutdown
HAL_UARTFeatures
HAL_UARTReceiveByte
HAL_UARTTransmitByte
HAL_UARTLineStatus
HAL_UARTInterruptEnable
HAL_UARTRate
HAL_UARTFormat
HAL_UARTFIFOSize
HAL_UARTFIFOClear
HAL_UARTFIFOEnable
HAL_UARTFIFOThreshold
HAL_UARTInterruptID
HAL_UARTBreak
HAL_UARTModemControl
HAL_UARTModemStatus
HAL_UARTDevice
HALStub "HAL_UART<>"
MOV pc,lr
HAL_DebugRX
MOV a1,#-1
MOV pc,lr
HAL_ATAControllerInfo
HALStub "HAL_ATAControllerInfo"
MOV pc,lr
HAL_KbdScanSetup
HALStub "HAL_KbdScanSetup"
MOV pc,lr
HAL_KbdScan
HALStub "HAL_KbdScan"
MOV a1,#&80000000 ; signal keyboard scan complete
ORR a1,a1,#&00040 ; .. Del pressed
MOV pc,lr
HAL_KbdScanFinish
HALStub "Hal_KbdScanFinish"
MOV pc,lr
HAL_KbdScanInterrupt
HALStub "HAL_KbdScanInterrupt"
MOV pc,lr
END
s/Top 0 → 100644
View file @ bfa96cd9
;
;Copyright(c)2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
;Allrightsreserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |!!!ROMStart|, CODE, READONLY, PIC
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:System
GET Hdr:Machine.<Machine>
GET Hdr:HALSize.<HALSize>
GET Hdr:HALEntries
GET hdr.BCM2835
GET hdr.StaticWS
GET hdr.CastleMacros
IMPORT HAL_IRQEnable
IMPORT HAL_IRQDisable
IMPORT HAL_IRQClear
IMPORT HAL_IRQSource
IMPORT HAL_IRQStatus
IMPORT HAL_FIQEnable
IMPORT HAL_FIQDisable
IMPORT HAL_FIQDisableAll
IMPORT HAL_FIQClear
IMPORT HAL_FIQSource
IMPORT HAL_FIQStatus
IMPORT HAL_Timers
IMPORT HAL_TimerDevice
IMPORT HAL_TimerGranularity
IMPORT HAL_TimerMaxPeriod
IMPORT HAL_TimerSetPeriod
IMPORT HAL_TimerPeriod
IMPORT HAL_TimerReadCountdown
IMPORT HAL_CounterRate
IMPORT HAL_CounterPeriod
IMPORT HAL_CounterRead
IMPORT HAL_CounterDelay
IMPORT HAL_IICBuses
IMPORT HAL_IICType
IMPORT HAL_IICDevice
IMPORT HAL_IICTransfer
IMPORT HAL_IICMonitorTransfer
IMPORT HAL_NVMemoryType
IMPORT HAL_NVMemorySize
IMPORT HAL_NVMemoryPageSize
IMPORT HAL_NVMemoryProtectedSize
IMPORT HAL_NVMemoryProtection
IMPORT HAL_NVMemoryRead
IMPORT HAL_NVMemoryWrite
IMPORT HAL_VideoFlybackDevice
IMPORT HAL_Video_SetMode
IMPORT HAL_Video_WritePaletteEntry
IMPORT HAL_Video_WritePaletteEntries
IMPORT HAL_Video_ReadPaletteEntry
IMPORT HAL_Video_SetInterlace
IMPORT HAL_Video_SetBlank
IMPORT HAL_Video_SetPowerSave
IMPORT HAL_Video_UpdatePointer
IMPORT HAL_Video_SetDAG
IMPORT HAL_Video_VetMode
IMPORT HAL_Video_PixelFormats
IMPORT HAL_Video_Features
IMPORT HAL_Video_BufferAlignment
IMPORT HAL_Video_OutputFormat
IMPORT HAL_Video_Render
IMPORT HAL_Video_IICOp
IMPORT HAL_UARTPorts
IMPORT HAL_UARTStartUp
IMPORT HAL_UARTShutdown
IMPORT HAL_UARTFeatures
IMPORT HAL_UARTReceiveByte
IMPORT HAL_UARTTransmitByte
IMPORT HAL_UARTLineStatus
IMPORT HAL_UARTInterruptEnable
IMPORT HAL_UARTRate
IMPORT HAL_UARTFormat
IMPORT HAL_UARTFIFOSize
IMPORT HAL_UARTFIFOClear
IMPORT HAL_UARTFIFOEnable
IMPORT HAL_UARTFIFOThreshold
IMPORT HAL_UARTInterruptID
IMPORT HAL_UARTBreak
IMPORT HAL_UARTModemControl
IMPORT HAL_UARTModemStatus
IMPORT HAL_UARTDevice
IMPORT HAL_DebugRX
IMPORT HAL_DebugTX
IMPORT HAL_ATAControllerInfo
IMPORT HAL_KbdScanSetup
IMPORT HAL_KbdScan
IMPORT HAL_KbdScanFinish
IMPORT HAL_KbdScanInterrupt
IMPORT HAL_USBControllerInfo
IMPORT HAL_USBPortPower
IMPORT HAL_USBPortStatus
IMPORT HAL_USBPortIRQ
EXPORT HAL_Base
HAL_Base
[ HALDebug
IMPORT clear_block
IMPORT set_text_colours
IMPORT output_char
IMPORT output_hex8
IMPORT output_newline
IMPORT output_regs
IMPORT output_text
IMPORT output_text_at
]
EXPORT reset
EXPORT workspace
ENTRY
reset B start
undef B undefined_instr
swi B swi_instr
pabort B prefetch_abort
dabort B data_abort
irq B interrupt
fiq B fast_interrupt
ALIGN 256
atags ; list of 'atags' structures constructed here by the loader code
; running on VideoCore, describing
; - available memory
; - command line parameters, including framebuffer parameters
ALIGN 4096
end_stack
workspace
% sizeof_workspace
LTORG
; exception handlers just for use during HAL init,
; in case something goes wrong
interrupt
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,irq_text
MOV R1,#0
MOV R2,#0
ADR R14,interrupt
B output_text_at
|
B interrupt
]
fast_interrupt
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,fiq_text
MOV R1,#0
MOV R2,#0
ADR R14,fast_interrupt
B output_text_at
|
B fast_interrupt
]
swi_instr
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,swi_text
MOV R1,#0
MOV R2,#0
ADR R14,swi_instr
B output_text_at
|
B swi_instr
]
prefetch_abort
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,pabt_text
MOV R1,#0
MOV R2,#0
ADR R14,prefetch_abort
B output_text_at
|
B prefetch_abort
]
data_abort
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,dabt_text
MOV R1,#0
MOV R2,#0
ADR R14,data_abort
B output_text_at
|
B data_abort
]
undefined_instr
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
ADR R0,und_text
MOV R1,#0
MOV R2,#5
ADR R14,undefined_instr
B output_text_at
|
B undefined_instr
]
[ HALDebug
fiq_text = "FIQ",0
irq_text = "IRQ",0
swi_text = "SWI",0
pabt_text = "Prefetch Abort",0
dabt_text = "Data Abort",0
und_text = "Undefined Instruction",0
ALIGN
]
start MSR CPSR_c,#F32_bit+I32_bit+SVC32_mode
ADRL v1, HAL_Base + OSROM_HALSize ; v1 -> RISC OS image
LDR v8, [v1, #OSHdr_Entries]
ADD v8, v8, v1 ; v8 -> RISC OS entry table
; Ensure CPU is 'set up' (typically enables ICache)
MOV a1, #0
CallOSM OS_InitARM
ADRL sb,workspace
ADRL R13,end_stack
LDR R4,mbox_addr
MOV R5,#&80
STR R5,[R4]
; For now, just assume that we have 40MB of memory...
; set frame buffer at the top...1920x1080x32bpp requires 8MB
LDR R1,=&2000000
[ :LNOT: ExtFramestore
MOV R1,#&600000
]
ORR R3,R1,#&C0000001
STR R3,[R4]
; Setup display driver workspace
ADRL sb,workspace
ADRL R13,end_stack
[ HALDebug
[ SCR32
LDR R0,=1920*8*4
STR R1,ScreenBase
STR R0,BytesPerRow
MOV R0,#8*4
STR R0,BytesPerChar
|
LDR R0,=1920*8*2
STR R1,ScreenBase
STR R0,BytesPerRow
MOV R0,#8*2
STR R0,BytesPerChar
]
MOV R0,#1920/8
STR R0,Columns
MOV R0,#1080/8
STR R0,Rows
MOV R0,#0
STR R0,InvertFont
STR R0,OutputX
STR R0,OutputY
[ SCR32
MOV R0,#&FF000000
MOV R1,#&FF000000
MOV R8,#32
|
MVN R0,#0
MOV R1,#0
MOV R0,R0,LSR #17
MOV R8,#16
]
STR R8,BitsPerPixel
BL set_text_colours
MOV R0,#0
MOV R1,#0
LDR R2,Columns
LDR R3,Rows
BL clear_block
[ SCR32
MVN R0,#0
MOV R1,#&FF000000
MOV R8,#32
|
MOV R0,#&1F<<10
MOV R1,#0
MOV R8,#16
]
BL set_text_colours
MOV R0,#0
MOV R1,#0
ADR R2,sign_on
BL output_text_at
]
; Traverse list of 'atags' structures
; word 0 = size of tag, including header, in words
; word 1 = type tag
ATAG_MEM * &54410002
ATAG_NONE * 0
ADRL v1, HAL_Base + OSROM_HALSize
LDR v2, [v1, #OSHdr_ImageSize]
ADD v2, v2, v1 ; End of OS
ADRL v3, atags
atags_loop
LDR a1, [v3, #4] ;tag type
LDR a2, [v3] ;size of tag inc header, in words
SUB a4, a1, #ATAG_MEM :AND: &FF000000
SUB a4, a4, #ATAG_MEM :AND: &00FF0000
TEQ a4, #ATAG_MEM :AND: &FFFF
BNE atag_next
; clear RAM
LDR a1, [v3, #8] ;RAM size
LDR lr, [v3, #12] ;RAM start
;!!! bodge to exclude frame buffer
CMP a1,#&2000000
MOVHI a1,#&2000000
STRHI a1, [v3, #8]
MOV a2, #0
MOV a3, #0
MOV a4, #0
MOV v4, #0
MOV v5, #0
MOV v7, #0
MOV ip, #0
ADD a1, a1, lr ;end of RAM
MOV lr, #0
clear_lp
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
CMP a1, v2
BHI clear_lp
;!!! this assumes single call :)
MOV a1, #0
STR a1, [sp, #-4]! ;reference handle (NULL for first call)
LDR lr, [v3] ;tag size, words
LDR v1, [v3, #8] ;RAM size
LDR a4, [v3, #12] ;RAM start
MOV a2, v2 ;start of available RAM, after HAL + OS image
ADD a3, v1, a4 ;end of RAM
ADD v3, v3, lr, LSL #2 ;next tag
; TEQ sp, #0
MVN a4, #0
; ADDEQ sp, a2, #4096
CallOSM OS_AddRAM
STR a1,[sp] ;ref for next call
B atags_loop
atag_next
TEQ a1,#ATAG_NONE
ADDNE v3, v3, a2, LSL #2
BNE atags_loop
[ HALDebug
ADR R0,start_os
BL output_text
]
; OS kernel informed of RAM areas
LDR a4,[sp],#4 ;!!! ref from last AddRAM
MOV a1, #OSStartFlag_RAMCleared
ADRL a2, HAL_Base + OSROM_HALSize ; a2 -> RISC OS image
ADR a3, HALdescriptor
CallOSM OS_Start
; OS_Start doesn't return....invokes HAL_Init after MMU activation
mbox_addr
DCD &0800B000+&8A0
[ HALDebug
sign_on = "BCM2835 Raspberry Pi",13,10,0
start_os = "Starting OS",13,10,0
ALIGN
]
HALdescriptor DATA
DCD HALFlag_NCNBWorkspace
DCD HAL_Base - HALdescriptor
DCD OSROM_HALSize
DCD HAL_EntryTable - HALdescriptor
DCD HAL_Entries
DCD sizeof_workspace
HAL_EntryTable DATA
HALEntry HAL_Init
HALEntry HAL_IRQEnable
HALEntry HAL_IRQDisable
HALEntry HAL_IRQClear
HALEntry HAL_IRQSource
HALEntry HAL_IRQStatus
HALEntry HAL_FIQEnable
HALEntry HAL_FIQDisable
HALEntry HAL_FIQDisableAll
HALEntry HAL_FIQClear
HALEntry HAL_FIQSource
HALEntry HAL_FIQStatus
HALEntry HAL_Timers
HALEntry HAL_TimerDevice
HALEntry HAL_TimerGranularity
HALEntry HAL_TimerMaxPeriod
HALEntry HAL_TimerSetPeriod
HALEntry HAL_TimerPeriod
HALEntry HAL_TimerReadCountdown
HALEntry HAL_CounterRate
HALEntry HAL_CounterPeriod
HALEntry HAL_CounterRead
HALEntry HAL_CounterDelay
HALEntry HAL_NVMemoryType
HALEntry HAL_NVMemorySize
HALEntry HAL_NVMemoryPageSize
HALEntry HAL_NVMemoryProtectedSize
HALEntry HAL_NVMemoryProtection
NullEntry ; HAL_NVMemoryIICAddress
HALEntry HAL_NVMemoryRead
HALEntry HAL_NVMemoryWrite
HALEntry HAL_IICBuses
HALEntry HAL_IICType
NullEntry ; HAL_IICSetLines
NullEntry ; HAL_IICReadLines
HALEntry HAL_IICDevice
HALEntry HAL_IICTransfer
HALEntry HAL_IICMonitorTransfer
HALEntry HAL_VideoFlybackDevice
HALEntry HAL_Video_SetMode
HALEntry HAL_Video_WritePaletteEntry
HALEntry HAL_Video_WritePaletteEntries
HALEntry HAL_Video_ReadPaletteEntry
HALEntry HAL_Video_SetInterlace
HALEntry HAL_Video_SetBlank
HALEntry HAL_Video_SetPowerSave
HALEntry HAL_Video_UpdatePointer
HALEntry HAL_Video_SetDAG
HALEntry HAL_Video_VetMode
HALEntry HAL_Video_PixelFormats
HALEntry HAL_Video_Features
HALEntry HAL_Video_BufferAlignment
HALEntry HAL_Video_OutputFormat
NullEntry ; HALEntry HAL_MatrixColumns
NullEntry ; HALEntry HAL_MatrixScan
NullEntry ; HALEntry HAL_TouchscreenType
NullEntry ; HALEntry HAL_TouchscreenRead
NullEntry ; HALEntry HAL_TouchscreenMode
NullEntry ; HALEntry HAL_TouchscreenMeasure
HALEntry HAL_MachineID
HALEntry HAL_ControllerAddress
HALEntry HAL_HardwareInfo
HALEntry HAL_SuperIOInfo
HALEntry HAL_PlatformInfo
NullEntry ; HALEntry HAL_CleanerSpace
HALEntry HAL_UARTPorts
HALEntry HAL_UARTStartUp
HALEntry HAL_UARTShutdown
HALEntry HAL_UARTFeatures
HALEntry HAL_UARTReceiveByte
HALEntry HAL_UARTTransmitByte
HALEntry HAL_UARTLineStatus
HALEntry HAL_UARTInterruptEnable
HALEntry HAL_UARTRate
HALEntry HAL_UARTFormat
HALEntry HAL_UARTFIFOSize
HALEntry HAL_UARTFIFOClear
HALEntry HAL_UARTFIFOEnable
HALEntry HAL_UARTFIFOThreshold
HALEntry HAL_UARTInterruptID
HALEntry HAL_UARTBreak
HALEntry HAL_UARTModemControl
HALEntry HAL_UARTModemStatus
HALEntry HAL_UARTDevice
HALEntry HAL_Reset
HALEntry HAL_DebugRX
HALEntry HAL_DebugTX
NullEntry ; HAL_PCIFeatures
NullEntry ; HAL_PCIReadConfigByte
NullEntry ; HAL_PCIReadConfigHalfword
NullEntry ; HAL_PCIReadConfigWord
NullEntry ; HAL_PCIWriteConfigByte
NullEntry ; HAL_PCIWriteConfigHalfword
NullEntry ; HAL_PCIWriteConfigWord
NullEntry ; HAL_PCISpecialCycle
NullEntry ; HAL_PCISlotTable
NullEntry ; HAL_PCIAddresses
HALEntry HAL_ATAControllerInfo
NullEntry ; HAL_ATASetModes
NullEntry ; HAL_ATACableID
HALEntry HAL_InitDevices
HALEntry HAL_KbdScanSetup
HALEntry HAL_KbdScan
HALEntry HAL_KbdScanFinish
HALEntry HAL_KbdScanInterrupt
HALEntry HAL_PhysInfo
HALEntry HAL_USBControllerInfo
NullEntry ;HALEntry HAL_MonitorLeadID
HALEntry HAL_Video_Render
HALEntry HAL_USBPortPower
HALEntry HAL_USBPortStatus
HALEntry HAL_USBPortIRQ
HALEntry HAL_Video_IICOp
NullEntry ; HAL_TimerIRQClear
NullEntry ; HAL_TimerIRQStatus
HALEntry HAL_ExtMachineID
HAL_Entries * (.-HAL_EntryTable)/4
;--------------------------------------------------------------------------------------
; HAL Initialisation callback from OS kernel
;--------------------------------------------------------------------------------------
HAL_Init
STMFD R13!,{R8,R14}
MOV R8,a2
BL SetUpOSEntries
; Get the physical address of the start of our workspace
; R8 -> start of the page containing our workspace
MOV a1,R8
CallOS OS_LogToPhys
MOV a2,sb,LSL #20
ORR a1,a1,#&C0000000
ORR a1,a1,a2,LSR #20 ; factor in start offset
STR a1,WSPhysAddr
; Map in the frame buffer
; and initialise the display driver
MOV a1,#0
STR a1,LastInt
STR a1,CurAddr
LDR a2,=&2000000
MOV a3,#&800000
CallOS OS_MapInIO
STR a1,ScreenBase
MOV a1,#0
LDR a2,=PERI_BASE
MOV a3,#&C00000
CallOS OS_MapInIO
STR a1,PeriBase
[ SCR32
LDR a1,=1920*8*4
STR a1,BytesPerRow
MOV a1,#8*4
STR a1,BytesPerChar
|
LDR a1,=1920*8*2
STR a1,BytesPerRow
MOV a1,#8*2
STR a1,BytesPerChar
]
MOV a1,#1920/8
STR a1,Columns
MOV a1,#1080/8
STR a1,Rows
MOV a1,#0
STR a1,InvertFont
MOV a1,#4
STR a1,OutputX
STR a1,OutputY
[ SCR32
MOV a1,#-1
MOV a2,#&FF000000
MOV R8,#32
|
MVN a1,#0
MOV a2,#0
MOV a1,a1,LSR #17
MOV R8,#16
]
STR R8,BitsPerPixel
[ HALDebug
BL set_text_colours
ADR a1,hal_init
BL output_text
]
MOV a1,#0
BL HAL_UARTStartUp
[ HALDebug
ADR a1,uart_started
BL output_text
STR v1,[sp,#-4]!
ADRL v1,hal_init
txloop
txbusylp
MOV a1,#0
BL HAL_UARTLineStatus
TST a1,#&20
BEQ txbusylp
MOV a1,#0
LDRB a2,[v1],#1
BL HAL_UARTTransmitByte
LDRB a1,[v1]
TEQ a1,#0
BNE txloop
LDR v1,[sp],#4
LDMFD R13!,{R8,PC}
set_rate = "UART rate set",0
uart_started = "UART started",0
hal_init = "HAL Init reached",13,10,0
ALIGN
|
LDMFD R13!,{R8,PC}
]
; Initialise and relocate the entry table.
SetUpOSEntries ROUT
STR a1, OSheader
LDR a2, [a1, #OSHdr_NumEntries]
CMP a2, #HighestOSEntry+1
MOVHI a2, #HighestOSEntry+1
ADRL a3, OSentries
LDR a4, [a1, #OSHdr_Entries]
ADD a4, a4, a1
05 SUBS a2, a2, #1
LDR ip, [a4, a2, LSL #2]
ADD ip, ip, a4
STR ip, [a3, a2, LSL #2]
BNE %BT05
MOV pc, lr
HAL_ControllerAddress
MOV a1, #0
MOV pc, lr
HAL_HardwareInfo
LDR ip, =&FFFFFF00
STR ip, [a1]
MOV ip, #0
STR ip, [a2]
LDR ip, =&00FFFF00
STR ip, [a3]
MOV pc, lr
HAL_PlatformInfo
MOV ip, #2_10000 ; no podules,no PCI cards,no multi CPU,no soft off,and soft ROM
STR ip, [a2]
MOV ip, #2_11111 ; mask of valid bits
STR ip, [a3]
MOV pc, lr
HAL_SuperIOInfo
MOV ip, #0
STR ip, [a1]
STR ip, [a2]
MOV pc, lr
HAL_MachineID
MOV a1, #0
MOV a2, #0
MOV pc, lr
HAL_ExtMachineID
MOVS ip, a1
MOV a1, #16
MOV pc, lr
HAL_PhysInfo
HAL_Reset
HAL_InitDevices
HAL_Null
MOV pc, lr
END
s/UART 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
; NB. This is currently just a minimal implementation for driving the
; BCM2835's "mini UART" at 115k2 baud for keyboard/mouse input.
;
AREA |Asm$$Code|, CODE, READONLY, PIC
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:System
GET Hdr:Machine.<Machine>
GET Hdr:ImageSize.<ImageSize>
GET Hdr:Proc
GET hdr.BCM2835
GET hdr.StaticWS
GET hdr.UART
[ HALDebug
IMPORT output_hex8
IMPORT output_newline
IMPORT output_text
]
EXPORT HAL_UARTPorts
EXPORT HAL_UARTStartUp
EXPORT HAL_UARTShutdown
EXPORT HAL_UARTFeatures
EXPORT HAL_UARTReceiveByte
EXPORT HAL_UARTTransmitByte
EXPORT HAL_UARTLineStatus
EXPORT HAL_UARTInterruptEnable
EXPORT HAL_UARTRate
EXPORT HAL_UARTFormat
EXPORT HAL_UARTFIFOSize
EXPORT HAL_UARTFIFOClear
EXPORT HAL_UARTFIFOEnable
EXPORT HAL_UARTFIFOThreshold
EXPORT HAL_UARTInterruptID
EXPORT HAL_UARTBreak
EXPORT HAL_UARTModemControl
EXPORT HAL_UARTModemStatus
EXPORT HAL_UARTDevice
MACRO
HALStub $str
[ HALDebug
STMFD sp!,{a1,lr}
ADR a1,%FT01
ADR lr,%FT02
B output_text
01 = "$str called from "
ALIGN
02 LDR a1,[sp,#4]
BL output_hex8
BL output_newline
LDMFD sp!,{a1,lr}
]
MEND
; Put base address into the a1, given port number in a1
MACRO
$label BaseAddr
LDR a1, PeriBase
ADD a1, a1, #UART0_BASE :AND: :NOT: &FFFF
ADD a1, a1, #UART0_BASE :AND: &FFFF
MEND
; int HAL_UARTPorts(void)
;
; Return array of UART port physical addresses.
;
HAL_UARTPorts
; HALStub "HAL_UARTPorts"
MOV a1, #1
MOV pc, lr
; void StartUp(int port)
;
HAL_UARTStartUp
ADD a3, sb, a1
BaseAddr
MOV a2, #0
STR a2, [a1,#UART011_CR]
MOV a2, #&68
AND a3, a2,#&3F
STR a3, [a1,#UART011_FBRD]
MOV a2, a2,LSR #6
STR a2, [a1,#UART011_IBRD]
MOV a2, #3<<5
ORR a2, a2,#&10
STR a2, [a1,#UART011_LCRH]
MOV a2, #&300
ORR a2, a2,#1
STR a2, [a1,#UART011_CR]
MOV pc, lr
; void HAL_UARTShutdown(int port)
;
HAL_UARTShutdown
BaseAddr
MOV a2, #0
MOV pc, lr
; int HAL_UARTFeatures(int port)
;
; Bit 0: FIFOs available
; Bit 1: DMA available
; Bit 2: Modem lines available
;
HAL_UARTFeatures
MOV a1, #2_101
MOV pc, lr
; int HAL_UARTReceiveByte(int port, int *status)
;
; Returns the next byte from the FIFO (if enabled) or the holding register.
; If status is non-NULL, the line status associated with the byte is
; read (see LineStatus). The return value is only meaningful if a
; received byte is available (bit 0 of *status will be set).
;
HAL_UARTReceiveByte
STR lr, [sp, #-4]!
; HALStub "HAL_UARTReceiveByte"
BaseAddr
LDR a3, [a1, #UART011_FR]
MOV a4, #1
BICS a3, a4, a3, LSR #4
LDRNE ip, [a1, #UART011_DR]
TSTNE ip, #&F00
STRNE a2, [a1, #UART011_ECR] ;clear error condition
BNE rx_error
TEQ a2, #0
STRNE a3, [a2]
AND a1, ip, #&FF
LDR pc, [sp], #4
rx_error
TEQ a2,#0
STRNE a2,[a2]
MOV a1,#0
LDR pc,[sp],#4
; void HAL_UARTTransmitByte(int port, int byte)
;
HAL_UARTTransmitByte
BaseAddr
STRB a2, [a1, #UART011_DR]
MOV pc, lr
; int HAL_UARTLineStatus(int port)
;
; Bit 0: Receiver Data Ready
; Bit 1: Overrun Error
; Bit 2: Parity Error
; Bit 3: Framing Error
; Bit 4: Break Error
; Bit 5: Transmitter Holding Register Empty
; Bit 6: Transmitter Empty (including FIFO)
; Bit 7: FIFO contains a Parity, Framing or Break error
;
; Parity, Framing and Break errors are associated with each byte received.
; Whether the values reported here are associated with the last byte
; read using ReceiveByte or with the next byte to be read is undefined.
; You should request the status using ReceiveByte to ensure accurate
; identification of bytes with errors.
;
; Error bits are cleared whenever status is read, using either LineStatus
; or ReceiveByte with status non-NULL.
;
HAL_UARTLineStatus
BaseAddr
LDR a2, [a1, #UART011_FR]
MOV a1, #0
TST a2, #&80
ORRNE a1, a1, #&20
EORNE a2, a2, #8
TSTNE a2, #8
ORRNE a1, a1, #&40
MOV pc, lr
; int HAL_UARTInterruptEnable(int port, int eor, int mask)
;
; Enables interrupts. Bits are:
;
; Bit 0: Received Data Available (and Character Timeout)
; Bit 1: Transmitter Holding Register Empty
; Bit 2: Received Line Status
; Bit 3: Modem Status
;
; Returns previous state.
;
HAL_UARTInterruptEnable
BaseAddr
MOV pc, lr
; int HAL_UARTRate(int port, int baud16)
;
; Sets the rate, in units of 1/16 of a baud. Returns the previous rate.
; Use -1 to read.
;
HAL_UARTRate
BaseAddr
MOV pc,lr
; int HAL_UARTFormat(int port, int format)
;
; Bits 0-1: Bits per word 0=>5, 1=>6, 2=>7, 3=>8
; Bit 2: Stop length 0=>1, 1=>2 (1.5 if 5 bits)
; Bit 3: Parity enabled
; Bits 4-5: Parity: 0 => Odd (or disabled)
; 1 => Even
; 2 => Mark (parity bit = 1)
; 3 => Space (parity bit = 0)
;
; Returns previous format. -1 to read.
;
HAL_UARTFormat
BaseAddr
MOV pc, lr
; void HAL_UARTFIFOSize(int port, int *rx, int *tx)
;
; Returns the size of the RX and TX FIFOs. Either parameter may be NULL.
; Note that the size of the TX FIFO is the total amount of data that can
; be sent immediately when the Transmitter Holding Register Empty
; status holds. (So an unusual UART that had a transmit threshold
; should return total FIFO size minus threshold).
;
HAL_UARTFIFOSize
BaseAddr
MOV a1, #64
TEQ a2, #0
STRNE a1, [a2]
TEQ a3, #0
STRNE a1, [a3]
MOV pc, lr
; void HAL_UARTFIFOClear(int port, int flags)
;
; Clears the input FIFO (if bit 0 set) and the output FIFO (if bit 1 set).
;
HAL_UARTFIFOClear
BaseAddr
MOV pc, lr
; int HAL_UARTFIFOEnable(int port, int enable)
;
; Enables or disables the RX and TX FIFOs: 0 => disable, 1 => enable
; -1 => read status. Returns previous status.
;
HAL_UARTFIFOEnable
BaseAddr
MOV pc, lr
; int HAL_UARTFIFOThreshold(int port, int threshold)
;
; Sets the receive threshold level for the FIFO RX interrupt. For OMAP3530
; this is 8, 16, 56 or 60 bytes. Returns previous value. -1 to read.
;
HAL_UARTFIFOThreshold
BaseAddr
MOV pc, lr
; int HAL_UARTInterruptID(int port)
;
; Returns the highest priority interrupt currently asserted. In order
; of priority:
;
; 3 => Receiver Line Status (Cleared by ReceiveByte)
; 2 => Received Data Available (Cleared by reading enough data)
; 6 => Character Timeout (received data waiting)
; 1 => Transmitter Holding Register Empty (Cleared by this call)
; 0 => Modem Status (Cleared by ModemStatus)
; -1 => No Interrupt
;
; The Modem Status interrupt occurs when the CTS, DSR or DCD inputs
; change, or when RI goes from high to low (ie bits 0 to 3 of ModemStatus
; are set).
;
HAL_UARTInterruptID
BaseAddr
MOV a1, #-1
MOV pc, lr
; int HAL_UARTBreak(int port, int enable)
;
; Activates (1) or deactivates (0) a break condition. -1 to read,
; returns previous state.
;
HAL_UARTBreak
BaseAddr
MOV pc, lr
; int HAL_UARTModemControl(int port, int eor, int mask)
;
; Modifies the modem control outputs.
;
; Bit 0: DTR
; Bit 1: RTS
;
; Note that these are logical outputs, although the physical pins may be
; inverted. So 1 indicates a request to send. Returns previous state.
; Needs to clear the modem interrupt status.
;
HAL_UARTModemControl
BaseAddr
MOV pc, lr
; int HAL_UARTModemStatus(int port)
;
; Reads the modem status inputs.
;
; Bit 0: CTS changed since last call
; Bit 1: DSR changed since last call
; Bit 2: RI changed from high to low since last call
; Bit 3: DCD changed since last call
; Bit 4: CTS
; Bit 5: DSR
; Bit 6: RI
; Bit 7: DCD
;
; Note that these are logical inputs, although the physical pins may be
; inverted. So 1 indicates a Clear To Send condition. This must also clear
; the modem interrupt status.
;
HAL_UARTModemStatus
BaseAddr
MOV pc, lr
; int HAL_UARTDevice(int port)
;
; Return the device number allocated to the UART port
;
HAL_UARTDevice
MOV a1, #-1
MOV pc, lr
END
s/USB 0 → 100644
View file @ bfa96cd9
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |ARM$$code|, CODE, READONLY, PIC
GET hdr.BCM2835
GET hdr.StaticWS
EXPORT HAL_USBControllerInfo
EXPORT HAL_USBPortPower
EXPORT HAL_USBPortStatus
EXPORT HAL_USBPortIRQ
HAL_USBControllerInfo
MOV a1,#0
HAL_USBPortPower
HAL_USBPortStatus
HAL_USBPortIRQ
MOV pc,lr
END
s/Video 0 → 100644
View file @ bfa96cd9
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