Commit f4c91e67 authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Fix corruption of memory location 0x032000C4

Podule manager was using a hardwired IOC era address of IOTCR to set the speed for the NIC rather than using the SSpaceStart location it read from the Kernel.
Makefile updated to generate C header from the assembler one (static copy deleted).
When NetworkCard support is assembled out the table of logical DMA channels is updated to reflect that.
Use symbol MaximumPodule from the machine definition rather than hardwired 8.
Tested on softloaded IOMD ROM, inspection of IOTCR looks like it's being modified correctly.

Version 1.66. Tagged as 'Podule-1_66'
parent 0f2c5709
hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
s/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
*,ffb gitlab-language=bbcbasic linguist-language=bbcbasic linguist-detectable=true
h/** gitlab-language=c linguist-language=c linguist-detectable=true
......@@ -36,14 +36,15 @@ COMPONENT = Podule
#
# Program specific options:
#
CHEADER1 = ${COMPONENT}
HEADER1 = ${COMPONENT}
HEADER1 = ${COMPONENT}
ASMCHEADER1 = ${COMPONENT}
EXPORTS = ${C_EXP_HDR}.${ASMCHEADER1}
TOKHELPSRC = ${TOKENSOURCE}
HELPSRC = HelpTexts
ROM_SOURCE = GetAll.s
TOKHELPSRC = ${TOKENSOURCE}
HELPSRC = HelpTexts
ROM_SOURCE = GetAll.s
ASFLAGS = ${OPTIONS}
ASFLAGS = ${OPTIONS}
include StdTools
include AAsmModule
......
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "1.65"
Module_Version SETA 165
Module_MajorVersion SETS "1.66"
Module_Version SETA 166
Module_MinorVersion SETS ""
Module_Date SETS "17 Mar 2012"
Module_ApplicationDate SETS "17-Mar-12"
Module_Date SETS "07 May 2012"
Module_ApplicationDate SETS "07-May-12"
Module_ComponentName SETS "Podule"
Module_ComponentPath SETS "castle/RiscOS/Sources/HWSupport/Podule"
Module_FullVersion SETS "1.65"
Module_HelpVersion SETS "1.65 (17 Mar 2012)"
Module_FullVersion SETS "1.66"
Module_HelpVersion SETS "1.66 (07 May 2012)"
END
/* (1.65)
/* (1.66)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 1.65
#define Module_MajorVersion_CMHG 1.66
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 17 Mar 2012
#define Module_Date_CMHG 07 May 2012
#define Module_MajorVersion "1.65"
#define Module_Version 165
#define Module_MajorVersion "1.66"
#define Module_Version 166
#define Module_MinorVersion ""
#define Module_Date "17 Mar 2012"
#define Module_Date "07 May 2012"
#define Module_ApplicationDate "17-Mar-12"
#define Module_ApplicationDate "07-May-12"
#define Module_ComponentName "Podule"
#define Module_ComponentPath "castle/RiscOS/Sources/HWSupport/Podule"
#define Module_FullVersion "1.65"
#define Module_HelpVersion "1.65 (17 Mar 2012)"
#define Module_LibraryVersionInfo "1:65"
#define Module_FullVersion "1.66"
#define Module_HelpVersion "1.66 (07 May 2012)"
#define Module_LibraryVersionInfo "1:66"
/* Copyright 1997 Acorn Computers Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* Exported Podule constants
*
* ***********************************
* *** C h a n g e L i s t ***
* ***********************************
*
* Date Name Description
* ---- ---- -----------
* 12-May-87 BC Added DeviceType_Link to allow for adding ROMS
* 19-Jun-87 BC Removed speed/access stuff
* 15-Sep-87 BC Put in EXPORT of masking constants
*
* 20-Aug-87 BC Left RawRead and RawWrite in permanently
* 10-May-88 BC Added SWI Podule_HardwareAddress
* 11-Jan-91 TMD Added SWI Podule_EnumerateChunksWithInfo
* 15-Jan-91 TMD Added SWI Podule_HardwareAddresses
* 22-Mar-91 OSS Added SWI Podule_ReturnNumber
* 28-Apr-93 BC Added two new SWIs for Medusa
*
* 23-Jul-87 BC Added DeviceType_PartNumber
* 15-Mar-90 BC Added DeviceType_EthernetID, &F7
* 15-Mar-90 BC Added DeviceType_HardwareRev, &F8
* 04-Mar-94 BC Added DeviceType_ROMCRC
*
* 12-May-93 BC Added reason codes for ReadInfo
* 23-Jun-93 BC Added more reason codes for ReadInfo
* 23-Jun-93 BC Changed partitioning of the combined address *!*!*!*!*!*
* 30-Jun-93 BC Added DeviceVector reason code for ReadInfo
* 05-Aug-93 BC Added extra reason codes for ReadInfo
* 12-Jan-94 BC Updated the reason codes for ReadInfo
* 20-Jan-94 BC Added new reason codes (Ethernet) for ReadInfo
* 21-Jan-94 BC Added new reason code Podule_ReadInfo_MEMC
*
* 05-Jan-94 BC Changed masks to be 32 bit not 26 bit
* 18-Feb-94 BC Changed symbol for SWI base
* 29-Jun-94 AMcC Replaced "Podule" with PoduleSWI_Name
* 29-Jun-94 AMcC Removed Country codes (Country_) (no longer used)
* 29-Jun-94 AMcC Moved Manufacturer codes (Manf_), Podule types (ProdType_)
* and Simple types (SimpleType_) to HdrSrc.Register.PoduleReg
* 03-May-95 JRH Added direct support for STB2 MPEG1 chips conditioned on
* STB. Will return values consistent with a podule fitted in
* slot 0 when MPEG hardware is detected using link.
* 16-Jan-96 JRH Changed condition for fake podule from STB to system build
* setting FakePodule0.
* s.Module: Changed build options NetworkPodule and
* ExtensionROMs to be equal to system build options
* NetPodSupport and ExtROMSupport.
* 02-Jun-97 KJB Converted from assembler header file
* Added constants for access speeds
* 08-Aug-02 RPS New access speed contants for Tungsten added
*/
/*
* Bits for the reason code (R0) of SWI Podule_ReadInfo
*/
#define Podule_ReadInfo_Number * (1u<<0)
#define Podule_ReadInfo_SyncBase * (1u<<1)
#define Podule_ReadInfo_CMOSAddress * (1u<<2)
#define Podule_ReadInfo_CMOSSize * (1u<<3)
#define Podule_ReadInfo_ROMAddress * (1u<<4)
#define Podule_ReadInfo_ID * (1u<<5)
#define Podule_ReadInfo_Type * (1u<<6)
#define Podule_ReadInfo_CombinedAddress * (1u<<7)
#define Podule_ReadInfo_Description * (1u<<8)
#define Podule_ReadInfo_EASILogical * (1u<<9)
#define Podule_ReadInfo_EASISize * (1u<<10)
#define Podule_ReadInfo_DMAPrimary * (1u<<11)
#define Podule_ReadInfo_DMASecondary * (1u<<12)
#define Podule_ReadInfo_IntStatus * (1u<<13)
#define Podule_ReadInfo_IntRequest * (1u<<14)
#define Podule_ReadInfo_IntMask * (1u<<15)
#define Podule_ReadInfo_IntValue * (1u<<16)
#define Podule_ReadInfo_IntDeviceVector * (1u<<17)
#define Podule_ReadInfo_FIQasIntStatus * (1u<<18)
#define Podule_ReadInfo_FIQasIntRequest * (1u<<19)
#define Podule_ReadInfo_FIQasIntMask * (1u<<20)
#define Podule_ReadInfo_FIQasIntValue * (1u<<21)
#define Podule_ReadInfo_FIQasIntDeviceVector * (1u<<22)
#define Podule_ReadInfo_FIQStatus * (1u<<23)
#define Podule_ReadInfo_FIQRequest * (1u<<24)
#define Podule_ReadInfo_FIQMask * (1u<<25)
#define Podule_ReadInfo_FIQValue * (1u<<26)
#define Podule_ReadInfo_EthernetAddressLow * (1u<<27)
#define Podule_ReadInfo_EthernetAddressHigh * (1u<<28)
#define Podule_ReadInfo_EthernetAddress * (3u<<27) /* Two bits => 48 bits */
#define Podule_ReadInfo_MEMC * (1u<<29)
#define Podule_ReadInfo_30 * (1u<<30)
#define Podule_ReadInfo_31 * (1u<<31)
/*
* The hardware address handed to loaders by the Podule manager consists of
* two parts, the Synchronous base address, and the CMOS base address.
* These two parts are combined into a single word as with the CMOS address
* (the first of four bytes) in the bottom 10 bits. The remainder is the
* hardware address.
*
* 31 10 9 0
* +---------------------------------------+----------------+
* | Hardware base address (Synchronous) | CMOS address |
* +---------------------------------------+----------------+
*
* So this means that entry points expecting the hardware base address
* should now mask the incoming register value;
*
* LDR Rmv, =2_00000000000000000000001111111111
* BIC Rba, Rha, Rmv
* OR
* LDR Rmv, =2_11111111111111111111110000000000
* AND Rba, Rha, Rmv
*
* To obtain the true base address, and they should also mask to obtain the
* CMOS address for use in R1 in the SWI XOS_Byte for ReadCMOS or WriteCMOS;
*
* LDR Rmv, =2_11111111111111111111110000000000
* BIC Rca, Rha, Rmv
* OR
* LDR Rmv, =2_00000000000000000000001111111111
* AND Rca, Rha, Rmv
*
* These four constants are exported below.
*/
#define Podule_BaseAddressBICMask 0x000003FFu
#define Podule_BaseAddressANDMask 0xFFFFFC00u
#define Podule_CMOSAddressBICMask 0xFFFFFC00u
#define Podule_CMOSAddressANDMask 0x000003FFu
/*
* Access speeds, as passed to Podule_SetSpeed
*/
#define Podule_Speed_TypeA 1
#define Podule_Speed_TypeB 2
#define Podule_Speed_TypeC 3
#define Podule_Speed_TypeD 4
#define Podule_Speed_TypeE 5
#define Podule_Speed_TypeF 6
#define Podule_Speed_TypeG 7
#define Podule_Speed_TypeH 8
/*
* Operating system identity bytes for load chunks
*/
/* OS=0, RISC OS */
#define OSType_Loader 0x80 /* The loader for the rest of the image */
#define OSType_Module 0x81 /* A Relocatable Module */
#define OSType_BBCROM 0x82 /* Use to support the ROM Card */
#define OSType_Sprite 0x83
#define OSType_File 0x84 /* General get out mechanism */
/* OS=1, ARX */
#define ARXType_Loader 0x90
/* OS=2, RISCiX */
#define UnixType_Loader 0xA0
/* OS=3, Helios */
#define HeliosType_Loader 0xB0
/* OS=7, Device data */
#define DeviceType_Link 0xF0 /* Used to link directory sections together */
#define DeviceType_SerialNumber 0xF1
#define DeviceType_Date 0xF2
#define DeviceType_Modification 0xF3
#define DeviceType_Place 0xF4
#define DeviceType_Description 0xF5
#define DeviceType_PartNumber 0xF6
#define DeviceType_EthernetID 0xF7
#define DeviceType_HardwareRev 0xF8
#define DeviceType_ROMCRC 0xF9
#define DeviceType_Empty 0xFF /* Used to patch ROMS */
......@@ -1264,29 +1264,30 @@ SetSpeed ROUT
LDR r0, [ sp, #0 ] ; Reload entry value of R0
LDR r1, Capabilities
LDR r10, SSpaceStart
ADD pc, r1, #Capability_SpeedHelper
HelperIOMD1
CMP r0, #4 ; Check for the known range
BGT BadSpeed
CMP r0, #Podule_Speed_TypeD ; Check for the known range
BHI BadSpeed
[ NetworkPodule
; The network podule supports all four timing values.
TEQ r2, #NumberOfNetworkPodule
BNE MightBeEASI
LDR r3, =IOTCR ; Should be an ADR
BNE %FT10 ; Might be EASI
PHPSEI
LDRB r1, [ r3, #0 ] ; Get current timing value
LDRB r1, [ r10, #IOMD_IOTCR ] ; Get current timing value
AND r2, r1, #3 ; Mask, leaving only the network card timing
ADD r2, r2, #1 ; Translate to external format
STR r2, [ sp, #0 ] ; Poke into exit frame
SUBS r0, r0, #1 ; Test for zero and map to 0..3
BICPL r1, r1, #3 ; Mask off the network card timing
ORRPL r1, r1, r0 ; Add in the new timing value
STRPLB r1, [ r3, #0 ] ; Set the new value
STRPLB r1, [ r10, #IOMD_IOTCR ] ; Set the new value
PLP
CLRV
B ExitSetSpeed
MightBeEASI
10
]
[ EASISpace
; EASI space only supports timings A and C.
......@@ -1294,24 +1295,21 @@ MightBeEASI
TEQNE r0, #Podule_Speed_TypeA ; Is the timing Type_A
TEQNE r0, #Podule_Speed_TypeC ; Is the timing Type_C
BNE SpeedNotAvailable
MOV r0, #9
MOV r1, r2
SWI XOS_Memory
BVS ExitSetSpeed
LDR r10, [ sp, #0 ] ; Original R0
LDR r11, [ sp, #0 ] ; Original R0
PHPSEI
LDRB r0, [ r1, #0 ] ; Get the current speed value
LDRB r0, [ r10, #IOMD_ECTCR ] ; Get the current speed value
MOV r3, r0, ASR r2 ; Move bit to bottom
AND r3, r3, #1 ; Mask off unwanted bits
myASL r3, 1 ; Map 0,1 to 0,2
ADD r3, r3, #1 ; Map 0,2 to 1,3
TST r3, #1
MOVEQ r3, #Podule_Speed_TypeA
MOVNE r3, #Podule_Speed_TypeC
STR r3, [ sp, #0 ] ; Poke into exit frame
MOV r3, #1
SUBS r10, r10, #1 ; Map speed 0,1,3 to -1,0, 2
MOVPL r10, r10, ASR #1 ; Map 0,2 to 0,1
SUBS r11, r11, #1 ; Map speed 0,1,3 to -1,0,2
MOVPL r11, r11, ASR #1 ; Map 0,2 to 0,1
BICPL r0, r0, r3, ASL r2 ; Bit mask for the new value
ORRPL r0, r0, r10, ASL r2
STRPLB r0, [ r1, #0 ] ; Store the new value
ORRPL r0, r0, r11, ASL r2
STRPLB r0, [ r10, #IOMD_ECTCR ] ; Store the new value
PLP
CLRV
B ExitSetSpeed
......@@ -1320,12 +1318,11 @@ MightBeEASI
HelperIOMDT
CMP r0, #Podule_Speed_TypeH ; We'll accept anything up to H
BHI BadSpeed
LDR r10, SSpaceStart
PHPSEI
SUBS r0, r0, #1
LDRB r3, [r10, #&AC] ; bit 2
LDRB r3, [r10, #&AC] ; bit 2
MOVPL r1, #1
MOVPL r1, r1, LSL r2
BICPL r1, r3, r1 ; clear the bit relating to this podule
......
......@@ -385,7 +385,7 @@ ROMLoaderReadByte ROUT
MOV pc, lr
ROMLoaderError
MSR CPSR_f, #V_bit
SETV
ADR r0, ErrorAccess
MOV pc, lr
......@@ -472,12 +472,12 @@ NetworkCounterLoop
B NetworkCounterLoop ; And try again
NetworkLoaderError
MSR CPSR_f, #V_bit
SETV
ADR r0, ErrorAccess
MOV pc, lr
NetworkLoaderTooBig
MSR CPSR_f, #V_bit
SETV
ADR r0, ErrorNetworkLoaderTooBig
MOV pc, lr
......@@ -537,7 +537,7 @@ Not32bitDummyLoader
; the error
Not32bitLoaderError
MSR CPSR_f, #V_bit
SETV
ADR r0, ErrorLoader26bit
MOV pc, lr
......@@ -659,9 +659,9 @@ InitialisationLoop
MOV r1, #4 << 8
SWI XOS_Memory
MOVVS r1, #IOMD_Base ; Kernel's too old,assume IOMD_Base
STR r1, [r2, #:INDEX:SSpaceStart] ; Saves keep asking for it
TEQ r1, #0
MOVEQ r4, r1
STRNE r1, [r2, #:INDEX:SSpaceStart] ; Saves keep asking for it
MOVEQ r4, #0 ; Get an unknown id
LDRNEB r3, [r1, #IOMD_ID1]
LDRNEB r4, [r1, #IOMD_ID0]
ORRNE r4, r4, r3, LSL#8
......
......@@ -141,14 +141,14 @@ IOMDUnknownCap
DCD 0,0 ; No capability or podules
B ExitSetSpeed
IOMD1Cap
DCD &000,&010,-1,-1,-1,-1,-1,-1,&105
[ NetworkPodule
DCD &000,&010,-1,-1,-1,-1,-1,-1,&105 ; DMA on DEBI 0 and 1 plus the NIC
DCD 2_00111111 ; We've included the NIC code,so declare it
DCD 9
|
DCD &000,&010,-1,-1,-1,-1,-1,-1,-1 ; DMA on DEBI 0 and 1
DCD 2_00111110
DCD 8
]
DCD MaximumPodule
B HelperIOMD1
DCD B0-IOMD1Cap,B1-IOMD1Cap,B2-IOMD1Cap,B3-IOMD1Cap
DCD B4-IOMD1Cap,B5-IOMD1Cap,B6-IOMD1Cap,B7-IOMD1Cap
......
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