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Kernel updates to support Cortex-A9 CPUs
Ben Avison authored 
Detail:
  hdr.ARMops
    added Cortex_A9
  hdr.HALDevice
    added OMAP4 specific device IDs
  hdr.KernelWS
    changed definition of DefIRQ1Vspace for M_CortexA9
  s.ARMops
    added CortexA9 specific code for enabling L2 cache
    added CPUDesc Cortex_A9
  s.NewIRQs
    added CortexA9 specific definition of MaxInterrupts
  s.NewReset
    added M_CortexA9 options
    line 1444: corrected typo
    line 187: commented out unnecessary operation
Admin:
  Submission from Willi Theiß

Version 5.35, 4.79.2.98.2.50. Tagged as 'Kernel-5_35-4_79_2_98_2_50'
0ff2f2dd
Name Last commit Last update
..
ExportVals 32-bit Kernel.
Old Import from cleaned 360 CD
ARMops Kernel updates to support Cortex-A9 CPUs
Copro15ops Add zero page relocation support
EnvNumbers Import from cleaned 360 CD
GPIODevice Add new GPIO device type & OMAP3 GPIO device ID
HALDevice Kernel updates to support Cortex-A9 CPUs
HALEntries Add OS_ReadSysInfo reason codes 11 (read debug info) & 12 (read extended machine ID)
KernelWS Kernel updates to support Cortex-A9 CPUs
KeyWS * HAL can choose to limit amount of screen memory to allocate
ModHand Added new offset field to module header for flags
OSEntries * HAL can choose to limit amount of screen memory to allocate
OSRSI6 Add ESC_Status to list of OS_ReadSysInfo 6 items
Options Add zero page relocation support
PublicWS Add new OS_ReadSysInfo 6 items. Change naming of PublicWS values.
RISCOS Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
RTCDevice Migrate 2012 RTC fix to Cortex branch of kernel
Variables Import from cleaned 360 CD
VduExt Added four new VDU variables.
VideoDevice Update VDU HAL device for new OMAPVideo driver, fix MVA-based cache/TLB maintenance ops aborting on ARMv7, add warning to VDU driver about inconsistent state variables during screen mode changes