GitLab

Detail:
  * Hdr:Macros: ASCII_LowerCase and ASCII_UpperCase are the same as
    uk_LowerCase and uk_UpperCase, but don't produce the warnings, on the
    basis that the user acknowledges that they are only to be applied to
    ASCII characters.
  * Re-used CMOS byte 188 bit 0 to configure whether the Wimp responds to
    clicks on menu items with attached submenus by opening the submenu. This
    bit was previously one of two allocated to the ROMFS *Opt4 state; the
    other bit is now spare.
  * Clarified a few comments in Hdr:CMOS relating to the use of bits under
    the Ursula Wimp.
Admin:
  Required by Wimp 4.57.

Version 1.06. Tagged as 'HdrSrc-1_06'

Detail:
  $regtop instead of $regtmp meant that 32-bit builds would fail to
    assemble correctly.
Admin:
  Required by PDModules 4.45 and later

Version 1.05. Tagged as 'HdrSrc-1_05'

Detail:
  * Debug macros can now be used to output the value of r13 (previously, the
    value of r14 was erroneously output instead).
  * Switched from using mrs macros to mymrs macros, so builds with the
    No32BitCode flag unset are now objasm-compatible.
Admin:
  Has been used in a debugging session, and debug routines worked as expected.

Version 1.04. Tagged as 'HdrSrc-1_04'

* Added new flags and bits to Hdr:MEMM.ARM600.
* Added "HAL" switch in Hdr:Machine.Machine. True only for my prototype M_32.

Version 1.03. Tagged as 'HdrSrc-1_03'

Version 1.02. Tagged as 'HdrSrc-1_02'

Hdr.Machine.Machine sets STB3 and STB400 default PAL modes to be 720 rather than 704 or 768 pixels wide.

Detail:
  Version 1.00. Hooray!
Admin:
  Tested on local build of ModeFiles module.

Version 1.00. Tagged as 'HdrSrc-1_00'

MaxI2Cspeed (in kHz) so that a variety of speeds can be used
not just normal and fast.

Version 0.99. Tagged as 'HdrSrc-0_99'

Detail:
	As above.
Admin:
	Untested. Been through the KevCo (tm) change control process.

Version 0.98. Tagged as 'HdrSrc-0_98'

Detail:
  Defined new ProdType_ as -1. Could go in PoduleReg but it was felt that it
  made more sense being close to the area that used it, since it isn't a real
  podule.
Admin:
  Not tested.

Version 0.97. Tagged as 'HdrSrc-0_97'

Detail:
  Kernel 5.32 and later will define this internal flag itself.
Admin:
  Tested on Ursula softload.
  Required by Kernel 5.30 and earlier and Kernel 5.32 and later.

Version 0.95. Tagged as 'HdrSrc-0_95'

Detail:
  Kernel 5.31 and later will cache common errors if this option is set
    to true here.  Currently, only set for M_Phoebe builds.
Admin:
  Tested on Ursula softload.

Version 0.94. Tagged as 'HdrSrc-0_94'

Detail:
  Alan missed the semi-colon key when added the LDAP error block.
Admin:
  Not tested - will fix fault which stops 0.92 working.

Version 0.93. Tagged as 'HdrSrc-0_93'

Detail:
  This synchronisation includes some Pace allocations that have
    been made over the past few months.
Admin:
  E-mail received 15 July 2000.

Version 0.92. Tagged as 'HdrSrc-0_92'

Macro for assembly of new BKPT instruction added (useful for the emulator).

Version 0.91. Tagged as 'HdrSrc-0_91'

Modified "Push" and "Pull" macros to use STR/LDR for single-register operations. This will fail (loudly) if a named register list is used. I've never seen anyone use one though.

Tested on a cut-down ROM build. There shouldn't be any room for failure,
unless someone is using the macro to generate data (eg for a detected code
sequence in a patcher).

Version 0.90. Tagged as 'HdrSrc-0_90'

Added symbol controlling whether Kernel and Interlace are built in their full-resolution forms or not.

Detail:
  Symbol HiResTTX is currently only defined for STB-400 and Lazarus builds.
Admin:
  No test build has yet been performed with the flag being set here.

Version 0.89. Tagged as 'HdrSrc-0_89'

Detail:
  TOGPSRR does the same as TOGPSR except that the bits to toggle
    are held in a register.
  Hdr:Sprite contains declarations that are mistranslated by Hdr2H 1.1.
    Hdr2H has been updated to handle these declarations and is first
    present in RiscOS/Library 0.45.
Admin:
  Required by DualSerial 0.24 and later.
  Requires Library 0.45 to export a correct C version of Hdr:Sprite

Version 0.88. Tagged as 'HdrSrc-0_88'

Version 0.87. Tagged as 'HdrSrc-0_87'

Hdr:NdrDebug made fully 32-bit compatible (only change is to the code switched
    using the debug_nullterminatedstrings variable).

Version 0.86. Tagged as 'HdrSrc-0_86'

Version 0.85. Tagged as 'HdrSrc-0_85'

* Added $oldpsr extension to SETPSR, CLRPSR and TOGPSR.
* Removed reliance on ObjAsm default macro parameters in $oldpsr extension.
* Replaced SavePSR macro calls with literal mrs instructions in 32-bit macros.

Version 0.84. Tagged as 'HdrSrc-0_84'

Detail:
  Improved some of the PSR wiggling macros with an optional extra
    register into which to save the old PSR.  Saves an extra MRS
    instruction in some cases.
  Some macros changed to invoke SavePSR macro instead of having a copy
    of the macro body.
Admin:
  Required by ScrBlank 2.30.

Version 0.83. Tagged as 'HdrSrc-0_83'

LDR/STR instead of single-register LDM/STM.

Version 0.82. Tagged as 'HdrSrc-0_82'

Detail:

  * Error "Ldr26" added to list of Podule manager errors: "Loader is
    not 32-bit compatible"

Admin:

  * Verified OK by Pineapple resource allocations; next release of
    HdrSrc files from Pineapple should contain this message.

Version 0.81. Tagged as 'HdrSrc-0_81'

Detail:
  Regressing the version of HdrSrc in the STB-400 build didn't
  work because some of the other components are 32-bit clean
  and assume that the EXITS macro can take a flags parameter,
  which it doesn't in older HdrSrc version (eg: PS2Driver).
Admin:
  It'll be tested before most people read this log.

Version 0.80. Tagged as 'HdrSrc-0_80'

More 32-bit tweaks. Some assembler macros extended to accept condition codes and PSR flag subset specifiers.

CPU.FPA header file added.

Version 0.79. Tagged as 'HdrSrc-0_79'

Admin:
  Not tested.  Version 0.77 was broken.

Version 0.78. Tagged as 'HdrSrc-0_78'

Detail:
  New SWI chunks
  New filetypes
  New error blocks
  New printer dumper
  New service calls

Admin:
  E-mail received Marth 24th 2000

Version 0.77. Tagged as 'HdrSrc-0_77'

Detail:
  Safe area was 8,8,8,8. Is now 8,6,8,6
Admin:
  Untested (but Kevin's maths indicates it will work!)

Version 0.76. Tagged as 'HdrSrc-0_76'

Detail:
  There is a duplicate allocation at 114/115 - one has been commented out
  to give subsequent filing systems the correct number.
Admin:
  Pineapple has been informed - next update should incorporate a fix.

Version 0.75. Tagged as 'HdrSrc-0_75'

Detail:
  Use cvs diff to see the changes.
Admin:
  E-mail received 27 Feb 2000.

Version 0.74. Tagged as 'HdrSrc-0_74'

Detail:
  MACFROMNVRAM was intended to force the Kernel to fetch the MAC
  address from NVRAM for Customer F 5. In practice it is not needed
  as its main purpose was to avoid getting the MAC address from
  the RawMachineID but this will not happen in Customer F 5 as
  RawMachineID will not be set.

Admin:
  Not tested.
  You must use Kernel 5.17 or later with this HdrSrc.

Version 0.73. Tagged as 'HdrSrc-0_73'

Needed by STB-400 MPEGDriver.

Version 0.72. Tagged as 'HdrSrc-0_72'

Lazarus.
Minor optimisation to RemovePSRFromReg macro.

Version 0.71. Tagged as 'HdrSrc-0_71'

Detail:
  New Ethernet allocation: SWI chunk, error chunk.
  Lots of other new SWI chunks.
  Three new filetypes.
  Eleven new error chunks (including SVBGeneric)
  One new pointer device
Admin:
  Synchronisation of all master header files.
  E-mail received 22 Jan 2000

Version 0.70. Tagged as 'HdrSrc-0_70'

Detail:
  Used GBLA instead of GBLL for MACFROMNVRAM - sorry.
Admin:
  Tested.

Version 0.69. Tagged as 'HdrSrc-0_69'

Detail:
  MACFROMNVRAM and MACNVRAM2COPIES are TRUE for Customer F 5 Ethernet machines.

  If TRUE then OS_ReadSysInfo 4 will read the Ethernet MAC Address from the from bytes
  0-13 of the NVRAM area, instead of trying to read it from anywhere else.
  This is intended for use with a 24LC128 device (which has no OTP area and no clock).

  The NVRAM data is:
  	0-5	MAC Address, first copy
  	6	Checksum (LSB of sum of bytes 0-5, XOR'd with &FF)
  	7-12	MAC Address, second copy
  	13	Checksum, second copy

  Note that these are physical addresses within the device. Logical addresses &F0-&FF map
  to physical addresses &00-&0F.

  A SetMac utility is provided in Customer F 5 !Boot.Utils to enable the MAC address to be
  programmed for prototypes and development machines.

  Since it is dangerous to rely on the NVRAM to hold our MAC address when it is not
  protected in any way, we store two copies of it, each with their own checksum.
  If either copy becomes damaged we can repair it using the other copy.
Admin:
  Not tested.

  If used for Customer F 3 or 4, then you must use the F3UI v0.51 or
  later as it defines the NVRAM tags that are used.

Version 0.68. Tagged as 'HdrSrc-0_68'

Version 0.67. Tagged as 'HdrSrc-0_67'

Detail:
  This stops the errors occurring in 26-bit builds when the EntryS
    macro is invoked without quotes around the register list.
Admin:
  Fixes problems with the latest ARM module not building.


Version 0.66. Tagged as 'HdrSrc-0_66'

Detail:
  The 32-bit version of WritePSRc takes an optional third parameter
    which is the condition code to embed in the instruction.
    The 26-bit mode version now takes the same parameters, thus
    allowing Sound2 (SoundScheduler) to build.
Admin:
  Tested in Phoebe and 32 machine builds of Sound2.
  Required by SoundScheduler 1.25 and later (Sound2-1_25)

Version 0.65. Tagged as 'HdrSrc-0_65'