Made revD1 compatible (AR8035 aware, and Phy power and reset pin aware)

Detail:
  RevD1 introduces the AR8035 Phy replacing the AR8031, and provides
  a power switch for it. Code for this installed, together with a fix
  to allow hardware reset of the Phy when available.
Admin:
  tested on revC2 and revD1

Version 0.29. Tagged as 'EtherTH-0_29'

VersionASM

@@ -11,13 +11,13 @@
                         GBLS    Module_HelpVersion
                         GBLS    Module_ComponentName
                         GBLS    Module_ComponentPath
-Module_MajorVersion     SETS    "0.28"
-Module_Version          SETA    28
+Module_MajorVersion     SETS    "0.29"
+Module_Version          SETA    29
 Module_MinorVersion     SETS    ""
-Module_Date             SETS    "28 Apr 2017"
-Module_ApplicationDate  SETS    "28-Apr-17"
+Module_Date             SETS    "18 Jul 2017"
+Module_ApplicationDate  SETS    "18-Jul-17"
 Module_ComponentName    SETS    "EtherTH"
 Module_ComponentPath    SETS    "mixed/RiscOS/Sources/Networking/Ethernet/EtherTH"
-Module_FullVersion      SETS    "0.28"
-Module_HelpVersion      SETS    "0.28 (28 Apr 2017)"
+Module_FullVersion      SETS    "0.29"
+Module_HelpVersion      SETS    "0.29 (18 Jul 2017)"
                         END

VersionNum

-/* (0.28)
+/* (0.29)
  *
  * This file is automatically maintained by srccommit, do not edit manually.
  * Last processed by srccommit version: 1.1.
  *
  */
-#define Module_MajorVersion_CMHG        0.28
+#define Module_MajorVersion_CMHG        0.29
 #define Module_MinorVersion_CMHG        
-#define Module_Date_CMHG                28 Apr 2017
+#define Module_Date_CMHG                18 Jul 2017
 
-#define Module_MajorVersion             "0.28"
-#define Module_Version                  28
+#define Module_MajorVersion             "0.29"
+#define Module_Version                  29
 #define Module_MinorVersion             ""
-#define Module_Date                     "28 Apr 2017"
+#define Module_Date                     "18 Jul 2017"
 
-#define Module_ApplicationDate          "28-Apr-17"
+#define Module_ApplicationDate          "18-Jul-17"
 
 #define Module_ComponentName            "EtherTH"
 #define Module_ComponentPath            "mixed/RiscOS/Sources/Networking/Ethernet/EtherTH"
 
-#define Module_FullVersion              "0.28"
-#define Module_HelpVersion              "0.28 (28 Apr 2017)"
-#define Module_LibraryVersionInfo       "0:28"
+#define Module_FullVersion              "0.29"
+#define Module_HelpVersion              "0.29 (18 Jul 2017)"
+#define Module_LibraryVersionInfo       "0:29"

c/device

@@ -93,19 +93,6 @@ static int print_ping(const char* txt,const uint8_t* data)
 
 static _kernel_oserror* tdar_bug_fix(_kernel_swi_regs* r, void* pw, void* handle);
 
-/*
- * Flags indicating which resources have been allocated
- * so that device destroy can be called from anywhere from
- * within device new and free resources allocated so far.
- */
-#define DF_I_MEMORY             (1 << 0)
-#define DF_I_PCI_MEMORY         (1 << 1)
-#define DF_I_VECTORCLAIMED      (1 << 2)
-#define DF_I_PHYVECTORCLAIMED   (1 << 3)
-#define DF_I_IRQENABLED         (1 << 4)
-#define DF_I_PHYIRQENABLED      (1 << 5)
-#define DF_I_DCIFILTER          (1 << 6)
-#define DF_I_DRIVER_STARTING    (1 << 7)
 
 struct device_list_t  device_list = SLIST_HEAD_INITIALIZER(&device_list);
 
@@ -178,6 +165,11 @@ _kernel_oserror* device_new(int unit, HalEtherDevice_t* hal_device, void* pw)
         if (err) return device_destroy(dev, err);
         dev->flags |= DF_I_DCIFILTER;
 
+        /* Check if we can use the Phy PwrRst call *
+         * (earlier HALs exported this as 0)       */
+        if(dev->hal_pw == dev->hal_device->phy.HAL_WS)
+            dev->flags |= DF_I_HAL_HAS_PHY_PWRRST;
+
         /*
          * Alloc PCI contiguous memory for:
          *      Tx ring buffer - holds an array of Tx buffer descriptors.
@@ -308,24 +300,40 @@ _kernel_oserror* device_new(int unit, HalEtherDevice_t* hal_device, void* pw)
         device_setReg(dev, ENET_TAEM, 0x04);                    /* min 4  - underflow error if used words are less than this and not end of frame*/
         device_setReg(dev, ENET_TIPG, 0x0c);
 
+
+
         device_setReg(dev, ENET_FTRL, ETHER_MAX_LEN);
 
         device_setReg(dev, ENET_RACC,  ENET_RACC__PADREM | ENET_RACC__LINEDIS | ENET_RACC__PRODIS | ENET_RACC__IPDIS);
 
+        /* make sure the phy is turned on and reset if possible,*
+         * so we can read its ID                                */
+        mii_hardresetPhy(dev);
 
         /* Only AR8031 device supported */
         if (mii_getReg(dev, MII_IDH) != AR8031_MII_IDH ||
-            mii_getReg(dev, MII_IDL) != AR8031_MII_IDL) return device_destroy(dev, dcierror(EINVAL));
-
+        mii_getReg(dev, MII_IDL) != AR8031_MII_IDL)
+        {
+          dprintf_here("idh:%x idl:%x\n",mii_getReg(dev, MII_IDH),mii_getReg(dev, MII_IDL));
+          dprintf_here("bcr:%x \n",mii_getReg(dev, MII_BCR));
+          if (mii_getReg(dev, MII_IDH) == AR8035_MII_IDH ||
+          mii_getReg(dev, MII_IDL) == AR8035_MII_IDL)
+          {
+            dprintf_here("AR8035 found \n");
+            dev->flags |= DF_I_PHY_AR8035;              /* remember */
+          }
+          else
+          {
+            return device_destroy(dev, dcierror(EINVAL));
+          }
+        }
         mii_modifyReg(dev, AR8031_MII_CCR, AR8031_MII_CCR__SEL_COPPER_PAGE | AR8031_MII_CCR__PREFER_COPPER,
                                            AR8031_MII_CCR__SEL_COPPER_PAGE | AR8031_MII_CCR__PREFER_COPPER);
 
 
         mii_mmd_modify(dev, 7, 0x8016, 0x1c, 0x18);                             /* Set 125MHz from local pll source */
         ar8031_mii_dbg_modify(dev, AR8031_MII_DBG_SARDES_REG, 0x100, 0x100);    /* rgmii_tx_clk_dly on */
-
         mii_resetPhy(dev);      /* ensure settings and renegotiate */
-
         /* Advertise pause control */
         mii_modifyReg(dev, MII_ANAR, MII_ANAR__PAUSE | MII_ANAR__ASYM_PAUSE, MII_ANAR__PAUSE | MII_ANAR__ASYM_PAUSE);
         mii_setReg(dev, MII_BCR, MII_BCR__AUTONEGEN | MII_BCR__REAUTONEG );
@@ -447,6 +455,9 @@ void device_delete(device_t* device)
 
         if (flags & DF_I_DCIFILTER) device->dcifilter = dcifilter_delete(device->dcifilter);
 
+        /* if poss, turn off phy */
+        if (flags & DF_I_HAL_HAS_PHY_PWRRST) device->hal_device->phy.PwrRst(0,device->hal_pw);
+
         SLIST_REMOVE(&device_list, device, device_t, next);
         free(device);
 }

c/mii

@@ -30,11 +30,30 @@
 #include "mii.h"
 #include "utils.h"
 #include "debug.h"
+#include "device.h"
 #include "AsmUtils/irqs.h"
 
-void mii_resetPhy(device_t* device)
+void mii_hardresetPhy(device_t* device)
 {
+   dprintf_here("hardreset bcr was %x\n",mii_getReg(device, MII_BCR));
+   if (device->flags & DF_I_HAL_HAS_PHY_PWRRST)
+   {
+   /* ensure phy is powered up, and give it a hardware reset pulse */
+     device->hal_device->phy.PwrRst(PhyPwrOn,device->hal_pw);
+     utils_delay_us(500);
+     device->hal_device->phy.PwrRst(PhyPwrOn + PhyHWRst,(void*)(device->hal_pw));
+     utils_delay_us(50);
+     device->hal_device->phy.PwrRst(PhyPwrOn,(void*)(device->hal_pw));
+   }
+}
 
+void mii_resetPhy(device_t* device)
+{
+        if(device->flags && DF_I_PHY_AR8035)
+        {
+          dprintf_here("bcr was %x\n",mii_getReg(device, MII_BCR));
+          mii_modifyReg(device, MII_BCR, ~MII_BCR__PWRDOWN, 0);
+        }
         mii_setReg(device, MII_BCR, MII_BCR__RESET);
 
         /* it should reset within 0.5secs */

h/HalEtherDevice

@@ -39,16 +39,19 @@ typedef struct HalEtherDevice_t
         struct
         {
                 uint32_t                devicenumber;                                   /* for  OS_ClaimDeviceVector */
-                void (*enable)(int on, void* hal_pw);                                  /* enable irq. 1 on, 0 off */
+                void (*enable)(int on, void* hal_pw);                                   /* enable irq. 1 on, 0 off */
                 int (*test)(int unused, void* hal_pw);                                  /* returns 1 if irq present */
                 void (*clear)(int unused, void* hal_pw);
                 volatile uint32_t*      irqRegAddr;                                     /* phy irq test address */
                 uint32_t                irqBitMask;                                     /* phy irq test active bit mask */
-                uint32_t                specialField;
+                void *                  HAL_WS;
                 uint32_t                clock;
+                void (*PwrRst)(int bits, void* hal_pw);
         } phy;
 
 } HalEtherDevice_t;
-
+//Bit values to use with the PwrRst call above
+#define  PhyPwrOn  1
+#define  PhyHWRst  2
 
 #endif

h/device

@@ -393,6 +393,21 @@ _kernel_oserror*        device_setNetworkMTU(device_t*, dci_SetNetworkMTUArgs_t*
 _kernel_oserror*        device_transmit(device_t*, dci_TransmitArgs_t*);
 _kernel_oserror*        device_stats(device_t*, dci_StatsArgs_t*);
 _kernel_oserror*        device_multicastRequest(device_t*, dci_MulticastRequestArgs_t*);
+/*
+ * Flags indicating which resources have been allocated
+ * so that device destroy can be called from anywhere from
+ * within device new and free resources allocated so far.
+ */
+#define DF_I_MEMORY             (1 << 0)
+#define DF_I_PCI_MEMORY         (1 << 1)
+#define DF_I_VECTORCLAIMED      (1 << 2)
+#define DF_I_PHYVECTORCLAIMED   (1 << 3)
+#define DF_I_IRQENABLED         (1 << 4)
+#define DF_I_PHYIRQENABLED      (1 << 5)
+#define DF_I_DCIFILTER          (1 << 6)
+#define DF_I_DRIVER_STARTING    (1 << 7)
+#define DF_I_HAL_HAS_PHY_PWRRST (1 << 8)
+#define DF_I_PHY_AR8035         (1 << 9)
 
 
 #endif

h/mii

@@ -105,6 +105,7 @@
 
 #define MII_MMD_AADR    14                                              /* MMD Access Address Data Register */
 /* MII class 22 functions */
+void                    mii_hardresetPhy(device_t*);
 void                    mii_resetPhy(device_t*);
 void                    mii_reAutoNegotiate(device_t* device);
 uint32_t                mii_getReg(device_t*, int reg);