Change module initialisation to be a two pass scheme
ROOL authored
Detail:
  To make it easier to support arbitrary complexity keyboard controllers (eg. USB via DWCDriver on the Pi) have the kernel do the early keyboard recovery key press detection instead of the HAL.
  During the first pass those modules used for reading the keyboard are started, ignoring the CMOS frugal bits.
  The keyboard is then scanned for 3s, during which time the RAM is cleared (unless the HAL indicated it has already been done).
  During the second pass the remaining modules are started respecting the CMOS frugal bits. Any which were already started in the first pass are inserted into the new chain, so the keyboard is reset once and only once.

  Boot times, with a 300cs key scan time in NewReset.
  Risc PC with 160MB RAM (128+32+0).
  Times from turning on power to initial "beep", using a stopwatch.
                RISC OS 3.70 RISC OS 5.22 This OS
  ARM610        12.5         10.4         10.3
  ARM710        11.8         10.2         9.7
  StrongARM 233 11.1         9.5          8.4

  In NewReset.s:
  Remove old KbdScan code (leave Reset_IRQ_Handler for IIC only)
  If HAL_KbdScanDependencies returns a null string then present KbdDone flag and skip to full init.
  A few vestiges of soft resets removed.
  Do RAM clear when waiting for INKEY (being careful not to trash the running modules...).
  Clearing just the freepool on a 2GB Titanium cleared 7EFD6 pages (99.2%).

  In ModHand.s:
  2nd pass need to sneaky renumber the nodes (so *ROMModules is in the right order, frugal bits line up) without resetting the chain

  In HAL.s:
  Change ClearPhysRAM to ClearWkspRAM, such that it only clears the kernel workspace rather than all RAM. The bulk of the RAM is cleared during the keyboard scan by new function ClearFreePoolSection.
  Add a variant of Init_MapInRAM which clears the mapped in RAM too (as these very early claims will not be in the free pool when the RAM is cleared later).
  Remove HAL keyboard scan setup & IRQ handler.
  Fix bug in HALDebugHexTX2, the input value needs pre-shifting by 16b before continuing.

  In GetAll.s, PMF/osbyte.s:
  Use Hdr:Countries and Hdr:OsBytes for constants.

  In PMF/key.s, PMF/osinit.s:
  Relocate the key post init from PostInit to KeyPostInit.
  Changed PostInit to not tail call KeyPostInit so they can be called independently.

  In hdr/KernelWs:
  Improve comments, add InitWsStart label to refer to.

  In hdr/HALEntries:
  Add HAL_KbdScanDependencies.
  Delete KbdFlag exports.
  Took the opportunity to reorder some of the higher numbered HAL entries and re-grouping, specifically (112,120) (84,106,108,117).
Admin:
  Tested on an ARM6/ARM7/SA Risc PC, BeagleBoard xM, Iyonix, Pandaboard ES, Wandboard Quad, IPEGv5, Titanium, Pi 2 and 3.
  Requires corresponding HAL change.
  Submission for USB bounty.

Version 5.89. Tagged as 'Kernel-5_89'
ac1ea0f5
Name Last commit Last update
..
AMBControl Implement support for cacheable pagetables
PMF Change module initialisation to be a two pass scheme
vdu Fix software pointer when ExtraBytes is in use
ARM600 Implement support for cacheable pagetables
ARMops Streamline PL310 ARMops
Arthur2 Fix incorrect OS_SynchroniseCodeAreas call
Arthur3 Extend MonitorType configure keyword
ArthurSWIs Reimplement AMBControl ontop of the PMP system
CPUFeatures Revise comments - it's multiprocessing extensions, not virtualisation
ChangeDyn Fix inverted global vs. per-page cache flush logic in PMP LogOp_MapOut
Convrsions Add UUID output formatter to conversions
Exceptions Implement support for cacheable pagetables
ExtraSWIs Reimplement AMBControl ontop of the PMP system
GetAll Change module initialisation to be a two pass scheme
HAL Change module initialisation to be a two pass scheme
HeapMan Delete lots of old switches
HeapSort Avoid unnecesssary remainder calculations
Kernel Expose CLREX via OS_PlatformFeatures
LibKern More HAL work. IOMD HAL work in progress. Lots of my own little build scripts. Don't touch this.
MOSDict Import from cleaned 360 CD
MemInfo Add a compatibility page zero for high processor vectors / zero page relocation builds
MemMap2 Implement support for cacheable pagetables
Middle Fix to OS_ReadSysInfo 1
ModHand Change module initialisation to be a two pass scheme
MoreComms Resolve 2x header clashes
MoreSWIs
MsgCode
NewIRQs
NewReset
Oscli
SWINaming
Super1
SysComms
TickEvents
UnSqueeze
Utility
VMSAv6