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Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate,...
Jeffrey Lee authored 
Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.

Detail:
  s/ARMops - Support for Cortex multi-level cache (CT_ctype_WB_CR7_Lx). New ARM_Analyse_Fancy to identify CPU capabilities using feature registers.
  s/HAL - Modify pre-ARMop cache code to handle Cortex-syle caches.
  s/MemInfo - Replace ARM_flush_TLB macro call with appropriate ARMop to provide Cortex compatability
  hdr/ARMops - Update list of ARM architectures
  hdr/CoPro15ops - Deprecate ARM_flush_* macros for HAL kernels, as they are no longer capable of flushing all cache types. ARMops should be used instead.
  hdr/KernelWS - Add storage space for multi-level cache properties required for new cache cleaning code.
Admin:
  Tested under qemu-omap3. Still unable to verify on real hardware due to lack of appropriate MMU code. However new OMAP3 HAL code that uses similar cache management functions appears to work fine on real hardware.


Version 5.35, 4.79.2.98.2.2. Tagged as 'Kernel-5_35-4_79_2_98_2_2'
ad9cdf41
Name Last commit Last update
Dev/IICTest Spinner branch merged.
Doc Kernel merged
Docs Minor kernel updates
NewModes Import from cleaned 360 CD
Resources/UK Commit of kernel as featured in release 5.00.
TestSrc * Converted to building with ObjAsm (but still a single object file using ORG).
h Miscellaneous stuff.
hdr Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.
o Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
rm Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
s Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.
.gitattributes Miscellaneous stuff.
BlackLog Initial revision
Changes Import from cleaned 360 CD
HelpStrs 32-bit Kernel.
LICENSE Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
Makefile BBE tidying.
MkClean,fd7 Mostly device stuff.
MkExport,fd7 Import from cleaned 360 CD
MkRom,fd7 partial video changes for kernel/HAL split near-HAL code for VIDC/IOMD in vdu.vduhint briefly tested in Ursula desktop build still some kernel workspace dependency in near-HAL code
MkRomInst,fd7 32-bit Kernel.
Version Bumped OS version number to 5.14.
VersionASM Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.
VersionNum Add support for Cortex cache type. Extend ARM_Analyse to, where appropriate, use CPU feature registers to identify CPU capabilities.