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Add new OS_PlatformFeatures reason code for reading CPU features (inspired by...
Jeffrey Lee authored 
Add new OS_PlatformFeatures reason code for reading CPU features (inspired by ARMv6+ CPUID scheme). Add OS_ReadSysInfo 8 flags for indicating the alignment mode the ROM was built with. Fix long-standing bug with OS_PlatformFeatures when an unknown reason code is used.

Detail:
  s/CPUFeatures, hdr/OSMisc, hdr/KernelWS - Code and definitions for reading CPU features and reporting them via OS_PlatformFeatures 34. All the instruction set features which are exposed by the CPUID scheme and which are relevant to RISC OS are exposed, along with a few extra flags which we derive ourselves (e.g. things relating to < ARMv4, and some register usage restrictions in instructions). s/CPUFeatures is designed to be easily copyable into a future version of CallASWI without requiring any changes.
  s/ARMops - Read and cache CPU features during ARMop initialisation
  s/GetAll - GET new file
  s/Kernel - Hook up the CPU features code to OS_PlatformFeatures. Fix a long standing stack imbalance bug (fixed in RISC OS 3.8, but never merged back to our main branch) which meant that calling OS_PlatformFeatures with an invalid reason code would raise an error, even if it was the X form of the SWI that was called. Similar fix also applied to the unused service call code, along with a fix for the user's R1-R9 being corrupt (shuffled up one place) should an error have been generated.
  s/MemInfo - Extra LTORG needed to keep things happy
  s/Middle - Extend OS_ReadSysInfo 8 to include flags for indicating what memory alignment mode (if any) the OS relies upon. Together with OS_PlatformFeatures 34 this could e.g. be used by !CPUSetup to determine which options should be offered to the user.
Admin:
  Tested on Raspberry Pi 1, 2, 3


Version 5.35, 4.79.2.319. Tagged as 'Kernel-5_35-4_79_2_319'
9944f0f8
Name Last commit Last update
..
ExportVals 32-bit Kernel.
Old Import from cleaned 360 CD
AHCIDevice Change struct layouts for C module compatibility
ARMops Support for ARMv8
Copro15ops ARMv7 fixes
EnvNumbers Import from cleaned 360 CD
EtherDevice Change struct layouts for C module compatibility
HALDevice New HAL device ID reservations
HALEntries Add OS_ReadSysInfo 9,6 and 9,7
KernelWS Add new OS_PlatformFeatures reason code for reading CPU features (inspired by ARMv6+ CPUID scheme). Add OS_ReadSysInfo 8 flags for indicating the alignment mode the ROM was built with. Fix long-standing bug with OS_PlatformFeatures when an unknown reason code is used.
KeyWS Add support for new extended internal key codes, low level key codes, and key handler format
ModHand Added new offset field to module header for flags
OSEntries Teach the kernel about different memory attributes
OSMisc Add new OS_PlatformFeatures reason code for reading CPU features (inspired by ARMv6+ CPUID scheme). Add OS_ReadSysInfo 8 flags for indicating the alignment mode the ROM was built with. Fix long-standing bug with OS_PlatformFeatures when an unknown reason code is used.
OSRSI6 Add initial support for "physical memory pools"
Options Add SWI error pointer validation, SeriousErrorV hooks, and OS_ReadSysInfo 15
PL310 Add ARMops for PL310 L2 cache controller
PublicWS Fix HiProcVecs build. Remove old-style PublicWS definitions.
RISCOS Resync with allocations database
VIDCList Reverse interlace deprecation decision
Variables Import from cleaned 360 CD
VduExt Improve Service_DisplayStatus, Service_DisplayChanged functionality
VideoDevice Update VDU HAL device for new OMAPVideo driver, fix MVA-based cache/TLB maintenance ops aborting on ARMv7, add warning to VDU driver about inconsistent state variables during screen mode changes