Skip to content

GitLab

Switch branch/tag
History Find file
Clone
Deduce CPUFlag_LongMul/Thumb/DSP from the right bitfields
Robert Sprowson authored 
The TST operations for LongMul & Thumb were at odds with the ARM ARM, move those. We can get the DSP flag from an ID register too now, rather than relying on the Q flag being writeable in the PSR.
Fortunately, the fields we were previously TSTing also had set bits - so the OS_PlatformFeatures 0 flags were coming out right anyway on all real ARMv7's.

Version 5.35, 4.79.2.317. Tagged as 'Kernel-5_35-4_79_2_317'
280c28ef
Name Last commit Last update
Dev Make OS_Memory 8 return more correct values
Doc Kernel merged
Docs Cache maintenance fixes
NewModes Add support for the new RISC OS 5 style sprite mode word. Add partial support for alpha channel sprite masks. Implement OS_ScreenMode reasons 13-15
Resources/UK Add SWI error pointer validation, SeriousErrorV hooks, and OS_ReadSysInfo 15
TestSrc Adopt some switches from Hdr:Machine/Machine
h Header defs for Pi Compute module and IIC
hdr Revise error pointer validity checks
o Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
rm Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
s Deduce CPUFlag_LongMul/Thumb/DSP from the right bitfields
.gitattributes Added 'UnConv' error (see also HdrSrc).
BlackLog Initial revision
Changes Import from cleaned 360 CD
HelpStrs Adoption of *CONFIGURE/STATUS CACHE commands
LICENSE Clean reimport of hdr.RISCOS (real commit date 2008-03-28 by bavison), without any of the 3rd party allocations.
Makefile Complete removal od SPIDevice
MkClean,fd7 Mostly device stuff.
MkExport,fd7 Import from cleaned 360 CD
MkInstall,fd7 Added a disc install phase as an analogue of the export phase
MkRom,fd7 Makefile recreated from fragments
Version Back to odd numbered development
VersionASM Deduce CPUFlag_LongMul/Thumb/DSP from the right bitfields
VersionNum Deduce CPUFlag_LongMul/Thumb/DSP from the right bitfields